[edk2-devel] [edk2-platforms][PATCH V1 17/17] SimicsOpenBoardPkg: Assign unique token namespace
Nate DeSimone
nathaniel.l.desimone at intel.com
Fri Oct 11 04:34:20 UTC 2019
Reviewed-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
-----Original Message-----
From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Kubacki, Michael A
Sent: Monday, October 7, 2019 10:17 PM
To: devel at edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman at intel.com>; Wei, David Y <david.y.wei at intel.com>
Subject: [edk2-devel] [edk2-platforms][PATCH V1 17/17] SimicsOpenBoardPkg: Assign unique token namespace
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2249
PCDs declared in the SimicsOpenBoardPkg currently use the GUID gBoardModuleTokenSpaceGuid. The same name is used in other board packages and a package has been added called BoardModulePkg so this name is now misleading.
This change assigns a unique GUID value and a name specific to the package to provide differentiation from PCDs in other board packages.
Cc: Agyeman Prince <prince.agyeman at intel.com>
Cc: Wei David Y <david.y.wei at intel.com>
Signed-off-by: Michael Kubacki <michael.a.kubacki at intel.com>
---
Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec | 72 ++++++++++----------
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 14 ++--
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 12 ++--
Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 14 ++--
Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf | 10 +--
Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 10 +--
Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf | 18 ++---
Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 36 +++++-----
Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.inf | 2 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.fdf.inc | 6 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 16 ++---
11 files changed, 105 insertions(+), 105 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
index 40487820fa..421c464023 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
@@ -17,57 +17,57 @@
Include
[Guids]
- gBoardModuleTokenSpaceGuid = {0xeed35f57, 0x4ff2, 0x4244, {0xb8, 0x3a, 0xea, 0x71, 0x5f, 0xd3, 0x59, 0xa5}}
+ gSimicsOpenBoardPkgTokenSpaceGuid = {0x75fd61da, 0x3931, 0x49aa,
+ {0x8f, 0x11, 0x18, 0x25, 0xf6, 0x31, 0x21, 0xd2}}
gSimicsBoardConfigGuid = {0xeed35f57, 0x4ff2, 0x4244, {0xb8, 0x3a, 0xea, 0x71, 0x5f, 0xd3, 0x59, 0xa5}}
[PcdsFixedAtBuild]
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase|0x0|UINT32|0
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize|0x0|UINT32|1
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase|0x0|UINT32|0x15
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize|0x0|UINT32|0x16
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase|0x0|UINT32|0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize|0x0|UINT32|1
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase|0x0|UINT32|0x1
+ 5
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize|0x0|UINT32|0x1
+ 6
#TODO: Remove these two when we integrate new PlatformPei
- gBoardModuleTokenSpaceGuid.PcdSimicsMemFvBase|0x00800000|UINT32|2
- gBoardModuleTokenSpaceGuid.PcdSimicsMemFvSize|0x00500000|UINT32|3
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsMemFvBase|0x00800000|UINT32
+ |2
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsMemFvSize|0x00500000|UINT32
+ |3
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase|0x0|UINT32|0x8
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize|0x0|UINT32|0x9
- gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareFdSize|0x0|UINT32|0xa
- gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareBlockSize|0|UINT32|0xb
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase|0x0|UINT32|0xc
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
- gBoardModuleTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT32|0xf
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UINT32|0x11
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UINT32|0x12
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|UINT32|0x13
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|UINT32|0x14
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageBase|0x0|UINT32|0x18
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageSize|0x0|UINT32|0x19
- gBoardModuleTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
- gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd|0x0|UINT32|0x1f
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase|
+ 0x0|UINT32|0x8
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize|
+ 0x0|UINT32|0x9
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFirmwareFdSize|0x0|UINT32|0
+ xa
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFirmwareBlockSize|0|UINT32|
+ 0xb
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase|
+ 0x0|UINT32|0xc
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase|
+ 0x0|UINT32|0xd
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBas
+ e|0x0|UINT32|0xe
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT32|0x
+ f
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UINT3
+ 2|0x11
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UINT3
+ 2|0x12
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|UINT3
+ 2|0x13
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|UINT3
+ 2|0x14
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|0x0|UINT
+ 32|0x18
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize|0x0|UINT
+ 32|0x19
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0
+ |UINT32|0x1a
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd|0x0
+ |UINT32|0x1f
[PcdsDynamic, PcdsDynamicEx]
# TODO: investigate whether next two Pcds are needed
- gBoardModuleTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|0x28
- gBoardModuleTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId|0|UINT16|0x1b
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|0x28
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BO
+ OLEAN|0x10
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId|0|UIN
+ T16|0x1b
## The IO port aperture shared by all PCI root bridges.
#
- gBoardModuleTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
- gBoardModuleTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
## The 32-bit MMIO aperture shared by all PCI root bridges.
#
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
## The 64-bit MMIO aperture shared by all PCI root bridges.
#
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined<BR><BR> @@ -131,7 +131,7 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
## FFS filename to find the shell application.
# @Prompt FFS Name of Shell Application
- gBoardModuleTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }|VOID*|0x40000004
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04,
+ 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0,
+ 0xB4, 0xD1 }|VOID*|0x40000004
## ISA Bus features to support DMA, SlaveDMA and ISA Memory. <BR><BR>
# BIT0 indicates if DMA is supported<BR> @@ -140,10 +140,10 @@
# Other BITs are reseved and must be zero.
# If more than one features are supported, the different BIT will be enabled at the same time.
# @Prompt ISA Bus Features
- # @Expression 0x80000002 | (gBoardModuleTokenSpaceGuid.PcdIsaBusSupportedFeatures & 0xF8) == 0
- gBoardModuleTokenSpaceGuid.PcdIsaBusSupportedFeatures|0x05|UINT8|0x00010040
+ # @Expression 0x80000002 |
+ (gSimicsOpenBoardPkgTokenSpaceGuid.PcdIsaBusSupportedFeatures & 0xF8)
+ == 0
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdIsaBusSupportedFeatures|0x05|UINT
+ 8|0x00010040
- gBoardModuleTokenSpaceGuid.PcdLogoFile |{ 0x99, 0x8b, 0xB2, 0x7B, 0xBB, 0x61, 0xD5, 0x11, 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D }|VOID*|0x00010037
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdLogoFile |{ 0x99, 0x8b, 0xB2,
+ 0x7B, 0xBB, 0x61, 0xD5, 0x11, 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F,
+ 0xC1, 0x4D }|VOID*|0x00010037
[Protocols]
##
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
index 29cd2455f6..0298e4b12d 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds
+++ c
@@ -235,13 +235,13 @@
######################################
# Board Configuration
######################################
- gBoardModuleTokenSpaceGuid.PcdPciIoBase|0x0
- gBoardModuleTokenSpaceGuid.PcdPciIoSize|0x0
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Base|0x0
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Size|0x0
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Base|0x0
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Size|0x800000000
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId|0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoBase|0x0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoSize|0x0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Base|0x0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Size|0x0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Base|0x0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Size|0x800000000
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId|0
######################################
# Advanced Feature Configuration
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 6c1579bef7..75a99a5270 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -80,23 +80,23 @@ BlockSize = 0x10000
NumBlocks = 0xB0
0x000000|0x006000
-gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesBase|gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesSize
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimicsOpe
+nBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize
0x006000|0x001000
-gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageSize
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimicsOp
+enBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
0x007000|0x001000
-gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gBoardModuleTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
+gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gSimicsOpe
+nBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
0x010000|0x008000
-gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|gSimicsOpe
+nBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
0x020000|0x0E0000
-gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase|gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase|gSimicsOpenBoar
+dPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
FV = FvPreMemory
0x100000|0xA00000
-gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase|gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase|gSimicsOpenBoar
+dPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
FV = DXEFV
################################################################################
diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
index e1920bd2ff..372e0c9651 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHost
+++ BridgeLib.inf
@@ -41,11 +41,11 @@
PciLib
[Pcd]
- gBoardModuleTokenSpaceGuid.PcdPciIoBase
- gBoardModuleTokenSpaceGuid.PcdPciIoSize
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Base
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Size
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Base
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Size
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Base
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Size
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Base
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Size
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf b/Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
index bc85420f97..5d2e39532c 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReport
+++ FvLib.inf
@@ -48,9 +48,9 @@
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire
diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index cdb6e242e8..3fb76c3564 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/P
+++ latformBootManagerLib.inf
@@ -50,12 +50,12 @@
LogoLib
[Pcd]
- gBoardModuleTokenSpaceGuid.PcdEmuVariableEvent
- gBoardModuleTokenSpaceGuid.PcdOvmfFlashVariablesEnable
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdEmuVariableEvent
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
- gBoardModuleTokenSpaceGuid.PcdShellFile
- gBoardModuleTokenSpaceGuid.PcdLogoFile
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdShellFile
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdLogoFile
[Pcd.IA32, Pcd.X64]
gEfiMdePkgTokenSpaceGuid.PcdFSBClock
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
index b1d319c5ea..61ca2c0613 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
@@ -58,16 +58,16 @@
gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED
[Pcd]
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesBase
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
- gBoardModuleTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
[FeaturePcd]
gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index e466d57e4e..9499d2aad5 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -55,25 +55,25 @@
PcdLib
[Pcd]
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageBase
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageSize
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesBase
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
- gBoardModuleTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
- gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
- gBoardModuleTokenSpaceGuid.PcdPciIoBase
- gBoardModuleTokenSpaceGuid.PcdPciIoSize
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Base
- gBoardModuleTokenSpaceGuid.PcdPciMmio32Size
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Base
- gBoardModuleTokenSpaceGuid.PcdPciMmio64Size
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoBase
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciIoSize
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Base
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio32Size
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Base
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdPciMmio64Size
gSimicsX58PkgTokenSpaceGuid.PcdX58TsegMbytes
gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire
gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.inf b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.inf
index 002cb56826..e0eee30985 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.in
+++ f
@@ -70,5 +70,5 @@
[Pcd]
gOptionRomPkgTokenSpaceGuid.PcdDriverSupportedEfiVersion
- gBoardModuleTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsX58HostBridgePciDevId
gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.fdf.inc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.fdf.inc
index ae9a625da9..af583ecde6 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.fdf.inc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.
+++ fdf.inc
@@ -45,7 +45,7 @@
# The total size after decompression is (128 + PcdSimicsPeiMemFvSize + 16 + # PcdSimicsDxeMemFvSize).
-DEFINE OUTPUT_SIZE = (128 + gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize + 16 + gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize)
+DEFINE OUTPUT_SIZE = (128 +
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize + 16 +
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize)
# LzmaCustomDecompressLib uses a constant scratch buffer size of 64KB; see # SCRATCH_BUFFER_REQUEST_SIZE in @@ -58,10 +58,10 @@ DEFINE DECOMP_SCRATCH_SIZE = 0x00010000 # # The calculation below mirrors DecompressMemFvs() [SimicsX58Pkg/Sec/SecMain.c].
-DEFINE OUTPUT_BASE = ($(MEMFD_BASE_ADDRESS) + gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase + 0x00100000)
+DEFINE OUTPUT_BASE = ($(MEMFD_BASE_ADDRESS) + gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase + 0x00100000)
DEFINE DECOMP_SCRATCH_BASE_UNALIGNED = ($(OUTPUT_BASE) + $(OUTPUT_SIZE)) DEFINE DECOMP_SCRATCH_BASE_ALIGNMENT = 0x000FFFFF
DEFINE DECOMP_SCRATCH_BASE_MASK = 0xFFF00000
DEFINE DECOMP_SCRATCH_BASE = (($(DECOMP_SCRATCH_BASE_UNALIGNED) + $(DECOMP_SCRATCH_BASE_ALIGNMENT)) & $(DECOMP_SCRATCH_BASE_MASK))
-SET gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd = $(DECOMP_SCRATCH_BASE) + $(DECOMP_SCRATCH_SIZE)
+SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
+= $(DECOMP_SCRATCH_BASE) + $(DECOMP_SCRATCH_SIZE)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
index 044129c941..9c2436c3ad 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.i
+++ nc
@@ -29,20 +29,20 @@ DEFINE SECFV_OFFSET = 0x001EC000
DEFINE SECFV_SIZE = 0x14000
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFdBaseAddress = $(FW_BASE_ADDRESS)
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareFdSize = $(FW_SIZE)
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareBlockSize = $(BLOCK_SIZE)
+SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress = $(FW_BASE_ADDRESS)
+SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFirmwareFdSize = $(FW_SIZE)
+SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFirmwareBlockSize =
+$(BLOCK_SIZE)
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase = $(FW_BASE_ADDRESS)
+SET
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase =
+$(FW_BASE_ADDRESS)
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0xE000
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase = gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize = $(BLOCK_SIZE)
+SET
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase =
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase +
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+SET
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize =
+$(BLOCK_SIZE)
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase = gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase + gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize
+SET
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase
+= gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase
++ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = $(BLOCK_SIZE)
-SET gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase = gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+SET
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase =
+gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase
++ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x10000
SET gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress = 0xFFE00000
--
2.16.2.windows.1
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