[edk2-devel] [Patch] PcAtChipsetPkg: Fix spelling errors
Michael D Kinney
michael.d.kinney at intel.com
Fri Oct 18 19:34:37 UTC 2019
From: Sean Brogan <sean.brogan at microsoft.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=2263
Cc: Ray Ni <ray.ni at intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney at intel.com>
---
PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c | 12 ++++++------
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf | 2 +-
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni | 2 +-
PcAtChipsetPkg/Include/Library/IoApicLib.h | 2 +-
PcAtChipsetPkg/Include/Register/Hpet.h | 6 +++---
PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c | 2 +-
PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 8 ++++----
PcAtChipsetPkg/PcAtChipsetPkg.dec | 2 +-
PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c | 4 ++--
PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h | 8 ++++----
.../PcatRealTimeClockRuntimeDxe/PcRtcEntry.c | 2 +-
11 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c
index ded3b53619..cbe986ebfd 100644
--- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c
+++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c
@@ -1,5 +1,5 @@
/** @file
- Timer Architectural Protocol module using High Precesion Event Timer (HPET)
+ Timer Architectural Protocol module using High Precision Event Timer (HPET)
Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -246,7 +246,7 @@ HpetRead (
/**
Write a 64-bit HPET register.
- @param Offset Specifies the ofsfert of the HPET register to write.
+ @param Offset Specifies the offset of the HPET register to write.
@param Value Specifies the value to write to the HPET register specified by Offset.
@return The 64-bit value written to HPET register specified by Offset.
@@ -530,7 +530,7 @@ TimerDriverSetTimerPeriod (
// If TimerPeriod is 0, then mask HPET Timer interrupts
//
- if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+ if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
//
// Disable HPET MSI interrupt generation
//
@@ -576,7 +576,7 @@ TimerDriverSetTimerPeriod (
//
// Enable HPET Timer interrupt generation
//
- if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+ if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
//
// Program MSI Address and MSI Data values in the selected HPET Timer
// Program HPET register with APIC ID of current BSP in case BSP has been switched
@@ -834,7 +834,7 @@ TimerDriverInitialize (
//
// Check to see if this HPET Timer supports MSI
//
- if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0) {
+ if (mTimerConfiguration.Bits.MsiInterruptCapability != 0) {
//
// Save the index of the first HPET Timer that supports MSI interrupts
//
@@ -959,7 +959,7 @@ TimerDriverInitialize (
// Show state of enabled HPET timer
//
DEBUG_CODE (
- if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+ if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
DEBUG ((DEBUG_INFO, "HPET Interrupt Mode MSI\n"));
} else {
DEBUG ((DEBUG_INFO, "HPET Interrupt Mode I/O APIC\n"));
diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
index ba2e075118..125eea0aab 100644
--- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
+++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
@@ -1,5 +1,5 @@
## @file
-# Timer Architectural Protocol module using High Precesion Event Timer (HPET).
+# Timer Architectural Protocol module using High Precision Event Timer (HPET).
#
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni
index e2320653b6..7d1797b1df 100644
--- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni
+++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni
@@ -1,5 +1,5 @@
// /** @file
-// Timer Architectural Protocol module using High Precesion Event Timer (HPET).
+// Timer Architectural Protocol module using High Precision Event Timer (HPET).
//
// Timer Architectural Protocol module using High Precision Event Timer (HPET).
//
diff --git a/PcAtChipsetPkg/Include/Library/IoApicLib.h b/PcAtChipsetPkg/Include/Library/IoApicLib.h
index 200ef731fb..4ee092c0f2 100644
--- a/PcAtChipsetPkg/Include/Library/IoApicLib.h
+++ b/PcAtChipsetPkg/Include/Library/IoApicLib.h
@@ -63,7 +63,7 @@ IoApicEnableInterrupt (
Configures an I/O APIC interrupt.
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
- mode to the Local APIC of the currntly executing CPU. The default state of the
+ mode to the Local APIC of the currently executing CPU. The default state of the
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must
be used to enable(unmask) the I/O APIC Interrupt.
diff --git a/PcAtChipsetPkg/Include/Register/Hpet.h b/PcAtChipsetPkg/Include/Register/Hpet.h
index f7c0174e14..8437ec1f2d 100644
--- a/PcAtChipsetPkg/Include/Register/Hpet.h
+++ b/PcAtChipsetPkg/Include/Register/Hpet.h
@@ -70,14 +70,14 @@ typedef union {
UINT32 LevelTriggeredInterrupt:1;
UINT32 InterruptEnable:1;
UINT32 PeriodicInterruptEnable:1;
- UINT32 PeriodicInterruptCapablity:1;
- UINT32 CounterSizeCapablity:1;
+ UINT32 PeriodicInterruptCapability:1;
+ UINT32 CounterSizeCapability:1;
UINT32 ValueSetEnable:1;
UINT32 Reserved1:1;
UINT32 CounterSizeEnable:1;
UINT32 InterruptRoute:5;
UINT32 MsiInterruptEnable:1;
- UINT32 MsiInterruptCapablity:1;
+ UINT32 MsiInterruptCapability:1;
UINT32 Reserved2:16;
UINT32 InterruptRouteCapability;
} Bits;
diff --git a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c
index 7a3c9aca8d..9e4a58049e 100644
--- a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c
+++ b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c
@@ -94,7 +94,7 @@ IoApicEnableInterrupt (
Configures an I/O APIC interrupt.
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
- mode to the Local APIC of the currntly executing CPU. The default state of the
+ mode to the Local APIC of the currently executing CPU. The default state of the
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must
be used to enable(unmask) the I/O APIC Interrupt.
diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
index 93affe151e..25c4cefc13 100644
--- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
+++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
@@ -195,7 +195,7 @@ SerialPortRead (
/**
Polls a serial device to see if there is any data waiting to be read.
- Polls aserial device to see if there is any data waiting to be read.
+ Polls a serial device to see if there is any data waiting to be read.
If there is data waiting to be read from the serial device, then TRUE is returned.
If there is no data waiting to be read from the serial device, then FALSE is returned.
@@ -339,13 +339,13 @@ SerialPortGetControl (
}
/**
- Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
+ Sets the baud rate, receive FIFO depth, transmit/receive time out, parity,
data bits, and stop bits on a serial device.
@param BaudRate The requested baud rate. A BaudRate value of 0 will use the
device's default interface speed.
On output, the value actually set.
- @param ReveiveFifoDepth The requested depth of the FIFO on the receive side of the
+ @param ReceiveFifoDepth The requested depth of the FIFO on the receive side of the
serial interface. A ReceiveFifoDepth value of 0 will use
the device's default FIFO depth.
On output, the value actually set.
@@ -358,7 +358,7 @@ SerialPortGetControl (
DefaultParity will use the device's default parity value.
On output, the value actually set.
@param DataBits The number of data bits to use on the serial device. A DataBits
- vaule of 0 will use the device's default data bit setting.
+ value of 0 will use the device's default data bit setting.
On output, the value actually set.
@param StopBits The number of stop bits to use on this serial device. A StopBits
value of DefaultStopBits will use the device's default number of
diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index aad53b07c8..88de5cceea 100644
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -50,7 +50,7 @@ [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
# @Prompt HPET local APIC vector.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
- ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
+ ## This PCD specifies the default period of the HPET Timer in 100 ns units.
# The default value of 100000 100 ns units is the same as 10 ms.
# @Prompt Default period of HPET timer.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
index 8b68b0f192..52af179417 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
@@ -1051,9 +1051,9 @@ IsLeapYear (
}
/**
- Converts time from EFI_TIME format defined by UEFI spec to RTC's.
+ Converts time from EFI_TIME format defined by UEFI spec to RTC format.
- This function converts time from EFI_TIME format defined by UEFI spec to RTC's.
+ This function converts time from EFI_TIME format defined by UEFI spec to RTC format.
If data mode of RTC is BCD, then converts EFI_TIME to it.
If RTC is in 12-hour format, then converts EFI_TIME to it.
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
index 038482d04d..47293ce44c 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h
@@ -110,7 +110,7 @@ typedef struct {
UINT8 Uf : 1; // Update End Interrupt Flag
UINT8 Af : 1; // Alarm Interrupt Flag
UINT8 Pf : 1; // Periodic Interrupt Flag
- UINT8 Irqf : 1; // Iterrupt Request Flag = PF & PIE | AF & AIE | UF & UIE
+ UINT8 Irqf : 1; // Interrupt Request Flag = PF & PIE | AF & AIE | UF & UIE
} RTC_REGISTER_C_BITS;
typedef union {
@@ -234,7 +234,7 @@ PcRtcGetWakeupTime (
/**
The user Entry Point for PcRTC module.
- This is the entrhy point for PcRTC module. It installs the UEFI runtime service
+ This is the entry point for PcRTC module. It installs the UEFI runtime service
including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime().
@param ImageHandle The firmware allocated handle for the EFI image.
@@ -266,9 +266,9 @@ RtcTimeFieldsValid (
);
/**
- Converts time from EFI_TIME format defined by UEFI spec to RTC's.
+ Converts time from EFI_TIME format defined by UEFI spec to RTC format.
- This function converts time from EFI_TIME format defined by UEFI spec to RTC's.
+ This function converts time from EFI_TIME format defined by UEFI spec to RTC format.
If data mode of RTC is BCD, then converts EFI_TIME to it.
If RTC is in 12-hour format, then converts EFI_TIME to it.
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
index dca3b8d9ff..ccda633137 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
@@ -108,7 +108,7 @@ PcRtcEfiSetWakeupTime (
/**
The user Entry Point for PcRTC module.
- This is the entrhy point for PcRTC module. It installs the UEFI runtime service
+ This is the entry point for PcRTC module. It installs the UEFI runtime service
including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime().
@param ImageHandle The firmware allocated handle for the EFI image.
--
2.21.0.windows.1
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