[edk2-devel] [edk2-platforms] [PATCH v1 1/1] ClevoOpenBoardPkg/Features: Enable ThunderBolt

Kubacki, Michael A michael.a.kubacki at intel.com
Wed Sep 4 07:39:07 UTC 2019


Does ThunderBolt need to be enabled by default? I want to be sure we're not including it in stages (generally considered advanced) where there's not a use case and setting it to FALSE works as expected.

> -----Original Message-----
> From: Sinha, Ankit
> Sent: Friday, August 30, 2019 3:41 PM
> To: devel at edk2.groups.io
> Cc: Kubacki, Michael A <michael.a.kubacki at intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone at intel.com>
> Subject: [edk2-platforms] [PATCH v1 1/1] ClevoOpenBoardPkg/Features: Enable
> ThunderBolt
> 
> Add Thunderbolt ACPI table and enable feature PCD
> 
> Cc: Michael Kubacki <michael.a.kubacki at intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
> 
> Signed-off-by: Ankit Sinha <ankit.sinha at intel.com>
> ---
>  Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec                    |  1 +
>  Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc       |  2
> +-
>  Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl      |  1 -
>  Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl |  1
> +
>  Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl     | 55 ----
> ----------------
>  5 files changed, 3 insertions(+), 57 deletions(-)
> 
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> index 28aedfef5988..9568d80b3aa9 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> @@ -20,6 +20,7 @@ PACKAGE_GUID      = D04CCA80-5F71-478D-9A26-
> 72BC751D0106
>  Include
>  N1xxWU/Include
>  Features/Tbt/Include
> +Features/Tbt/AcpiTables
> 
>  [Guids]
>  gBoardModuleTokenSpaceGuid            =  {0x72d1fff7, 0xa42a, 0x4219, {0xb9,
> 0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
> diff --git
> a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
> index ea759776fb17..653fb0638e1d 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
> +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
> @@ -48,7 +48,7 @@
>    gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
>  !endif
> 
> -  gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE
> +  gBoardModuleTokenSpaceGuid.PcdTbtEnable|TRUE
>    #
>    # More fine granularity control below:
>    #
> diff --git
> a/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
> b/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
> index 8976c7a0ffcd..c95f4788e8a3 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
> +++ b/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
> @@ -19,7 +19,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>    External(\_SB.PCI0.PEG1.HPME, MethodObj)
>    External(\_SB.PCI0.PEG2.HPME, MethodObj)
>    External(\_GPE.AL6F, MethodObj)
> -  External(\_SB.THDR, MethodObj)
>    External(\_GPE.P0L6, MethodObj)
>    External(\_GPE.P1L6, MethodObj)
>    External(\_GPE.P2L6, MethodObj)
> diff --git
> a/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl
> b/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl
> index 063093a08cb5..e5fa1de70035 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl
> +++ b/Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.a
> +++ sl
> @@ -73,6 +73,7 @@ External(TBFF, MethodObj)  External(FFTB, MethodObj)
> External(SXTB, MethodObj)
> 
> +include ("Tbt.asl")
> 
>  // Interrupt specific registers
>  include("Itss.asl")
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl
> b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl
> index 2efe1a54f37e..e6cd45d49911 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl
> +++ b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl
> @@ -868,13 +868,6 @@ Scope(\_GPE)
>              ADBG("Notify PEG2")
>              Notify(\_SB.PCI0.PEG2,0)
>            }
> -#ifndef CPU_CFL
> -          Case (4)
> -          {
> -            ADBG("Notify PEG3")
> -            Notify(\_SB.PCI0.PEG3,0)
> -          }
> -#endif
>          }
>        }//Switch(ToInteger(TBSS)) // TBT Selector
>      }//If(NOHP())
> @@ -1606,54 +1599,6 @@ If(LAnd(LEqual(TBTS, 1),LOr(LEqual(RPS0,
> 20),LEqual(RPS1, 20))))
>    }//End of Scope(\_SB.PCI0.RP20)
>  }
> 
> -If(LAnd(LEqual(TBTS, 1),LOr(LEqual(RPS0, 21),LEqual(RPS1, 21)))) -{
> -  Scope(\_SB.PCI0.PEG0)
> -  {
> -    Device(HRUS)// Host router Upstream port
> -    {
> -      Name(_ADR, 0x00000000)
> -
> -      Method(_RMV)
> -      {
> -        Return(TARS)
> -      } // end _RMV
> -    }
> -  }//End of Scope(\_SB.PCI0.PEG0)
> -}
> -
> -If(LAnd(LEqual(TBTS, 1),LOr(LEqual(RPS0, 22),LEqual(RPS1, 22)))) -{
> -  Scope(\_SB.PCI0.PEG1)
> -  {
> -    Device(HRUS)// Host router Upstream port
> -    {
> -      Name(_ADR, 0x00000000)
> -
> -      Method(_RMV)
> -      {
> -        Return(TARS)
> -      } // end _RMV
> -    }
> -  }//End of Scope(\_SB.PCI0.PEG1)
> -}
> -
> -If(LAnd(LEqual(TBTS, 1),LOr(LEqual(RPS0, 23),LEqual(RPS1, 23)))) -{
> -  Scope(\_SB.PCI0.PEG2)
> -  {
> -    Device(HRUS)// Host router Upstream port
> -    {
> -      Name(_ADR, 0x00000000)
> -
> -      Method(_RMV)
> -      {
> -        Return(TARS)
> -      } // end _RMV
> -    }
> -  }//End of Scope(\_SB.PCI0.PEG2)
> -}
> -
>  Scope(\_SB)
>  {
>      //
> --
> 2.16.2.windows.1


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