[EXTERNAL] [edk2-devel] [PATCH v1 2/2] SecurityPkg Tcg: Use SW SMI IO port PCD in Tpm.asl
Bret Barkelew via groups.io
bret.barkelew=microsoft.com at groups.io
Tue Apr 7 22:35:22 UTC 2020
Reviewed-by: Bret Barkelew <bret.barkelew at microsoft.com>
- Bret
________________________________
From: devel at edk2.groups.io <devel at edk2.groups.io> on behalf of Michael Kubacki via groups.io <michael.kubacki=outlook.com at groups.io>
Sent: Monday, April 6, 2020 11:34:22 AM
To: devel at edk2.groups.io <devel at edk2.groups.io>
Cc: Kun Qin <Kun.Qin at microsoft.com>; Jian J Wang <jian.j.wang at intel.com>; Jiewen Yao <jiewen.yao at intel.com>; Chao Zhang <chao.b.zhang at intel.com>
Subject: [EXTERNAL] [edk2-devel] [PATCH v1 2/2] SecurityPkg Tcg: Use SW SMI IO port PCD in Tpm.asl
From: Michael Kubacki <michael.kubacki at microsoft.com>
REF:https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2416&data=02%7C01%7CBret.Barkelew%40microsoft.com%7Cf33af41d885e42621c3408d7da59482e%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637217949309605866&sdata=ThsbHop%2BGLThnYPKprw1c3DOGgGxKUIaMPVSSxNXGII%3D&reserved=0
Replaces the hardcoded value of 0xB2 with a PCD for the SMI port access
operation region. This allows platforms to customize the IO port value if
necessary.
Cc: Kun Qin <Kun.Qin at microsoft.com>
Cc: Jian J Wang <jian.j.wang at intel.com>
Cc: Jiewen Yao <jiewen.yao at intel.com>
Cc: Chao Zhang <chao.b.zhang at intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki at microsoft.com>
---
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf | 4 ++++
SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 18 +++++++++---------
SecurityPkg/Tcg/TcgSmm/TcgSmm.inf | 4 ++++
SecurityPkg/Tcg/TcgSmm/Tpm.asl | 17 +++++++++--------
4 files changed, 26 insertions(+), 17 deletions(-)
diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
index e33cbcc49152..2ebf2e05f2ea 100644
--- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
@@ -21,6 +21,7 @@
# This external input must be validated carefully to avoid security issue.
#
# Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -70,6 +71,9 @@
gEfiSmmVariableProtocolGuid ## CONSUMES
gEfiAcpiTableProtocolGuid ## CONSUMES
+[FixedPcd]
+ gEfiSecurityPkgTokenSpaceGuid.PcdSmiCommandIoPort ## CONSUMES
+
[Pcd]
gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId ## SOMETIMES_CONSUMES
diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
index 7a91708a1a34..95f9d7eae841 100644
--- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
@@ -4,7 +4,7 @@
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
(c)Copyright 2016 HP Development Company, L.P.<BR>
-Copyright (c) 2017, Microsoft Corporation. All rights reserved. <BR>
+Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -41,10 +41,10 @@ DefinitionBlock (
//
// Operational region for Smi port access
//
- OperationRegion (SMIP, SystemIO, 0xB2, 1)
+ OperationRegion (SMIP, SystemIO, FixedPcdGet16 (PcdSmiCommandIoPort), 1)
Field (SMIP, ByteAcc, NoLock, Preserve)
{
- IOB2, 8
+ IOPN, 8
}
//
@@ -258,7 +258,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (MCIN, IOB2)
+ Store (MCIN, IOPN)
}
}
Return (0)
@@ -359,7 +359,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
@@ -390,7 +390,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Store (LPPR, Index (TPM3, 0x01))
Store (PPRP, Index (TPM3, 0x02))
@@ -422,7 +422,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
}
Case (8)
@@ -436,7 +436,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
}
@@ -475,7 +475,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (MCIN, IOB2)
+ Store (MCIN, IOPN)
Return (MRET)
}
Default {BreakPoint}
diff --git a/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf b/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
index 29f9c15b0e02..9fac896dde8b 100644
--- a/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
+++ b/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
@@ -10,6 +10,7 @@
# This external input must be validated carefully to avoid security issue.
#
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -63,6 +64,9 @@
gEfiSmmVariableProtocolGuid ## CONSUMES
gEfiAcpiTableProtocolGuid ## CONSUMES
+[FixedPcd]
+ gEfiSecurityPkgTokenSpaceGuid.PcdSmiCommandIoPort ## CONSUMES
+
[Pcd]
gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId ## SOMETIMES_CONSUMES
diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
index 739067dbec03..9d5e6ddc110b 100644
--- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl
+++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
@@ -3,6 +3,7 @@
and MemoryClear.
Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -41,10 +42,10 @@ DefinitionBlock (
//
// Operational region for Smi port access
//
- OperationRegion (SMIP, SystemIO, 0xB2, 1)
+ OperationRegion (SMIP, SystemIO, FixedPcdGet16 (PcdSmiCommandIoPort), 1)
Field (SMIP, ByteAcc, NoLock, Preserve)
{
- IOB2, 8
+ IOPN, 8
}
//
@@ -96,7 +97,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (MCIN, IOB2)
+ Store (MCIN, IOPN)
}
}
Return (0)
@@ -196,7 +197,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
@@ -227,7 +228,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Store (LPPR, Index (TPM3, 0x01))
Store (PPRP, Index (TPM3, 0x02))
@@ -255,7 +256,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
}
Case (8)
@@ -269,7 +270,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (PPIN, IOB2)
+ Store (PPIN, IOPN)
Return (FRET)
}
@@ -308,7 +309,7 @@ DefinitionBlock (
//
// Trigger the SMI interrupt
//
- Store (MCIN, IOB2)
+ Store (MCIN, IOPN)
Return (MRET)
}
Default {BreakPoint}
--
2.16.3.windows.1
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