[edk2-devel] [PATCH v1 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code.

[Zhiguang Liu]

Reviewed-by: Zhiguang Liu <zhiguang.liu at intel.com>

-----Original Message-----
From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Abner Chang
Sent: Friday, April 10, 2020 3:21 PM
To: devel at edk2.groups.io
Cc: abner.chang at hpe.com; Gilbert Chen <gilbert.chen at hpe.com>; Leif Lindholm <leif.lindholm at linaro.org>; Kinney, Michael D <michael.d.kinney at intel.com>; Gao, Liming <liming.gao at intel.com>
Subject: [edk2-devel] [PATCH v1 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code.

Support RISC-V cache related functions.

Signed-off-by: Abner Chang <abner.chang at hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen at hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm at linaro.org>

Cc: Michael D Kinney <michael.d.kinney at intel.com>
Cc: Liming Gao <liming.gao at intel.com>
Cc: Leif Lindholm <leif.lindholm at linaro.org>
Cc: Gilbert Chen <gilbert.chen at hpe.com>
---
 .../BaseSynchronizationLib.inf                |  5 ++
 .../RiscV64/SynchronizationAsm.S              | 78 +++++++++++++++++++
 2 files changed, 83 insertions(+)
 create mode 100644 MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 446bc19b63..9309d2e1d5 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -3,6 +3,7 @@
 # #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR> #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> # #  SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -78,6 +79,10 @@
   AArch64/Synchronization.S     | GCC   AArch64/Synchronization.asm   | MSFT +[Sources.RISCV64]+  Synchronization.c+  RiscV64/SynchronizationAsm.S+ [Packages]   MdePkg/MdePkg.dec diff --git a/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S b/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S
new file mode 100644
index 0000000000..bac80d6871
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S
@@ -0,0 +1,78 @@
+//------------------------------------------------------------------------------+//+// RISC-V synchronization functions.+//+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>+//+// SPDX-License-Identifier: BSD-2-Clause-Patent+//+//------------------------------------------------------------------------------+#include <Base.h>++.data++.text+.align 3++.global ASM_PFX(InternalSyncCompareExchange32)+.global ASM_PFX(InternalSyncCompareExchange64)+.global ASM_PFX(InternalSyncIncrement)+.global ASM_PFX(InternalSyncDecrement)++//+// ompare and xchange a 32-bit value.+//+// @param a0 : Pointer to 32-bit value.+// @param a1 : Compare value.+// @param a2 : Exchange value.+//+ASM_PFX (InternalSyncCompareExchange32):+    lr.w  a3, (a0)        // Load the value from a0 and make+                          // the reservation of address.+    bne   a3, a1, exit+    sc.w  a3, a2, (a0)    // Write the value back to the address.+    mv    a3, a1+exit:+    mv    a0, a3+    ret++.global ASM_PFX(InternalSyncCompareExchange64)++//+// Compare and xchange a 64-bit value.+//+// @param a0 : Pointer to 64-bit value.+// @param a1 : Compare value.+// @param a2 : Exchange value.+//+ASM_PFX (SyncCompareExchange64):+    lr.d  a3, (a0)       // Load the value from a0 and make+                         // the reservation of address.+    bne   a3, a1, exit+    sc.d  a3, a2, (a0)   // Write the value back to the address.+    mv    a3, a1+exit2:+    mv    a0, a3+    ret++//+// Performs an atomic increment of an 32-bit unsigned integer.+//+// @param a0 : Pointer to 32-bit value.+//+ASM_PFX (InternalSyncIncrement):+    li  a1, 1+    amoadd.w  a2, a1, (a0)+    mv  a0, a2+    ret++//+// Performs an atomic decrement of an 32-bit unsigned integer.+//+// @param a0 : Pointer to 32-bit value.+//+ASM_PFX (InternalSyncDecrement):+    li  a1, -1+    amoadd.w  a2, a1, (a0)+    mv  a0, a2+    ret-- 
2.25.0


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