[edk2-devel] [PATCH] MdeModulePkg/PciHostBridge: Update Mem and PMem Limit Checks

[Ni, Ray]

> -----Original Message-----
> From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Wasim Khan
> Sent: Thursday, April 23, 2020 9:52 PM
> To: Ni, Ray <ray.ni at intel.com>; devel at edk2.groups.io
> Cc: ard.biesheuvel at linaro.org; Varun Sethi <V.Sethi at nxp.com>; Wu, Hao A <hao.a.wu at intel.com>
> Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridge: Update Mem and PMem Limit Checks
> 
> 
> 
> > -----Original Message-----
> > From: Ni, Ray <ray.ni at intel.com>
> > Sent: Thursday, April 23, 2020 5:07 PM
> > To: Wasim Khan <wasim.khan at nxp.com>; devel at edk2.groups.io
> > Cc: ard.biesheuvel at linaro.org; Varun Sethi <V.Sethi at nxp.com>; Wu, Hao A
> > <hao.a.wu at intel.com>
> > Subject: RE: [PATCH] MdeModulePkg/PciHostBridge: Update Mem and PMem
> > Limit Checks
> >
> > Thanks for fixing the check.
> >
> > PCI_ROOT_BRIDGE_APERTURE.Base/Limit are device address while the memory
> > space in GCD belongs to host domain.
> > So, host address for Mem/Pmem should be below 4GB while device address can
> > across 4GB.
> >
> 
> 
> Hi Ray,
> Thank you for the review.
> There are cases when we don't have PCIe host address below 4GB, and the PCIe HOST Address space is only available above
> 4GB.
> For Example, Mem: 40000000 - FFFFFFFF Translation=FFFFFF6000000000 will result in HOST Address = 0xA0FFFFFFFF . This is
> a valid use case, but below check will report ASSERT for this HOST ADDRESS.

OK. Now I remember that "Mem" reports the 32bit memory space (device address) and "MemAbove4GB" reports the 64bit memory space (device address).

Then if "Mem" reports memory range that across 4GB, it means the range above 4GB should be reported through "MemAbove4GB".


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