[edk2-devel] [PATCH v2 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.
Jason Lou
yun.lou at intel.com
Tue Dec 8 04:51:04 UTC 2020
https://bugzilla.tianocore.org/show_bug.cgi?id=3105
This new library uses a platform agnostic algorithm to get CPU
cache information. It provides user with an API(GetCpuCacheInfo)
to get detailed CPU cache information by each package, each core
type included in this package, and each cache level & type.
This library can be used by code that produces SMBIOS_TABLE_TYPE7
SMBIOS table.
Signed-off-by: Jason Lou <yun.lou at intel.com>
Cc: Ray Ni <ray.ni at intel.com>
Cc: Eric Dong <eric.dong at intel.com>
Cc: Laszlo Ersek <lersek at redhat.com>
Cc: Rahul Kumar <rahul1.kumar at intel.com>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 541 ++++++++++++++++++++
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c | 122 +++++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c | 121 +++++
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 73 +++
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni | 15 +
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 69 +++
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf | 43 ++
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
10 files changed, 1034 insertions(+)
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
new file mode 100644
index 000000000000..b13187f68f24
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
@@ -0,0 +1,541 @@
+/** @file
+ Provides cache info for each package, core type, cache level and cache type.
+
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <Register/Cpuid.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/*
+ Defines the maximum count of Deterministic Cache Parameters Leaf of all APs and BSP.
+ To save boot time, skip starting up all APs to calculate each AP's count of Deterministic
+ Cache Parameters Leaf, so use a definition instead.
+ Anyway, definition value will be checked in CpuCacheInfoCollectCoreAndCacheData function.
+*/
+#define MAX_NUM_OF_CACHE_PARAMS_LEAF 5
+
+/*
+ Defines the maximum count of Core Type of all BSP and APs in one package.
+ Core Type value comes from CPUID.1Ah.EAX[31:24].
+*/
+#define MAX_NUM_OF_CORE_TYPE 256
+
+/*
+ Defines the maximum count of packages.
+*/
+#define MAX_NUM_OF_PACKAGE 100
+
+/**
+ Get EFI_MP_SERVICES_PROTOCOL pointer.
+
+ @retval Return MP_SERVICES structure.
+**/
+MP_SERVICES
+CpuCacheInfoGetMpServices (
+ VOID
+ );
+
+/**
+ Activate all of the logical processors.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] Procedure A pointer to the function to be run on enabled logical processors.
+ @param[in] ProcedureArgument The parameter passed into Procedure for all enabled logical processors.
+**/
+VOID
+CpuCacheInfoStartupAllCPUs (
+ IN MP_SERVICES MpServices,
+ IN EFI_AP_PROCEDURE Procedure,
+ IN VOID *ProcedureArgument
+ );
+
+/**
+ Get detailed information of the requested logical processor.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] ProcessorNum The requested logical processor number.
+
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+CpuCacheInfoGetProcessorInfo (
+ IN MP_SERVICES MpServices,
+ IN UINTN ProcessorNum
+ );
+
+/**
+ Get the logical processor number.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the logical processor number.
+**/
+UINT32
+CpuCacheInfoWhoAmI (
+ IN MP_SERVICES MpServices
+ );
+
+/**
+ Get the total number of logical processors in the platform.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the total number of logical processors.
+**/
+UINT32
+CpuCacheInfoGetNumberOfProcessors (
+ IN MP_SERVICES MpServices
+ );
+
+/**
+ Print CpuCacheInfo array.
+
+ @param[in] CpuCacheInfo Pointer to the CpuCacheInfo array.
+ @param[in] CpuCacheInfoCount The length of CpuCacheInfo array.
+
+**/
+VOID
+CpuCacheInfoPrintCpuCacheInfoTable (
+ IN CPU_CACHE_INFO *CpuCacheInfo,
+ IN UINTN CpuCacheInfoCount
+ )
+{
+ UINTN Index;
+
+ DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n"));
+ DEBUG ((DEBUG_INFO, "| Index | Packge CoreType CacheLevel CacheType CacheWays CacheSizeinKB CacheCount |\n"));
+ DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n"));
+
+ for (Index = 0; Index < CpuCacheInfoCount; Index++) {
+ DEBUG ((DEBUG_INFO, "| %4x | %4x %2x %2x %2x %4x %8x %4x |\n", Index, \
+ CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, CpuCacheInfo[Index].CacheLevel, \
+ CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheWays, CpuCacheInfo[Index].CacheSizeinKB, \
+ CpuCacheInfo[Index].CacheCount));
+ }
+
+ DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n"));
+}
+
+/**
+ Get the total number of package in the platform.
+
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.
+ @param[in, out] Package Pointer to the Package array.
+
+ @retval Return the total number of package and package ID in the platform.
+**/
+UINT32
+CpuCacheInfoGetNumberOfPackage (
+ IN CPUID_CACHE_DATA *CpuidCacheData,
+ IN UINTN CpuidCacheDataCount,
+ IN OUT UINT32 *Package
+ )
+{
+ UINTN ProcessorNum;
+ UINT32 PackageIndex;
+ UINT32 PackageCount;
+ CPUID_CACHE_DATA *CurrentCpuidCacheData;
+
+ PackageCount = 0;
+
+ for (ProcessorNum = 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < CpuidCacheDataCount; ProcessorNum++) {
+ CurrentCpuidCacheData = &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF];
+
+ //
+ // For the package has already existed in Package array, break out the loop.
+ //
+ for (PackageIndex = 0; PackageIndex < PackageCount; PackageIndex++) {
+ if (CurrentCpuidCacheData->Location.Package == Package[PackageIndex]) {
+ break;
+ }
+ }
+
+ //
+ // For the new package, save it in Package array.
+ //
+ if (PackageIndex == PackageCount) {
+ ASSERT (PackageCount < MAX_NUM_OF_PACKAGE);
+ Package[PackageCount++] = CurrentCpuidCacheData->Location.Package;
+ }
+ }
+
+ return PackageCount;
+}
+
+/**
+ Get the number of CoreType of requested package.
+
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.
+ @param[in] Package The requested package number.
+
+ @retval Return the number of CoreType of requested package.
+**/
+UINT16
+CpuCacheInfoGetNumberOfCoreTypePerPackage(
+ IN CPUID_CACHE_DATA *CpuidCacheData,
+ IN UINTN CpuidCacheDataCount,
+ IN UINTN Package
+ )
+{
+ UINTN ProcessorNum;
+ UINT16 CoreTypeIndex;
+ UINT8 CoreType[MAX_NUM_OF_CORE_TYPE];
+ UINT16 CoreTypeCount;
+ CPUID_CACHE_DATA *CurrentCpuidCacheData;
+
+ //
+ // CoreType array is empty.
+ //
+ CoreTypeCount = 0;
+ ZeroMem (CoreType, sizeof (CoreType));
+
+ for (ProcessorNum = 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < CpuidCacheDataCount; ProcessorNum++) {
+ CurrentCpuidCacheData = &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF];
+
+ if (CurrentCpuidCacheData->Location.Package != Package) {
+ continue;
+ }
+
+ //
+ // For the type has already existed in CoreType array, break out the loop.
+ //
+ for (CoreTypeIndex = 0; CoreTypeIndex < CoreTypeCount; CoreTypeIndex++) {
+ if (CurrentCpuidCacheData->CoreType == CoreType[CoreTypeIndex]) {
+ break;
+ }
+ }
+
+ //
+ // For the new type, save it in CoreType array.
+ //
+ if (CoreTypeIndex == CoreTypeCount) {
+ ASSERT (CoreTypeCount < MAX_NUM_OF_CORE_TYPE);
+ CoreType[CoreTypeCount++] = CurrentCpuidCacheData->CoreType;
+ }
+ }
+
+ return CoreTypeCount;
+}
+
+/**
+ Collect core and cache information of calling processor via CPUID instructions.
+
+ @param[in] Buffer The pointer to private data buffer.
+**/
+VOID
+CpuCacheInfoCollectCoreAndCacheData (
+ IN OUT VOID *Buffer
+ )
+{
+ UINTN ProcessorNum;
+ UINT32 CpuidMaxInput;
+ UINT8 CoreType;
+ UINT8 CacheParamLeafNum;
+ CPUID_CACHE_PARAMS_EAX CacheParamEax;
+ CPUID_CACHE_PARAMS_EBX CacheParamEbx;
+ UINT32 CacheParamEcx;
+ CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX NativeModelIdAndCoreTypeEax;
+ COLLECT_CPUID_CACHE_DATA_CONTEXT *Context;
+ CPUID_CACHE_DATA *CpuidCacheData;
+
+ Context = (COLLECT_CPUID_CACHE_DATA_CONTEXT *)Buffer;
+
+ ProcessorNum = CpuCacheInfoWhoAmI (Context->MpServices);
+
+ CpuidCacheData = &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LEAF * ProcessorNum];
+
+ AsmCpuid (CPUID_SIGNATURE, &CpuidMaxInput, NULL, NULL, NULL);
+
+ //
+ // get CoreType if CPUID_HYBRID_INFORMATION leaf is supported.
+ //
+ CoreType = 0;
+ if (CpuidMaxInput >= CPUID_HYBRID_INFORMATION) {
+ AsmCpuidEx (CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_SUB_LEAF, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);
+ CoreType = (UINT8)NativeModelIdAndCoreTypeEax.Bits.CoreType;
+ }
+
+ //
+ // cache hierarchy starts with an index value of 0.
+ //
+ CacheParamLeafNum = 0;
+
+ while (CacheParamLeafNum != MAX_NUM_OF_CACHE_PARAMS_LEAF) {
+ AsmCpuidEx (CPUID_CACHE_PARAMS, CacheParamLeafNum, &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, NULL);
+
+ if (CacheParamEax.Bits.CacheType == 0) {
+ break;
+ }
+
+ CpuidCacheData[CacheParamLeafNum].CoreType = CoreType;
+ CpuidCacheData[CacheParamLeafNum].CacheLevel = (UINT8)CacheParamEax.Bits.CacheLevel;
+ CpuidCacheData[CacheParamLeafNum].CacheType = (UINT8)CacheParamEax.Bits.CacheType;
+ CpuidCacheData[CacheParamLeafNum].CacheWays = (UINT16)CacheParamEbx.Bits.Ways;
+ CpuidCacheData[CacheParamLeafNum].CacheShareBits = (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors;
+ CpuidCacheData[CacheParamLeafNum].CacheSizeinKB = ((CacheParamEbx.Bits.Ways + 1) * \
+ (CacheParamEbx.Bits.LinePartitions + 1) * (CacheParamEbx.Bits.LineSize + 1) * (CacheParamEcx + 1)) / SIZE_1KB;
+
+ ASSERT (CacheParamLeafNum != MAX_NUM_OF_CACHE_PARAMS_LEAF);
+ CacheParamLeafNum++;
+ }
+}
+
+/**
+ Collect processor location information of all logical processors via MpServices.
+
+ @param[in] Context The pointer to COLLECT_CPUID_CACHE_DATA_CONTEXT structure.
+ @param[in] NumberOfProcessor The total number of logical processors in the platform.
+
+**/
+VOID
+CpuCacheInfoCollectProcessorLocationData (
+ IN COLLECT_CPUID_CACHE_DATA_CONTEXT *Context,
+ IN UINTN NumberOfProcessor
+ )
+{
+ UINTN ProcessorNum;
+ UINTN CacheParamLeafNum;
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;
+ IN CPUID_CACHE_DATA *CpuidCacheData;
+
+ for (ProcessorNum = 0; ProcessorNum < NumberOfProcessor; ProcessorNum++) {
+ CpuidCacheData = &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LEAF * ProcessorNum];
+ ProcessorInfo = CpuCacheInfoGetProcessorInfo (Context->MpServices, ProcessorNum);
+
+ for (CacheParamLeafNum = 0; CacheParamLeafNum < MAX_NUM_OF_CACHE_PARAMS_LEAF; CacheParamLeafNum++) {
+ CpuidCacheData[CacheParamLeafNum].Location.Package = ProcessorInfo.Location.Package;
+ CpuidCacheData[CacheParamLeafNum].Location.Core = ProcessorInfo.Location.Core;
+ CpuidCacheData[CacheParamLeafNum].Location.Thread = ProcessorInfo.Location.Thread;
+ CpuidCacheData[CacheParamLeafNum].ApicId = (UINT32)ProcessorInfo.ProcessorId;
+ }
+ }
+}
+
+/**
+ Collect CpuCacheInfo data from the CpuidCacheData.
+
+ @param[in] CpuidCacheData Pointer to the CpuidCacheData array.
+ @param[in] CpuidCacheDataCount The length of CpuidCacheData array.
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.
+ @param[in, out] CpuCacheInfoCount As input, point to the length of response CpuCacheInfo array.
+ As output, point to the actual length of response CpuCacheInfo array.
+
+ @retval EFI_SUCCESS Function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be allocated.
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+ array. CpuCacheInfoCount has been updated with the length needed
+ to complete the request.
+**/
+EFI_STATUS
+CpuCacheInfoCollectCpuCacheInfoData (
+ IN CPUID_CACHE_DATA *CpuidCacheData,
+ IN UINTN CpuidCacheDataCount,
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,
+ IN OUT UINTN *CpuCacheInfoCount
+ )
+{
+ EFI_STATUS Status;
+ UINT32 NumberOfPackage;
+ UINTN PackageIndex;
+ UINT16 NumberOfCoreType;
+ UINTN TotalNumberOfCoreType;
+ CPU_CACHE_INFO *TempCpuCacheInfo;
+ UINTN TempCacheInfoIndex;
+ UINTN TempCacheInfoCount;
+ UINTN CurrentCacheDataIndex;
+ UINTN NextCacheDataIndex;
+ UINTN CacheInfoIndex;
+ UINTN ValidCacheInfoCount;
+ UINT32 Package[MAX_NUM_OF_PACKAGE];
+
+ //
+ // Get number of Packages and Package ID.
+ //
+ ZeroMem (Package, sizeof (Package));
+ NumberOfPackage = CpuCacheInfoGetNumberOfPackage (CpuidCacheData, CpuidCacheDataCount, Package);
+
+ //
+ // Get number of core types for each package and count the total number.
+ // E.g. If Packege1 and Package2 both have 2 core types, the total number is 4.
+ //
+ TotalNumberOfCoreType = 0;
+
+ for (PackageIndex = 0; PackageIndex < NumberOfPackage; PackageIndex++) {
+ NumberOfCoreType = CpuCacheInfoGetNumberOfCoreTypePerPackage (CpuidCacheData, CpuidCacheDataCount, Package[PackageIndex]);
+ TotalNumberOfCoreType += NumberOfCoreType;
+ }
+
+ TempCacheInfoCount = TotalNumberOfCoreType * MAX_NUM_OF_CACHE_PARAMS_LEAF;
+ TempCpuCacheInfo = AllocatePages (EFI_SIZE_TO_PAGES (TempCacheInfoCount * sizeof (*TempCpuCacheInfo)));
+ ASSERT (TempCpuCacheInfo != NULL);
+ if (TempCpuCacheInfo == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ ZeroMem (TempCpuCacheInfo, TempCacheInfoCount * sizeof (*TempCpuCacheInfo));
+
+ //
+ // TempCpuCacheInfo is empty.
+ //
+ ValidCacheInfoCount = 0;
+
+ for (CurrentCacheDataIndex = 0; CurrentCacheDataIndex < CpuidCacheDataCount; CurrentCacheDataIndex++) {
+ if (CpuidCacheData[CurrentCacheDataIndex].CacheSizeinKB == 0)
+ continue;
+
+ //
+ // For the sharing caches, clear their CacheSize.
+ //
+ for (NextCacheDataIndex = CurrentCacheDataIndex + 1; NextCacheDataIndex < CpuidCacheDataCount; NextCacheDataIndex++) {
+ if (CpuidCacheData[NextCacheDataIndex].CacheSizeinKB == 0)
+ continue;
+
+ if (CpuidCacheData[CurrentCacheDataIndex].Location.Package == CpuidCacheData[NextCacheDataIndex].Location.Package && \
+ CpuidCacheData[CurrentCacheDataIndex].CoreType == CpuidCacheData[NextCacheDataIndex].CoreType && \
+ CpuidCacheData[CurrentCacheDataIndex].CacheLevel == CpuidCacheData[NextCacheDataIndex].CacheLevel && \
+ CpuidCacheData[CurrentCacheDataIndex].CacheType == CpuidCacheData[NextCacheDataIndex].CacheType && \
+ (CpuidCacheData[CurrentCacheDataIndex].ApicId & ~CpuidCacheData[CurrentCacheDataIndex].CacheShareBits) == \
+ (CpuidCacheData[NextCacheDataIndex].ApicId & ~CpuidCacheData[NextCacheDataIndex].CacheShareBits)) {
+ CpuidCacheData[NextCacheDataIndex].CacheSizeinKB = 0; // uses the sharing cache
+ }
+ }
+
+ //
+ // For the cache has already existed in TempCpuCacheInfo buffer, increase its CacheCount.
+ //
+ for (TempCacheInfoIndex = 0; TempCacheInfoIndex < ValidCacheInfoCount; TempCacheInfoIndex++) {
+ if (CpuidCacheData[CurrentCacheDataIndex].Location.Package == TempCpuCacheInfo[TempCacheInfoIndex].Package && \
+ CpuidCacheData[CurrentCacheDataIndex].CoreType == TempCpuCacheInfo[TempCacheInfoIndex].CoreType && \
+ CpuidCacheData[CurrentCacheDataIndex].CacheLevel == TempCpuCacheInfo[TempCacheInfoIndex].CacheLevel && \
+ CpuidCacheData[CurrentCacheDataIndex].CacheType == TempCpuCacheInfo[TempCacheInfoIndex].CacheType) {
+ TempCpuCacheInfo[TempCacheInfoIndex].CacheCount++;
+ break;
+ }
+ }
+
+ //
+ // For the new cache with different Package, CoreType, CacheLevel or CacheType, copy its
+ // data into TempCpuCacheInfo buffer.
+ //
+ if (TempCacheInfoIndex == ValidCacheInfoCount) {
+ ASSERT (ValidCacheInfoCount < TempCacheInfoCount);
+
+ TempCpuCacheInfo[ValidCacheInfoCount].Package = CpuidCacheData[CurrentCacheDataIndex].Location.Package;
+ TempCpuCacheInfo[ValidCacheInfoCount].CoreType = CpuidCacheData[CurrentCacheDataIndex].CoreType;
+ TempCpuCacheInfo[ValidCacheInfoCount].CacheLevel = CpuidCacheData[CurrentCacheDataIndex].CacheLevel;
+ TempCpuCacheInfo[ValidCacheInfoCount].CacheType = CpuidCacheData[CurrentCacheDataIndex].CacheType;
+ TempCpuCacheInfo[ValidCacheInfoCount].CacheWays = CpuidCacheData[CurrentCacheDataIndex].CacheWays;
+ TempCpuCacheInfo[ValidCacheInfoCount].CacheSizeinKB = CpuidCacheData[CurrentCacheDataIndex].CacheSizeinKB;
+ TempCpuCacheInfo[ValidCacheInfoCount].CacheCount = 1;
+
+ ValidCacheInfoCount++;
+ }
+ }
+
+ if (*CpuCacheInfoCount < ValidCacheInfoCount) {
+ Status = EFI_BUFFER_TOO_SMALL;
+ } else {
+ Status = EFI_SUCCESS;
+
+ for (CacheInfoIndex = 0; CacheInfoIndex < ValidCacheInfoCount; CacheInfoIndex++) {
+ CopyMem (&CpuCacheInfo[CacheInfoIndex], &TempCpuCacheInfo[CacheInfoIndex], sizeof (*CpuCacheInfo));
+ }
+
+ DEBUG_CODE (
+ CpuCacheInfoPrintCpuCacheInfoTable (CpuCacheInfo, ValidCacheInfoCount);
+ );
+ }
+
+ *CpuCacheInfoCount = ValidCacheInfoCount;
+
+ FreePages (TempCpuCacheInfo, EFI_SIZE_TO_PAGES (TempCacheInfoCount * sizeof (*TempCpuCacheInfo)));
+
+ return Status;
+}
+
+/**
+ Get CpuCacheInfo data array.
+
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.
+ @param[in, out] CpuCacheInfoCount As input, point to the length of response CpuCacheInfo array.
+ As output, point to the actual length of response CpuCacheInfo array.
+
+ @retval EFI_SUCCESS Function completed successfully.
+ @retval EFI_INVALID_PARAMETER CpuCacheInfoCount is NULL.
+ @retval EFI_INVALID_PARAMETER CpuCacheInfo is NULL while CpuCacheInfoCount contains the value
+ greater than zero.
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be allocated.
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+ array. CpuCacheInfoCount has been updated with the length needed
+ to complete the request.
+**/
+EFI_STATUS
+EFIAPI
+GetCpuCacheInfo (
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,
+ IN OUT UINTN *CpuCacheInfoCount
+ )
+{
+ EFI_STATUS Status;
+ UINT32 NumberOfProcessor;
+ UINTN CpuidCacheDataCount;
+ COLLECT_CPUID_CACHE_DATA_CONTEXT Context;
+
+ if (CpuCacheInfoCount == NULL) {
+ return EFI_INVALID_PARAMETER;
+
+ } else if (*CpuCacheInfoCount != 0 && CpuCacheInfo == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.MpServices.
+ //
+ Context.MpServices = CpuCacheInfoGetMpServices ();
+
+ NumberOfProcessor = CpuCacheInfoGetNumberOfProcessors (Context.MpServices);
+
+ //
+ // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.CpuidCacheData.
+ // CpuidCacheData array consists of CPUID_CACHE_DATA data structure for each Cpuid Cache Parameter Leaf
+ // per logical processor. The array begin with data of each Cache Parameter Leaf of processor 0, followed
+ // by data of each Cache Parameter Leaf of processor 1 ...
+ //
+ CpuidCacheDataCount = NumberOfProcessor * MAX_NUM_OF_CACHE_PARAMS_LEAF;
+ Context.CpuidCacheData = AllocatePages (EFI_SIZE_TO_PAGES (CpuidCacheDataCount * sizeof (*Context.CpuidCacheData)));
+ ASSERT (Context.CpuidCacheData != NULL);
+ if (Context.CpuidCacheData == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ ZeroMem (Context.CpuidCacheData, CpuidCacheDataCount * sizeof (*Context.CpuidCacheData));
+
+ //
+ // Wakeup all processors for CpuidCacheData(core and cache data) collection.
+ //
+ CpuCacheInfoStartupAllCPUs (Context.MpServices, CpuCacheInfoCollectCoreAndCacheData, &Context);
+
+ //
+ // Collect CpuidCacheData(ProcessorLocation data) of all processors.
+ //
+ CpuCacheInfoCollectProcessorLocationData (&Context, NumberOfProcessor);
+
+ //
+ // Collect CpuCacheInfo data from CpuidCacheData.
+ //
+ Status = CpuCacheInfoCollectCpuCacheInfoData (Context.CpuidCacheData, CpuidCacheDataCount, CpuCacheInfo, CpuCacheInfoCount);
+
+ FreePages (Context.CpuidCacheData, EFI_SIZE_TO_PAGES (CpuidCacheDataCount * sizeof (*Context.CpuidCacheData)));
+
+ return Status;
+}
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
new file mode 100644
index 000000000000..8d2e75614588
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
@@ -0,0 +1,122 @@
+/** @file
+ Provides cache info for each package, core type, cache level and cache type.
+
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/**
+ Get EFI_MP_SERVICES_PROTOCOL pointer.
+
+ @retval Return MP_SERVICES structure.
+**/
+MP_SERVICES
+CpuCacheInfoGetMpServices (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ MP_SERVICES MpServices;
+
+ Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpServices.Protocol);
+ ASSERT_EFI_ERROR (Status);
+
+ return MpServices;
+}
+
+/**
+ Activate all of the logical processors.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] Procedure A pointer to the function to be run on enabled logical processors.
+ @param[in] ProcedureArgument The parameter passed into Procedure for all enabled logical processors.
+**/
+VOID
+CpuCacheInfoStartupAllCPUs (
+ IN MP_SERVICES MpServices,
+ IN EFI_AP_PROCEDURE Procedure,
+ IN VOID *ProcedureArgument
+ )
+{
+ EFI_STATUS Status;
+
+ Status = MpServices.Protocol->StartupAllAPs (MpServices.Protocol, Procedure, TRUE, NULL, 0, ProcedureArgument, NULL);
+ ASSERT_EFI_ERROR (Status);
+
+ Procedure (ProcedureArgument);
+}
+
+/**
+ Get detailed information of the requested logical processor.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] ProcessorNum The requested logical processor number.
+
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+CpuCacheInfoGetProcessorInfo (
+ IN MP_SERVICES MpServices,
+ IN UINTN ProcessorNum
+
+ )
+{
+ EFI_STATUS Status;
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;
+
+ Status = MpServices.Protocol->GetProcessorInfo (MpServices.Protocol, ProcessorNum, &ProcessorInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ return ProcessorInfo;
+}
+
+/**
+ Get the logical processor number.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the logical processor number.
+**/
+UINT32
+CpuCacheInfoWhoAmI (
+ IN MP_SERVICES MpServices
+ )
+{
+ EFI_STATUS Status;
+ UINTN ProcessorNum;
+
+ Status = MpServices.Protocol->WhoAmI (MpServices.Protocol, &ProcessorNum);
+ ASSERT_EFI_ERROR (Status);
+
+ return (UINT32)ProcessorNum;
+}
+
+/**
+ Get the total number of logical processors in the platform.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the total number of logical processors.
+**/
+UINT32
+CpuCacheInfoGetNumberOfProcessors (
+ IN MP_SERVICES MpServices
+ )
+{
+ EFI_STATUS Status;
+ UINTN NumberOfProcessor;
+ UINTN NumberOfEnabledProcessor;
+
+ Status = MpServices.Protocol->GetNumberOfProcessors (MpServices.Protocol, &NumberOfProcessor, &NumberOfEnabledProcessor);
+ ASSERT_EFI_ERROR (Status);
+
+ return (UINT32)NumberOfProcessor;
+}
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
new file mode 100644
index 000000000000..9d793a840686
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
@@ -0,0 +1,121 @@
+/** @file
+ Provides cache info for each package, core type, cache level and cache type.
+
+ Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/**
+ Get EDKII_PEI_MP_SERVICES2_PPI pointer.
+
+ @retval Return MP_SERVICES structure.
+**/
+MP_SERVICES
+CpuCacheInfoGetMpServices (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ MP_SERVICES MpServices;
+
+ Status = PeiServicesLocatePpi (&gEdkiiPeiMpServices2PpiGuid, 0, NULL, (VOID **)&MpServices.Ppi);
+ ASSERT_EFI_ERROR (Status);
+
+ return MpServices;
+}
+
+/**
+ Activate all of the logical processors.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] Procedure A pointer to the function to be run on enabled logical processors.
+ @param[in] ProcedureArgument The parameter passed into Procedure for all enabled logical processors.
+**/
+VOID
+CpuCacheInfoStartupAllCPUs (
+ IN MP_SERVICES MpServices,
+ IN EFI_AP_PROCEDURE Procedure,
+ IN VOID *ProcedureArgument
+ )
+{
+ EFI_STATUS Status;
+
+ Status = MpServices.Ppi->StartupAllCPUs (MpServices.Ppi, Procedure, 0, ProcedureArgument);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Get detailed information of the requested logical processor.
+
+ @param[in] MpServices MP_SERVICES structure.
+ @param[in] ProcessorNum The requested logical processor number.
+
+ @retval Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+CpuCacheInfoGetProcessorInfo (
+ IN MP_SERVICES MpServices,
+ IN UINTN ProcessorNum
+
+ )
+{
+ EFI_STATUS Status;
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;
+
+ Status = MpServices.Ppi->GetProcessorInfo (MpServices.Ppi, ProcessorNum, &ProcessorInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ return ProcessorInfo;
+}
+
+/**
+ Get the logical processor number.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the logical processor number.
+**/
+UINT32
+CpuCacheInfoWhoAmI (
+ IN MP_SERVICES MpServices
+ )
+{
+ EFI_STATUS Status;
+ UINTN ProcessorNum;
+
+ Status = MpServices.Ppi->WhoAmI (MpServices.Ppi, &ProcessorNum);
+ ASSERT_EFI_ERROR (Status);
+
+ return (UINT32)ProcessorNum;
+}
+
+/**
+ Get the total number of logical processors in the platform.
+
+ @param[in] MpServices MP_SERVICES structure.
+
+ @retval Return the total number of logical processors.
+**/
+UINT32
+CpuCacheInfoGetNumberOfProcessors (
+ IN MP_SERVICES MpServices
+ )
+{
+ EFI_STATUS Status;
+ UINTN NumberOfProcessor;
+ UINTN NumberOfEnabledProcessor;
+
+ Status = MpServices.Ppi->GetNumberOfProcessors (MpServices.Ppi, &NumberOfProcessor, &NumberOfEnabledProcessor);
+ ASSERT_EFI_ERROR (Status);
+
+ return (UINT32)NumberOfProcessor;
+}
diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
new file mode 100644
index 000000000000..d478211da609
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
@@ -0,0 +1,73 @@
+/** @file
+ Header file for CPU Cache info Library.
+
+ Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _CPU_CACHE_INFO_LIB_H_
+#define _CPU_CACHE_INFO_LIB_H_
+
+typedef struct {
+ //
+ // Package number.
+ //
+ UINT32 Package;
+ //
+ // Core type of logical processor.
+ // Value = CPUID.1Ah:EAX[31:24]
+ //
+ UINT8 CoreType;
+ //
+ // Level of the cache that this package's this type of logical processor corresponds to.
+ // Value = CPUID.04h:EAX[07:05]
+ //
+ UINT8 CacheLevel : 3;
+ //
+ // Type of the cache that this package's this type of logical processor corresponds to.
+ // Value = CPUID.04h:EAX[04:00]
+ //
+ UINT8 CacheType : 5;
+ //
+ // Ways of associativity.
+ // Value = CPUID.04h:EBX[31:22]
+ //
+ UINT16 CacheWays;
+ //
+ // Size of single cache that this package's this type of logical processor corresponds to.
+ // Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) * /
+ // (CPUID.04h:EBX[11:00] + 1) * (CPUID.04h:ECX[31:00] + 1)
+ //
+ UINT32 CacheSizeinKB;
+ //
+ // Number of the cache that this package's this type of logical processor corresponds to.
+ // Have subtracted the number of caches that are shared.
+ //
+ UINT16 CacheCount;
+} CPU_CACHE_INFO;
+
+/**
+ Get CpuCacheInfo data array.
+
+ @param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.
+ @param[in, out] CpuCacheInfoCount As input, point to the length of response CpuCacheInfo array.
+ As output, point to the actual length of response CpuCacheInfo array.
+
+ @retval EFI_SUCCESS Function completed successfully.
+ @retval EFI_INVALID_PARAMETER CpuCacheInfoCount is NULL.
+ @retval EFI_INVALID_PARAMETER CpuCacheInfo is NULL while CpuCacheInfoCount contains the value
+ greater than zero.
+ @retval EFI_OUT_OF_RESOURCES Required resources could not be allocated.
+ @retval EFI_BUFFER_TOO_SMALL CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+ array. CpuCacheInfoCount has been updated with the length needed
+ to complete the request.
+**/
+EFI_STATUS
+EFIAPI
+GetCpuCacheInfo (
+ IN OUT CPU_CACHE_INFO *CpuCacheInfo,
+ IN OUT UINTN *CpuCacheInfoCount
+ );
+
+#endif
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
new file mode 100644
index 000000000000..1bc801f15f84
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
@@ -0,0 +1,15 @@
+// /** @file
+// CPU Cache Info Library
+//
+// Provides cache info for each package, core type, cache level and cache type.
+//
+// Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Cache Info Library"
+
+#string STR_MODULE_DESCRIPTION #language en-US "Provides cache info for each package, core type, cache level and cache type."
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..c481080e49d8
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+# CPU Cache Info Library instance for DXE driver.
+#
+# Provides cache info for each package, core type, cache level and cache type.
+#
+# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeCpuCacheInfoLib
+ FILE_GUID = B25C288F-C309-41F1-8325-37E64DC5EA3D
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CpuCacheInfoLib|DXE_DRIVER UEFI_APPLICATION
+ MODULE_UNI_FILE = CpuCacheInfoLib.uni
+
+[Sources]
+ InternalCpuCacheInfoLib.h
+ CpuCacheInfoLib.c
+ DxeCpuCacheInfoLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ BaseMemoryLib
+ MemoryAllocationLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gEfiMpServiceProtocolGuid
+
+[Pcd]
+
+[Depex]
+ gEfiMpServiceProtocolGuid
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
new file mode 100644
index 000000000000..2136ce1ccef7
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
@@ -0,0 +1,69 @@
+/** @file
+ Internal header file for CPU Cache info Library.
+
+ Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _INTERNAL_CPU_CACHE_INFO_LIB_H_
+#define _INTERNAL_CPU_CACHE_INFO_LIB_H_
+
+#include <PiPei.h>
+#include <Ppi/MpServices2.h>
+#include <Protocol/MpService.h>
+
+typedef struct {
+ //
+ // APIC ID.
+ //
+ UINT32 ApicId;
+ //
+ // Processor location information.
+ // The information comes from MP Services.
+ //
+ EFI_CPU_PHYSICAL_LOCATION Location;
+ //
+ // Core type of logical processor.
+ // Value = CPUID.1Ah:EAX[31:24]
+ //
+ UINT8 CoreType;
+ //
+ // Level of the cache.
+ // Value = CPUID.04h:EAX[07:05]
+ //
+ UINT8 CacheLevel : 3;
+ //
+ // Type of the cache.
+ // Value = CPUID.04h:EAX[04:00]
+ //
+ UINT8 CacheType : 5;
+ //
+ // Ways of associativity.
+ // Value = CPUID.04h:EBX[31:22]
+ //
+ UINT16 CacheWays;
+ //
+ // Cache share bits.
+ // Value = CPUID.04h:EAX[25:14]
+ //
+ UINT16 CacheShareBits;
+ //
+ // Size of single cache.
+ // Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) * /
+ // (CPUID.04h:EBX[11:00] + 1) * (CPUID.04h:ECX[31:00] + 1)
+ //
+ UINT32 CacheSizeinKB;
+} CPUID_CACHE_DATA;
+
+typedef union {
+ EDKII_PEI_MP_SERVICES2_PPI *Ppi;
+ EFI_MP_SERVICES_PROTOCOL *Protocol;
+} MP_SERVICES;
+
+typedef struct {
+ MP_SERVICES MpServices;
+ CPUID_CACHE_DATA *CpuidCacheData;
+} COLLECT_CPUID_CACHE_DATA_CONTEXT;
+
+#endif
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..0c73015cac8b
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+# CPU Cache Info Library instance for PEI module.
+#
+# Provides cache info for each package, core type, cache level and cache type.
+#
+# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiCpuCacheInfoLib
+ FILE_GUID = CFEE2DBE-53B2-4916-84CA-0BA83C3DDA6E
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CpuCacheInfoLib|PEIM
+ MODULE_UNI_FILE = CpuCacheInfoLib.uni
+
+[Sources]
+ InternalCpuCacheInfoLib.h
+ CpuCacheInfoLib.c
+ PeiCpuCacheInfoLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ BaseMemoryLib
+ MemoryAllocationLib
+ PeiServicesTablePointerLib
+
+[Ppis]
+ gEdkiiPeiMpServices2PpiGuid
+
+[Pcd]
+
+[Depex]
+ gEdkiiPeiMpServices2PpiGuid
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index d83c084467b3..a639ce5412e4 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -56,6 +56,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
## @libraryclass Provides function to support VMGEXIT processing.
VmgExitLib|Include/Library/VmgExitLib.h
+ ## @libraryclass Provides function to get CPU cache information.
+ CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
+
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index b2b6d78a71b0..5834eafaa200 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -75,6 +75,7 @@ [LibraryClasses.common.PEIM]
LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
+ CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
[LibraryClasses.IA32.PEIM, LibraryClasses.X64.PEIM]
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
@@ -86,6 +87,7 @@ [LibraryClasses.common.DXE_DRIVER]
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.inf
+ CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
[LibraryClasses.common.DXE_SMM_DRIVER]
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
@@ -109,6 +111,8 @@ [Components]
UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
+ UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
+ UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
[Components.IA32, Components.X64]
UefiCpuPkg/CpuDxe/CpuDxe.inf
--
2.28.0.windows.1
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