[edk2-devel] [PATCH v4 09/10] ArmPkg: Add definition of the maximum cache level in ARMv8-A

[Sami Mujawar]

Hi Rebecca,

This patch looks good to me.

Reviewed-by: Sami Mujawar <sami.mujawar at arm.com>

Regards,

Sami Mujawar

-----Original Message-----
From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Rebecca Cran via groups.io
Sent: 07 December 2020 05:54 PM
To: devel at edk2.groups.io
Cc: Rebecca Cran <rebecca at nuviainc.com>; Michael D Kinney <michael.d.kinney at intel.com>; Liming Gao <gaoliming at byosoft.com.cn>; Zhiguang Liu <zhiguang.liu at intel.com>; Leif Lindholm <leif at nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel at arm.com>
Subject: [edk2-devel] [PATCH v4 09/10] ArmPkg: Add definition of the maximum cache level in ARMv8-A

The ARM Architecture Reference Manual for ARMv8-A defines up to
seven levels of cache, L1 through L7.
Define MAX_ARM_CACHE_LEVEL to be 7.

Signed-off-by: Rebecca Cran <rebecca at nuviainc.com>
---
 ArmPkg/Include/Library/ArmLib.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 87c3a6f1ecac..4e26991727cb 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -108,6 +108,10 @@ typedef enum {
 #define GET_MPID(ClusterId, CoreId)   (((ClusterId) << 8) | (CoreId))
 #define PRIMARY_CORE_ID       (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
 
+// The ARM Architecture Reference Manual for ARMv8-A defines up
+// to 7 levels of cache, L1 through L7.
+#define MAX_ARM_CACHE_LEVEL   7
+
 UINTN
 EFIAPI
 ArmDataCacheLineLength (
-- 
2.26.2








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