[edk2-devel] [PATCH 1/2] IntelFsp2Pkg/GenCfgOpt.py: Coverity scan flags issues.
Philippe Mathieu-Daudé
philmd at redhat.com
Mon Feb 10 08:36:06 UTC 2020
On 2/10/20 4:53 AM, Chiu, Chasel wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1706
>
> Issue was: invalid_operation: Invalid operation on
> null-like value "Base".
> Fixed it by initializing Base to 0 before entering
> while loop.
>
> Test:
> Compared script output before and after this patch and
> the result is identical.
>
> Cc: Maurice Ma <maurice.ma at intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
> Cc: Star Zeng <star.zeng at intel.com>
> Signed-off-by: Chasel Chiu <chasel.chiu at intel.com>
> ---
> IntelFsp2Pkg/Tools/GenCfgOpt.py | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> index 2fa7582d85..d1d6901bc3 100644
> --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> @@ -1,6 +1,6 @@
> ## @ GenCfgOpt.py
> #
> -# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> ##
> @@ -439,6 +439,7 @@ EndList
>
> MaxAlign = 32 #Default align to 32, but if there are 64 bit unit, align to 64
> SizeAlign = 0 #record the struct max align
> + Base = 0 #Starting offset of sub-structure.
Are you sure this has to be initialized only once before the while
statement, and not within the 'Check VPD/UPD' leaf?
> while len(DscLines):
> DscLine = DscLines.pop(0).strip()
> Handle = False
>
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