[edk2-devel] [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR

Aditya Angadi aditya.angadi at arm.com
Thu Mar 12 14:35:19 UTC 2020


RD-Daniel Config-XLR is a platform in which four identical chips are connected
via a high speed CCIX link. Add Madt and Dsdt tables for the same.

Signed-off-by: Aditya Angadi <aditya.angadi at arm.com>
---
 .../SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125 +++++++++++++++
 .../AcpiTables/RdDanielCfgXlr/Madt.aslc       | 150 ++++++++++++++++++
 .../AcpiTables/RdDanielCfgXlrAcpiTables.inf   |  63 ++++++++
 Platform/ARM/SgiPkg/SgiPlatform.dec           |   1 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc           |   1 +
 Platform/ARM/SgiPkg/SgiPlatform.fdf           |   1 +
 6 files changed, 341 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
new file mode 100644
index 0000000000..23ada55ec4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
@@ -0,0 +1,125 @@
+/** @file
+*  Differentiated System Description Table Fields (DSDT)
+*
+*  Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+                 EFI_ACPI_ARM_OEM_REVISION) {
+  Scope (_SB) {
+
+    Device (CP00) { // Zeus core 0
+      Name (_HID, "ACPI0007")
+      Name (_UID, 0)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP01) { // Zeus core 1
+      Name (_HID, "ACPI0007")
+      Name (_UID, 1)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP02) { // Zeus core 2
+      Name (_HID, "ACPI0007")
+      Name (_UID, 2)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP03) { // Zeus core 3
+      Name (_HID, "ACPI0007")
+      Name (_UID, 3)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP04) { // Zeus core 4
+      Name (_HID, "ACPI0007")
+      Name (_UID, 4)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP05) { // Zeus core 5
+      Name (_HID, "ACPI0007")
+      Name (_UID, 5)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP06) { // Zeus core 6
+      Name (_HID, "ACPI0007")
+      Name (_UID, 6)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP07) { // Zeus core 7
+      Name (_HID, "ACPI0007")
+      Name (_UID, 7)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP08) { // Zeus core 8
+      Name (_HID, "ACPI0007")
+      Name (_UID, 8)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP09) { // Zeus core 9
+      Name (_HID, "ACPI0007")
+      Name (_UID, 9)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP10) { // Zeus core 10
+      Name (_HID, "ACPI0007")
+      Name (_UID, 10)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP11) { // Zeus core 11
+      Name (_HID, "ACPI0007")
+      Name (_UID, 11)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP12) { // Zeus core 12
+      Name (_HID, "ACPI0007")
+      Name (_UID, 12)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP13) { // Zeus core 13
+      Name (_HID, "ACPI0007")
+      Name (_UID, 13)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP14) { // Zeus core 14
+      Name (_HID, "ACPI0007")
+      Name (_UID, 14)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP15) { // Zeus core 15
+      Name (_HID, "ACPI0007")
+      Name (_UID, 15)
+      Name (_STA, 0xF)
+    }
+
+    Device (CP16) { // Zeus core 16
+      Name (_HID, "ACPI0007")
+      Name (_UID, 16)
+      Name (_STA, 0xF)
+    }
+  } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
new file mode 100644
index 0000000000..e3784b55f2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
@@ -0,0 +1,150 @@
+/** @file
+*  Multiple APIC Description Table (MADT)
+*
+*  Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CLUSTER_COUNT                 4
+#define CORES_PER_CLUSTER             1
+#define CORE_COUNT                    (CLUSTER_COUNT * CORES_PER_CLUSTER)
+#define CHIP_COUNT                    4
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER  Header;
+  EFI_ACPI_6_2_GIC_STRUCTURE                           GicInterfaces[CORE_COUNT * CHIP_COUNT];
+  EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE               GicDistributor;
+  EFI_ACPI_6_2_GICR_STRUCTURE                          GicRedistributor[CHIP_COUNT];
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+    ),
+    // MADT specific fields
+    0, // LocalApicAddress
+    0  // Flags
+  },
+  {
+    // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+    //                                          PmuIrq, GicBase, GicVBase,
+    //                                          GicHBase, GsivId, GicRBase,
+    //                                          Efficiency)
+    // Note: The GIC Structure of the primary CPU must be the first entry
+    // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+    //Chip 0
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+      0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+      0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+      0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+    // Chip 1
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+      0, 0, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+      0, 1, GET_MPID(0x01000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+      0, 2, GET_MPID(0x01000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+      0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+    // Chip 2
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+      0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+      0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+      0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+      0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+    // Chip 3
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+      0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+      0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+      0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+      0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+  },
+  // GIC Distributor Entry
+  EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+                                    0, 3),
+  {
+    // GIC Redistributor
+    EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(0),
+                                        SIZE_16MB),
+    EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(1),
+                                        SIZE_16MB),
+    EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(2),
+                                        SIZE_16MB),
+    EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(3),
+                                        SIZE_16MB)
+  }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
new file mode 100644
index 0000000000..6a5f77b91f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
@@ -0,0 +1,63 @@
+## @file
+#  ACPI table data and ASL sources required to boot the platform.
+#
+#  Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = RdDanielCfgXlrAcpiTables
+  FILE_GUID                      = 42d46c2e-b6ad-4a37-bb8d-c8acc350ac2b
+  MODULE_TYPE                    = USER_DEFINED
+  VERSION_STRING                 = 1.0
+
+[Sources]
+  Dbg2.aslc
+  SsdtRos.asl
+  Fadt.aslc
+  Gtdt.aslc
+  Iort.aslc
+  Mcfg.aslc
+  RdDanielCfgXlr/Dsdt.asl
+  RdDanielCfgXlr/Madt.aslc
+  Spcr.aslc
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+  gArmTokenSpaceGuid.PcdPciBusMin
+  gArmTokenSpaceGuid.PcdPciBusMax
+
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+  gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+  gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+  gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index a89bf26365..b2fc8d9b79 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -31,6 +31,7 @@
   gRdN1EdgeX2AcpiTablesFileGuid = { 0x82a34150, 0x0fc6, 0x45f4, { 0x8e, 0xa0, 0xf0, 0xa4, 0x66, 0x0c, 0xf3, 0x5d } }
   gRdE1EdgeAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } }
   gRdDanielCfgMAcpiTablesFileGuid = { 0x163132b3, 0x8ec1, 0x48f7, {0xb4, 0xd1, 0x49, 0x30, 0x6c, 0x3f, 0x4d, 0x51} }
+  gRdDanielCfgXlrAcpiTablesFileGuid = { 0x42d46c2e, 0xb6ad, 0x4a37, {0xbb, 0x8d, 0xc8, 0xac, 0xc3, 0x50, 0xac, 0x2b }}
 
 [PcdsFeatureFlag.common]
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 74fe1a4533..80d1bf773b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -257,6 +257,7 @@
   Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
   Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
   Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+  Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
   #
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 48192917e2..351c2dc9b4 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -104,6 +104,7 @@ READ_LOCK_STATUS   = TRUE
   INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
   INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
   INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+  INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
   # Required by PCI
-- 
2.17.1


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