[edk2-devel] [PATCH edk2-platforms 08/16] Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows

[Ard Biesheuvel]

On 5/22/20 1:02 AM, Wasim Khan wrote:
> From: Wasim Khan <wasim.khan at nxp.com>
> 
> Dump ATU windows for PCIe Layerscape controller if PcdPciDebug
> is enabled.
> 
> Signed-off-by: Wasim Khan <wasim.khan at nxp.com>
> ---
>   .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 42 ++++++++++++++++++++++
>   1 file changed, 42 insertions(+)
> 
> diff --git a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
> index 1de20c621dc0..3ad526218bcf 100644
> --- a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
> +++ b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
> @@ -297,6 +297,44 @@ PcieOutboundSet (
>   }
>   
>   /**
> +  Dump PCIe Layerscape ATU
> +
> +  @param Pcie     Address of PCIe host controller.
> +**/
> +VOID LsDumpAtu (
> +  IN EFI_PHYSICAL_ADDRESS Pcie
> +  )
> +{
> +  UINT32 Cnt;
> +  for (Cnt = 0; Cnt <= IATU_REGION_INDEX7; Cnt++) {
> +    MmioWrite32 ((UINTN)Pcie + IATU_VIEWPORT_OFF,
> +                  (UINT32)(IATU_VIEWPORT_OUTBOUND | Cnt));
> +
> +    DEBUG ((DEBUG_INFO, "iATU%d:\n",Cnt));
> +    DEBUG ((DEBUG_INFO, "\tLOWER PHYS 0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tUPPER PHYS 0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tLOWER BUS 0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tUPPER BUS 0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tLIMIT     0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_LIMIT_ADDR_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tCR1       0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_REGION_CTRL_1_OFF_OUTBOUND_0)));
> +
> +    DEBUG ((DEBUG_INFO, "\tCR2       0x%08x\n",
> +            MmioRead32 ((UINTN)Pcie + IATU_REGION_CTRL_2_OFF_OUTBOUND_0)));
> +  }
> +}
> +
> +/**
>     Function to set-up iATU windows for Layerscape PCIe controller
>   
>     @param Pcie      Address of PCIe host controller
> @@ -410,6 +448,10 @@ PcieLsSetupAtu (
>       SEG_IO_BUS,
>       SEG_IO_SIZE
>       );
> +
> +  if (FixedPcdGetBool (PcdPciDebug) == TRUE) {
> +    LsDumpAtu (Pcie);
> +  }
>   }
>   
>   /*

We already have DEBUG vs RELEASE builds, and various debug levels. 
Please don't add your own DEBUG PCDs on top of that. Instead, if you 
need code to only be executed in DEBUG builds (like the MmioWrite() 
above), use DEBUG_CODE_BEGIN/END


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