[edk2-devel] [PATCH v2 1/5] OvmfPkg: Handle Cloud Hypervisor host bridge
sebastien.boeuf at intel.com
sebastien.boeuf at intel.com
Sat Dec 4 22:51:56 UTC 2021
From: Sebastien Boeuf <sebastien.boeuf at intel.com>
Handle things differently when the detected host bridge matches the
Cloud Hypervisor PCI host bridge identifier.
Signed-off-by: Rob Bradford <robert.bradford at intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf at intel.com>
---
OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c | 1 +
OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c | 1 +
OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h | 1 +
OvmfPkg/Include/IndustryStandard/CloudHv.h | 35 +++++++++++++++++++
OvmfPkg/Include/OvmfPlatforms.h | 1 +
.../Library/AcpiTimerLib/BaseAcpiTimerLib.c | 3 ++
.../AcpiTimerLib/BaseRomAcpiTimerLib.c | 4 +++
.../Library/AcpiTimerLib/DxeAcpiTimerLib.c | 3 ++
.../PlatformBootManagerLib/BdsPlatform.c | 1 +
.../ResetSystemLib/BaseResetShutdown.c | 3 ++
.../Library/ResetSystemLib/DxeResetShutdown.c | 13 +++++--
OvmfPkg/PlatformPei/MemDetect.c | 9 ++++-
OvmfPkg/PlatformPei/Platform.c | 6 ++++
13 files changed, 78 insertions(+), 3 deletions(-)
create mode 100644 OvmfPkg/Include/IndustryStandard/CloudHv.h
diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c
index 97ca21945f..0cd4f903cf 100644
--- a/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.c
@@ -189,6 +189,7 @@ LegacyInterruptInstall (
mLegacyInterruptDevice = LEGACY_INT_DEV_PIIX4;
break;
case INTEL_Q35_MCH_DEVICE_ID:
+ case CLOUDHV_DEVICE_ID:
mLegacyInterruptDevice = LEGACY_INT_DEV_Q35;
break;
default:
diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
index fe9ae27c9d..ce6134cfad 100644
--- a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
@@ -474,6 +474,7 @@ LegacyRegionInit (
mRegisterValues = mRegisterValues440;
break;
case INTEL_Q35_MCH_DEVICE_ID:
+ case CLOUDHV_DEVICE_ID:
mRegisterValues = mRegisterValuesQ35;
break;
default:
diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h
index e18cb97949..71df8f5fb2 100644
--- a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.h
@@ -17,6 +17,7 @@
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <IndustryStandard/I440FxPiix4.h>
+#include <IndustryStandard/CloudHv.h>
#include <Library/PciLib.h>
#include <Library/PcdLib.h>
diff --git a/OvmfPkg/Include/IndustryStandard/CloudHv.h b/OvmfPkg/Include/IndustryStandard/CloudHv.h
new file mode 100644
index 0000000000..6ab18ad50d
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/CloudHv.h
@@ -0,0 +1,35 @@
+/** @file
+ Various defines related to Cloud Hypervisor
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef __CLOUDHV_H__
+#define __CLOUDHV_H__
+
+//
+// Host Bridge Device ID
+//
+#define CLOUDHV_DEVICE_ID 0x0d57
+
+//
+// ACPI timer address
+//
+#define CLOUDHV_ACPI_TIMER_IO_ADDRESS 0xb008
+
+//
+// ACPI shutdown device address
+//
+#define CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS 0x03c0
+
+//
+// 32-bit MMIO memory hole base address
+//
+#define CLOUDHV_MMIO_HOLE_ADDRESS 0xc0000000
+
+//
+// 32-bit MMIO memory hole size
+//
+#define CLOUDHV_MMIO_HOLE_SIZE 0x38000000
+
+#endif // __CLOUDHV_H__
diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h
index 3b85593b70..ad0b0d2803 100644
--- a/OvmfPkg/Include/OvmfPlatforms.h
+++ b/OvmfPkg/Include/OvmfPlatforms.h
@@ -16,6 +16,7 @@
#include <IndustryStandard/I440FxPiix4.h>
#include <IndustryStandard/Bhyve.h>
#include <IndustryStandard/Microvm.h>
+#include <IndustryStandard/CloudHv.h>
//
// OVMF Host Bridge DID Address
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
index 7c593e8be1..e182ac2b7d 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
@@ -55,6 +55,9 @@ AcpiTimerLibConstructor (
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
+ return RETURN_SUCCESS;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
index 52f3ea2dbf..a223153b2b 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
@@ -53,6 +53,8 @@ AcpiTimerLibConstructor (
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
+ case CLOUDHV_DEVICE_ID:
+ return RETURN_SUCCESS;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
@@ -107,6 +109,8 @@ InternalAcpiGetTimerTick (
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
+ case CLOUDHV_DEVICE_ID:
+ return IoRead32 (CLOUDHV_ACPI_TIMER_IO_ADDRESS);
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
diff --git a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
index 09076c0ade..3c9efb926f 100644
--- a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
@@ -50,6 +50,9 @@ AcpiTimerLibConstructor (
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
+ return RETURN_SUCCESS;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
index 186401296a..50bfb45351 100644
--- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
+++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
@@ -1282,6 +1282,7 @@ PciAcpiInitialization (
PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H
break;
case MICROVM_PSEUDO_DEVICE_ID:
+ case CLOUDHV_DEVICE_ID:
return;
default:
if (XenDetected ()) {
diff --git a/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c b/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c
index 21c80e4323..ba92299a3c 100644
--- a/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c
+++ b/OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c
@@ -40,6 +40,9 @@ ResetShutdown (
case INTEL_Q35_MCH_DEVICE_ID:
AcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
+ case CLOUDHV_DEVICE_ID:
+ IoWrite8 (CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS, 5 << 2 | 1 << 5);
+ CpuDeadLoop ();
default:
ASSERT (FALSE);
CpuDeadLoop ();
diff --git a/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c b/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c
index 5a75c32df3..8df52dbc21 100644
--- a/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c
+++ b/OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c
@@ -16,6 +16,7 @@
#include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
STATIC UINT16 mAcpiPmBaseAddress;
+STATIC UINT16 mAcpiHwReducedSleepCtl;
EFI_STATUS
EFIAPI
@@ -26,6 +27,7 @@ DxeResetInit (
{
UINT16 HostBridgeDevId;
+ mAcpiPmBaseAddress = 0;
HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
@@ -34,6 +36,9 @@ DxeResetInit (
case INTEL_Q35_MCH_DEVICE_ID:
mAcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
+ case CLOUDHV_DEVICE_ID:
+ mAcpiHwReducedSleepCtl = CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS;
+ break;
default:
ASSERT (FALSE);
CpuDeadLoop ();
@@ -56,7 +61,11 @@ ResetShutdown (
VOID
)
{
- IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
- IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
+ if (mAcpiPmBaseAddress == 0) {
+ IoWrite8 (mAcpiHwReducedSleepCtl, 5 << 2 | 1 << 5);
+ } else {
+ IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
+ IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
+ }
CpuDeadLoop ();
}
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index d736b85e0d..38f8141a2c 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -16,6 +16,7 @@ Module Name:
#include <IndustryStandard/E820.h>
#include <IndustryStandard/I440FxPiix4.h>
#include <IndustryStandard/Q35MchIch9.h>
+#include <IndustryStandard/CloudHv.h>
#include <PiPei.h>
#include <Register/Intel/SmramSaveStateMap.h>
@@ -152,6 +153,12 @@ QemuUc32BaseInitialization (
return;
}
+ if (mHostBridgeDevId == CLOUDHV_DEVICE_ID) {
+ Uc32Size = CLOUDHV_MMIO_HOLE_SIZE;
+ mQemuUc32Base = CLOUDHV_MMIO_HOLE_ADDRESS;
+ return;
+ }
+
ASSERT (mHostBridgeDevId == INTEL_82441_DEVICE_ID);
//
// On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one
@@ -775,7 +782,7 @@ QemuInitializeRam (
// practically any alignment, and we may not have enough variable MTRRs to
// cover it exactly.
//
- if (IsMtrrSupported ()) {
+ if (IsMtrrSupported () && mHostBridgeDevId != CLOUDHV_DEVICE_ID) {
MtrrGetAllMtrrs (&MtrrSettings);
//
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index df2d9ad015..272cab7bcc 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -372,6 +372,12 @@ MiscInitialization (
MICROVM_PSEUDO_DEVICE_ID);
ASSERT_RETURN_ERROR (PcdStatus);
return;
+ case CLOUDHV_DEVICE_ID:
+ DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor host bridge\n", __FUNCTION__));
+ PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId,
+ CLOUDHV_DEVICE_ID);
+ ASSERT_RETURN_ERROR (PcdStatus);
+ return;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, mHostBridgeDevId));
--
2.30.2
---------------------------------------------------------------------
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris,
92196 Meudon Cedex, France
Registration Number: 302 456 199 R.C.S. NANTERRE
Capital: 4,572,000 Euros
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#84351): https://edk2.groups.io/g/devel/message/84351
Mute This Topic: https://groups.io/mt/87508375/1813853
Group Owner: devel+owner at edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [edk2-devel-archive at redhat.com]
-=-=-=-=-=-=-=-=-=-=-=-
More information about the edk2-devel-archive
mailing list