[edk2-devel] [PATCH 38/40] TigerlakeSiliconPkg/Fru: Add Fru DSC files
Nate DeSimone
nathaniel.l.desimone at intel.com
Thu Feb 4 03:56:45 UTC 2021
Reviewed-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
> -----Original Message-----
> From: Luo, Heng <heng.luo at intel.com>
> Sent: Sunday, January 31, 2021 5:37 PM
> To: devel at edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty at intel.com>; Desimone,
> Nathaniel L <nathaniel.l.desimone at intel.com>
> Subject: [PATCH 38/40] TigerlakeSiliconPkg/Fru: Add Fru DSC files
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
>
> Adds the following DSC files:
> * Fru/TglCpu
> * Fru/TglPch
>
> Cc: Sai Chaganty <rangasai.v.chaganty at intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
> Signed-off-by: Heng Luo <heng.luo at intel.com>
> ---
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc | 11
> +++++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc | 9 +++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc | 20
> ++++++++++++++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc | 8 ++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc | 7 +++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc | 30
> ++++++++++++++++++++++++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc | 9 +++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc | 13
> +++++++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc | 8 ++++++++
> Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc | 10 ++++++++++
> 10 files changed, 125 insertions(+)
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc
> new file mode 100644
> index 0000000000..99ee0eccac
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc
> @@ -0,0 +1,11 @@
> +## @file
>
> +# Component description file for the TigerLake CPU Common FRU libraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +VtdInfoLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/Library/PeiDxeSmmVt
> dInfoLib/PeiDxeSmmVtdInfoLib.inf
>
> +CpuPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/CpuPcieRp/Library/PeiD
> xeSmmCpuPcieRpLib/PeiDxeSmmCpuPcieRpLib.inf
>
> +CpuPcieInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/TglCpu/CpuPcieRp/Libr
> ary/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc
> new file mode 100644
> index 0000000000..874e4cbaad
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Dxe.dsc
> @@ -0,0 +1,9 @@
> +## @file
>
> +# Component description file for the Tigerlake CPU DXE FRU drivers.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc
> new file mode 100644
> index 0000000000..5c72c2ac61
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/DxeLib.dsc
> @@ -0,0 +1,20 @@
> +## @file
>
> +# Component description file for the Tigerlake CPU DXE FRU libraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +DxeGraphicsPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/Librar
> yPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.inf
>
> +DxeGraphicsInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/LibraryPr
> ivate/DxeGraphicsInitLib/DxeGraphicsInitLib.inf
>
> +DxeIgdOpRegionInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Graphics/Libra
> ryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInitLib.inf
>
> +DxeVtdInitLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/LibraryPrivate/Dxe
> VtdInitLib/DxeVtdInitLib.inf
>
> +DxeVtdPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Vtd/LibraryPrivate/D
> xeVtdPolicyLib/DxeVtdPolicyLib.inf
>
> +DxeVtdInitFruLib|$(PLATFORM_SI_PACKAGE)/Fru/TglCpu/Vtd/LibraryPriva
> te/DxeVtdInitLib/DxeVtdInitFruLib.inf
>
> +
>
> +
>
> +#
>
> +# CPU PCIe IpBlock
>
> +#
>
> +DxeCpuPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/CpuPcieRp/LibraryP
> rivate/DxeCpuPcieRpLib/DxeCpuPcieRpLib.inf
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc
> new file mode 100644
> index 0000000000..de8288364a
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Pei.dsc
> @@ -0,0 +1,8 @@
> +## @file
>
> +# Component description file for the Tigerlake CPU PEI FRU drivers.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc
> new file mode 100644
> index 0000000000..5355ecb288
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/PeiLib.dsc
> @@ -0,0 +1,7 @@
> +## @file
>
> +# Component description file for the Tigerlake CPU PEI FRU ibraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc
> new file mode 100644
> index 0000000000..b7ba1f752c
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/CommonLib.dsc
> @@ -0,0 +1,30 @@
> +## @file
>
> +# Component description file for the Tigerlake PCH Common FRU libraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +
> PsfLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Psf/LibraryPrivate/PsfLib/PeiDxe
> SmmPsfLibVer2.inf
>
> +
> PchPcrLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/Library/PeiDxeSmmPch
> PcrLib/PeiDxeSmmPchPcrLib.inf
>
> +
> PchSbiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/P
> eiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
>
> +
> GbeMdiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gbe/LibraryPrivate/PeiDxe
> SmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf
>
> +
> GbeLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gbe/Library/PeiDxeSmmGbeLi
> b/PeiDxeSmmGbeLib.inf
>
> +
> EspiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Espi/Library/PeiDxeSmmEspiLib
> /PeiDxeSmmEspiLib.inf
>
> +
> PmcLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/Library/PeiDxeSmmPmcLi
> b/PeiDxeSmmPmcLib.inf
>
> +
> PmcPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPrivate/PeiD
> xeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf
>
> +
> PmcPrivateLibWithS3|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPriva
> te/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibWithS3.inf
>
> +
> SpiCommonLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/Base
> SpiCommonLib/BaseSpiCommonLib.inf
>
> +
> GpioLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/PeiDxeSmmGpio
> Lib/PeiDxeSmmGpioLib.inf
>
> +
> GpioPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Pei
> DxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLibVer2.inf
>
> +
> GpioCheckConflictLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/Bas
> eGpioCheckConflictLib/BaseGpioCheckConflictLib.inf
>
> +
> PchDmiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivate/PeiD
> xeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf
>
> +
> PchDmiWithS3Lib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivat
> e/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiWithS3Lib.inf
>
> +
> SataLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Sata/Library/PeiDxeSmmSataLi
> b/PeiDxeSmmSataLibVer2.inf
>
> +
> SpiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/Library/PeiDxeSmmSp
> iAccessLib/PeiDxeSmmSpiAccessLib.inf
>
> +
> SpiAccessPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/
> PeiDxeSmmSpiAccessPrivateLib/PeiDxeSmmSpiAccessPrivateLib.inf
>
> +
> PchPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/PeiDxeSm
> mPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf
>
> +
> PcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryPrivate/PcieCli
> entRpLib/PcieClientRpLib.inf
>
> +
> PciExpressHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryPri
> vate/PciExpressHelpersLibrary/PeiDxeSmmPciExpressHelpersLib.inf
>
> +
> BasePcieHelperLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/Base
> PcieHelperLib/BasePcieHelperLib.inf
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc
> new file mode 100644
> index 0000000000..9fefc6b4c9
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Dxe.dsc
> @@ -0,0 +1,9 @@
> +## @file
>
> +# Component description file for the Tigerlake PCH DXE FRU drivers.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/Smm/SpiSmm.inf
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc
> new file mode 100644
> index 0000000000..e9be448baa
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/DxeLib.dsc
> @@ -0,0 +1,13 @@
> +## @file
>
> +# Component description file for the Tigerlake PCH DXE FRU libraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
> DxeHdaNhltLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Hda/Library/DxeHdaNh
> ltLib/DxeHdaNhltLib.inf
>
> +
> DxeHdaPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Hda/LibraryPrivate/Dx
> eHdaPolicyLib/DxeHdaPolicyLib.inf
>
> +
> GpioHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Ba
> seGpioHelpersLibNull/BaseGpioHelpersLibNull.inf
>
> +
> GpioNameBufferLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivat
> e/DxeGpioNameBufferLib/DxeGpioNameBufferLib.inf
>
> +
> DxeGpioPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/
> DxeGpioPolicyLib/DxeGpioPolicyLib.inf
>
> +
> DxePchPcieRpPolicyLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/LibraryP
> rivate/DxePchPcieRpPolicyLib/DxePchPcieRpPolicyLib.inf
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc
> new file mode 100644
> index 0000000000..2eacbe905c
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Pei.dsc
> @@ -0,0 +1,8 @@
> +## @file
>
> +# Component description file for the Tigerlake PCH PEI FRU drivers.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc
> b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc
> new file mode 100644
> index 0000000000..d8e6313084
> --- /dev/null
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/PeiLib.dsc
> @@ -0,0 +1,10 @@
> +## @file
>
> +# Component description file for the Tigerlake PCH PEI FRU libraries.
>
> +#
>
> +# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +
> GpioHelpersLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/Pe
> iGpioHelpersLib/PeiGpioHelpersLib.inf
>
> +
> GpioNameBufferLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivat
> e/PeiGpioNameBufferLib/PeiGpioNameBufferLib.inf
>
> --
> 2.24.0.windows.2
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