[edk2-devel] [PATCH v2 5/6] MdePkg: Remove the macro definitions regarding Opcode.
Jason Lou
yun.lou at intel.com
Mon Jan 10 15:12:52 UTC 2022
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790
Remove the macro definitions regarding Opcode because new version of
NASM tool(e.g. v2.15.05) supports the corresponding instructions.
Note: This patch need to be merged after other NASM code change to avoid
compilation errors.
Signed-off-by: Jason Lou <yun.lou at intel.com>
Cc: Michael D Kinney <michael.d.kinney at intel.com>
Cc: Liming Gao <gaoliming at byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu at intel.com>
---
MdePkg/Include/Ia32/Nasm.inc | 26 +-------------------
MdePkg/Include/X64/Nasm.inc | 26 +-------------------
2 files changed, 2 insertions(+), 50 deletions(-)
diff --git a/MdePkg/Include/Ia32/Nasm.inc b/MdePkg/Include/Ia32/Nasm.inc
index c794d9ece3..e92c032bd8 100644
--- a/MdePkg/Include/Ia32/Nasm.inc
+++ b/MdePkg/Include/Ia32/Nasm.inc
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
@@ -9,30 +9,6 @@
;
;------------------------------------------------------------------------------
-%macro SAVEPREVSSP 0
- DB 0xF3, 0x0F, 0x01, 0xEA
-%endmacro
-
-%macro CLRSSBSY_EAX 0
- DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
-%endmacro
-
-%macro RSTORSSP_EAX 0
- DB 0x67, 0xF3, 0x0F, 0x01, 0x28
-%endmacro
-
-%macro SETSSBSY 0
- DB 0xF3, 0x0F, 0x01, 0xE8
-%endmacro
-
-%macro READSSP_EAX 0
- DB 0xF3, 0x0F, 0x1E, 0xC8
-%endmacro
-
-%macro INCSSP_EAX 0
- DB 0xF3, 0x0F, 0xAE, 0xE8
-%endmacro
-
; NASM provides built-in macros STRUC and ENDSTRUC for structure definition.
; For example, to define a structure called mytype containing a longword,
; a word, a byte and a string of bytes, you might code
diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc
index cfb14edc94..bb77ca6c32 100644
--- a/MdePkg/Include/X64/Nasm.inc
+++ b/MdePkg/Include/X64/Nasm.inc
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
-; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
@@ -9,30 +9,6 @@
;
;------------------------------------------------------------------------------
-%macro SAVEPREVSSP 0
- DB 0xF3, 0x0F, 0x01, 0xEA
-%endmacro
-
-%macro CLRSSBSY_RAX 0
- DB 0xF3, 0x0F, 0xAE, 0x30
-%endmacro
-
-%macro RSTORSSP_RAX 0
- DB 0xF3, 0x0F, 0x01, 0x28
-%endmacro
-
-%macro SETSSBSY 0
- DB 0xF3, 0x0F, 0x01, 0xE8
-%endmacro
-
-%macro READSSP_RAX 0
- DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8
-%endmacro
-
-%macro INCSSP_RAX 0
- DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
-%endmacro
-
;
; Macro for the PVALIDATE instruction, defined in AMD APM volume 3.
; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392753
--
2.28.0.windows.1
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