[edk2-devel] [edk2-platforms] [PATCH V1 2/4] WhiskeylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT

[Michael Kubacki]

Reviewed-by: Michael Kubacki <michael.kubacki at microsoft.com>

On 6/6/2022 6:50 PM, Nate DeSimone wrote:
> Set the location of the DUTY_CYCLE field in the P_CNT register
> and indicate the width of the clock duty cycle to OS power management
> 
> Cc: Chasel Chiu <chasel.chiu at intel.com>
> Cc: Ankit Sinha <ankit.sinha at intel.com>
> Cc: Michael Kubacki <michael.kubacki at microsoft.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
> ---
>   .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 9 ++++++++-
>   .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc                  | 9 ++++++++-
>   2 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> index 84d4ec1331..8f3cc6ba28 100644
> --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the UpXtreme board.
>   #
> -# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -259,6 +259,13 @@
>     gSiPkgTokenSpaceGuid.PcdSerialIoUartNumber|2
>     gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################
> diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> index 4a7ba4d5f0..4a5d5ef03b 100644
> --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the WhiskeylakeURvp board.
>   #
> -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -242,6 +242,13 @@
>     ######################################
>     gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################


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