[edk2-devel] [PATCH edk2-platforms v1 2/3] Platform/ARM: FVP: Specify TRBE interrupt in MADT GICC
Jeshua Smith via groups.io
jeshuas=nvidia.com at groups.io
Wed Aug 2 21:48:29 UTC 2023
This code depends on ArmReadIdAA64Dfr0(), which as far as I can tell is not present in the EDK2 repo or the patch series mentioned in your 0/3 message.
-----Original Message-----
From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Jeshua Smith via groups.io
Sent: Tuesday, August 1, 2023 9:38 AM
To: devel at edk2.groups.io; sami.mujawar at arm.com
Cc: ardb+tianocore at kernel.org; thomas.abraham at arm.com; Pierre.gondois at arm.com; Anshuman.Khandual at arm.com; Matteo.Carlini at arm.com; Akanksha.Jain2 at arm.com; Sibel.Allinson at arm.com; nd at arm.com
Subject: Re: [edk2-devel] [PATCH edk2-platforms v1 2/3] Platform/ARM: FVP: Specify TRBE interrupt in MADT GICC
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This comment in the code looks wrong:
+ // TRBE Interrupt is PPI 13 on FVP model.
+ TrbeInterrupt = 31;
-----Original Message-----
From: devel at edk2.groups.io <devel at edk2.groups.io> On Behalf Of Sami Mujawar via groups.io
Sent: Tuesday, July 25, 2023 4:31 AM
To: devel at edk2.groups.io
Cc: Sami Mujawar <sami.mujawar at arm.com>; ardb+tianocore at kernel.org; thomas.abraham at arm.com; Pierre.gondois at arm.com; Anshuman.Khandual at arm.com; Matteo.Carlini at arm.com; Akanksha.Jain2 at arm.com; Sibel.Allinson at arm.com; nd at arm.com
Subject: [edk2-devel] [PATCH edk2-platforms v1 2/3] Platform/ARM: FVP: Specify TRBE interrupt in MADT GICC
External email: Use caution opening links or attachments
When TRBE is enabled the FVP model uses the PPI 15 (i.e. INT ID 31) as the TRBE interrupt.
Ref: https://www.kernel.org/doc/Documentation/
devicetree/bindings/arm/arm,trace-buffer-extension.yaml
Therefore, check the debug feature register ID_AA64DFR0_EL1.TraceBuffer field to see if TRBE is enabled and configure the TRBE interrupt in the GICC structure in the MADT ACPI table.
Note: To enable TRBE support in the FVP REvC model 1. Build TF-A with the CTX_INCLUDE_AARCH32_REGS=0
build flag set, otherwise this results in an
exception when booting TF-A.
2. Set the model parameters to enable TRBE
-C cluster0.has_trbe=1 -C cluster1.has_trbe=1
Signed-off-by: Sami Mujawar <sami.mujawar at arm.com>
---
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 39 ++++++++++++++++----
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 3 +-
2 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index 4df2d6cdae58df344804a8b41208a3adb8ee0110..03393905be1c627b7cdbaa0efed33e920072c8cb 100644
--- a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
+++ Dxe/ConfigurationManager.c
@@ -1,7 +1,7 @@
/** @file
Configuration Manager Dxe
- Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -15,6 +15,7 @@
#include <IndustryStandard/IoRemappingTable.h>
#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
#include <Library/ArmLib.h>
+#include <Library/ArmLib/AArch64/AArch64Lib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
@@ -37,8 +38,8 @@ EDKII_PLATFORM_REPOSITORY_INFO VExpressPlatRepositoryInfo = {
{
// FADT Table
{
- EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdFadt),
NULL
},
@@ -51,8 +52,8 @@ EDKII_PLATFORM_REPOSITORY_INFO VExpressPlatRepositoryInfo = {
},
// MADT Table
{
- EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
CREATE_STD_ACPI_TABLE_GEN_ID (EStdAcpiTableIdMadt),
NULL
},
@@ -109,15 +110,15 @@ EDKII_PLATFORM_REPOSITORY_INFO VExpressPlatRepositoryInfo = {
},
// Boot architecture information
- { EFI_ACPI_6_3_ARM_PSCI_COMPLIANT }, // BootArchFlags
+ { EFI_ACPI_6_5_ARM_PSCI_COMPLIANT }, // BootArchFlags
#ifdef HEADLESS_PLATFORM
// Fixed feature flag information
- { EFI_ACPI_6_3_HEADLESS }, // Fixed feature flags
+ { EFI_ACPI_6_5_HEADLESS }, // Fixed feature flags
#endif
// Power management profile information
- { EFI_ACPI_6_3_PM_PROFILE_ENTERPRISE_SERVER }, // PowerManagement Profile
+ { EFI_ACPI_6_5_PM_PROFILE_ENTERPRISE_SERVER }, // PowerManagement Profile
/* GIC CPU Interface information
GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency) @@ -474,6 +475,9 @@ InitializePlatformRepository (
)
{
EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+ UINT64 DbgFeatures;
+ UINTN Index;
+ UINT16 TrbeInterrupt;
PlatformRepo = This->PlatRepoInfo;
@@ -491,6 +495,25 @@ InitializePlatformRepository (
PlatformRepo->GicCInfo[6].MPIDR = GET_MPID_MT (1, 2, 0);
PlatformRepo->GicCInfo[7].MPIDR = GET_MPID_MT (1, 3, 0);
}
+
+ TrbeInterrupt = 0;
+ DbgFeatures = ArmReadIdAA64Dfr0 ();
+ DEBUG ((
+ DEBUG_INFO,
+ "Debug Feature Register 0 - ID_AA64DFR0_EL1 = 0x%lx\n",
+ DbgFeatures
+ ));
+
+ // The ID_AA64DFR0_EL1.TraceBuffer field identifies support for FEAT_TRBE.
+ if (((DbgFeatures >> 44) & 0xF) != 0) {
+ // TRBE Interrupt is PPI 13 on FVP model.
+ TrbeInterrupt = 31;
+ }
+
+ for (Index = 0; Index < PLAT_CPU_COUNT; Index++) {
+ PlatformRepo->GicCInfo[Index].TrbeInterrupt = TrbeInterrupt; }
+
return EFI_SUCCESS;
}
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
index b53daf51d4b1afd45e41d0debb0b9f084f135f6a..dd08f8597768d4de62941c5fd74e329c431582b0 100644
--- a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
+++ Dxe/ConfigurationManagerDxe.inf
@@ -1,7 +1,7 @@
## @file
# Configuration Manager Dxe
#
-# Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>
+# Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent ## @@ -34,6 +34,7 @@ [Packages]
Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
[LibraryClasses]
+ ArmLib
ArmPlatformLib
PrintLib
UefiBootServicesTableLib
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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