[edk2-devel] [PATCH v2 2/3] ArmPkg/CpuDxe: Unify PageAttributeToGcdAttribute helper

Ard Biesheuvel ardb at kernel.org
Thu Feb 2 11:27:21 UTC 2023


In preparation for introducing an implementation of the EFI memory
attributes protocol that is shared between ARM and AArch64, unify the
existing code that converts a page table descriptor into a
EFI_MEMORY_xxx bitfield, so it can be called from the generic code.

Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
---
 ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c |  5 +--
 ArmPkg/Drivers/CpuDxe/Arm/Mmu.c     | 46 +++++++++++---------
 ArmPkg/Drivers/CpuDxe/CpuDxe.h      |  5 +++
 3 files changed, 32 insertions(+), 24 deletions(-)

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 8bb33046e707..4ec9fc0a582c 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -30,13 +30,12 @@ GetRootTranslationTableInfo (
   *RootTableEntryCount = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
 }
 
-STATIC
 UINT64
 PageAttributeToGcdAttribute (
-  IN UINT64  PageAttributes
+  IN UINTN  PageAttributes
   )
 {
-  UINT64  GcdAttributes;
+  UINTN  GcdAttributes;
 
   switch (PageAttributes & TT_ATTR_INDX_MASK) {
     case TT_ATTR_INDX_DEVICE_MEMORY:
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 2daf47ba6fe5..9545a1c1d2d3 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -77,39 +77,46 @@ SectionToGcdAttributes (
   return EFI_SUCCESS;
 }
 
-EFI_STATUS
-PageToGcdAttributes (
-  IN  UINT32  PageAttributes,
-  OUT UINT64  *GcdAttributes
+UINT64
+PageAttributeToGcdAttribute (
+  IN UINTN  PageAttributes
   )
 {
-  *GcdAttributes = 0;
+  UINT64 GcdAttributes;
 
   // determine cacheability attributes
   switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
-      *GcdAttributes |= EFI_MEMORY_UC;
+      GcdAttributes = EFI_MEMORY_UC;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:
-      *GcdAttributes |= EFI_MEMORY_UC;
+      GcdAttributes = EFI_MEMORY_UC;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
-      *GcdAttributes |= EFI_MEMORY_WT;
+      GcdAttributes = EFI_MEMORY_WT;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
-      *GcdAttributes |= EFI_MEMORY_WB;
+      GcdAttributes = EFI_MEMORY_WB;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:
-      *GcdAttributes |= EFI_MEMORY_WC;
+      GcdAttributes = EFI_MEMORY_WC;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:
-      *GcdAttributes |= EFI_MEMORY_WB;
+      GcdAttributes = EFI_MEMORY_WB;
       break;
     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:
-      *GcdAttributes |= EFI_MEMORY_UC;
+      GcdAttributes = EFI_MEMORY_UC;
       break;
     default:
-      return EFI_UNSUPPORTED;
+      DEBUG ((
+        DEBUG_ERROR,
+        "PageAttributeToGcdAttribute: PageAttributes:0x%X not supported.\n",
+        PageAttributes
+        ));
+      ASSERT (0);
+      // The Global Coherency Domain (GCD) value is defined as a bit set.
+      // Returning 0 means no attribute has been set.
+      GcdAttributes = 0;
   }
 
   // determine protection attributes
@@ -126,7 +133,7 @@ PageToGcdAttributes (
     // read only cases map to write-protect
     case TT_DESCRIPTOR_PAGE_AP_RO_NO:
     case TT_DESCRIPTOR_PAGE_AP_RO_RO:
-      *GcdAttributes |= EFI_MEMORY_RO;
+      GcdAttributes |= EFI_MEMORY_RO;
       break;
 
     default:
@@ -135,10 +142,10 @@ PageToGcdAttributes (
 
   // now process eXectue Never attribute
   if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {
-    *GcdAttributes |= EFI_MEMORY_XP;
+    GcdAttributes |= EFI_MEMORY_XP;
   }
 
-  return EFI_SUCCESS;
+  return GcdAttributes;
 }
 
 EFI_STATUS
@@ -152,7 +159,6 @@ SyncCacheConfigPage (
   IN OUT UINT32                           *NextSectionAttributes
   )
 {
-  EFI_STATUS                     Status;
   UINT32                         i;
   volatile ARM_PAGE_TABLE_ENTRY  *SecondLevelTable;
   UINT32                         NextPageAttributes;
@@ -183,8 +189,7 @@ SyncCacheConfigPage (
         NextPageAttributes = PageAttributes;
       } else if (PageAttributes != NextPageAttributes) {
         // Convert Section Attributes into GCD Attributes
-        Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
-        ASSERT_EFI_ERROR (Status);
+        GcdAttributes = PageAttributeToGcdAttribute (NextPageAttributes);
 
         // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
@@ -196,8 +201,7 @@ SyncCacheConfigPage (
       }
     } else if (NextPageAttributes != 0) {
       // Convert Page Attributes into GCD Attributes
-      Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
-      ASSERT_EFI_ERROR (Status);
+      GcdAttributes = PageAttributeToGcdAttribute (NextPageAttributes);
 
       // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
       SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
index ff672390ce51..8933fa90c4ed 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
@@ -126,4 +126,9 @@ SetGcdMemorySpaceAttributes (
   IN UINT64                           Attributes
   );
 
+UINT64
+PageAttributeToGcdAttribute (
+  IN UINTN  PageAttributes
+  );
+
 #endif // CPU_DXE_H_
-- 
2.39.0



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