[edk2-devel] [PATCH v2] IntelFsp2Pkg: Fix NASM X64 build warnings.

Chiu, Chasel chasel.chiu at intel.com
Wed Mar 22 00:17:55 UTC 2023


Hello,

Thanks for all the feedbacks and suggestions from everybody! I have sent V3 patch accordingly, please help to review again: https://edk2.groups.io/g/devel/message/101526

Thanks,
Chasel


> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone at intel.com>
> Sent: Tuesday, March 21, 2023 4:05 PM
> To: Pedro Falcato <pedro.falcato at gmail.com>; devel at edk2.groups.io; Ni, Ray
> <ray.ni at intel.com>
> Cc: Chiu, Chasel <chasel.chiu at intel.com>; Zeng, Star <star.zeng at intel.com>
> Subject: RE: [edk2-devel] [PATCH v2] IntelFsp2Pkg: Fix NASM X64 build warnings.
> 
> Reviewing this code in more detail... I think clearing the upper 32-bits is a bug.
> These functions are supposed to return pointers, and since this is X64 code those
> pointers could be anywhere in address space. The fact that the FSP is in XIP NEM,
> which on current Intel platforms just happens to be mapped <4GB does not
> mean that this pointer will always be 4GB. Therefore, I believe the correct
> course of action is to delete the AND/MOV instructions in question.
> 
> Thanks,
> Nate
> 
> -----Original Message-----
> From: Pedro Falcato <pedro.falcato at gmail.com>
> Sent: Monday, March 20, 2023 12:31 AM
> To: devel at edk2.groups.io; Ni, Ray <ray.ni at intel.com>
> Cc: Chiu, Chasel <chasel.chiu at intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone at intel.com>; Zeng, Star <star.zeng at intel.com>
> Subject: Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: Fix NASM X64 build warnings.
> 
> On Mon, Mar 20, 2023 at 6:03 AM Ni, Ray <ray.ni at intel.com> wrote:
> >
> > >  ASM_PFX(FspInfoHeaderRelativeOff):
> > >
> > >     DD    0x12345678               ; This value must be patched by the build script
> > >
> > > -   and   rax, 0xffffffff
> > >
> > > +   mov   eax, eax                 ; equal to and rax, 0xFFFFFFFF
> >
> > Based on the discussion, we know "mov eax, eax" clears upper 32bits of RAX.
> > But this code looks very confusing. Is there any other instruction that can do
> the same thing?
> 
> Hi Ray,
> 
> Any instruction that writes to the lower 32-bits should zero the upper bits.
> (Pardon my AT&T syntax, just reverse the operands for Intel syntax)
> 
> and $0xffffffff,%eax gets you a 3 byte opcode (since imm8 is signed, you only
> need 0xff as the immediate) and %eax, %eax gets you 2 bytes mov %eax, %eax
> gets you 2 bytes
> 
> even something silly like adding 0 to EAX should work. But in a pure
> efficiency+size POV, the last 2 instructions should be optimal.
> 
> --
> Pedro


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