<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"><head><meta http-equiv=Content-Type content="text/html; charset=gb2312"><meta name=Generator content="Microsoft Word 15 (filtered medium)"><style></style></head><body lang=ZH-CN link=blue vlink=purple style='word-wrap:break-word'><div class=WordSection1>Seemly, Edk2\ArmVirtPkg\Library\QemuFwCfgLib\QemuFwCfgLib.inf is not arch specific library. It can also be used in RISCV64. <o:p></o:p><o:p> </o:p>Ard and Laszlo:<o:p></o:p> If ArmVirtPkg\Library\QemuFwCfgLib is arch generic, can it be moved from ArmVirtPkg into OvmfPkg?<o:p></o:p><o:p> </o:p>Thanks<o:p></o:p>Liming<o:p></o:p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm 0cm 0cm'>发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Daniel Schaefer 发送时间: 2021年5月21日 20:46 收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn 抄送: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; 'Michael D Kinney' <michael.d.kinney@intel.com>; 'Zhiguang Liu' <zhiguang.liu@intel.com>; 'Leif Lindholm' <leif@nuviainc.com> 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64<o:p></o:p></div></div><o:p> </o:p><div>It's not required to go into that tag.<o:p></o:p></div><div>We need two more patches that we haven't submitted yet to boot on Qemu.<o:p></o:p></div><div><o:p> </o:p></div><div>Would it be okay if we used a library from ArmVirtPkg for RISCV64?<o:p></o:p></div><div>See: <a href="https://github.com/riscv/riscv-edk2/commit/8c7960ef860c65f2646912c3dccbb308a98e0cc3">https://github.com/riscv/riscv-edk2/commit/8c7960ef860c65f2646912c3dccbb308a98e0cc3</a><o:p></o:p></div><div>Or does it have to be moved to some other place first?<o:p></o:p></div><div class=MsoNormal align=center style='text-align:center'><hr size=2 width="98%" align=center></div><div id=divRplyFwdMsg>From: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>> on behalf of gaoliming <<a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a>> Sent: Friday, May 21, 2021 14:35 To: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>>; Schaefer, Daniel <<a href="mailto:daniel.schaefer@hpe.com">daniel.schaefer@hpe.com</a>> Cc: Chang, Abner (HPS SW/FW Technologist) <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>>; 'Michael D Kinney' <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>>; 'Zhiguang Liu' <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>>; 'Leif Lindholm' <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> Subject: 回复: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 <o:p></o:p><div> <o:p></o:p></div></div><div><div>Daniel:<o:p></o:p> Thanks for your information. Acked-by: Liming Gao <<a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a>><o:p></o:p> <o:p></o:p> And, do you request to merge this patch for edk2 stable tag 202105? <o:p></o:p> <o:p></o:p>Thanks<o:p></o:p>Liming<o:p></o:p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm 0cm 0cm'>发件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>> 代表 Daniel Schaefer 发送时间: 2021年5月21日 13:27 收件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>; <a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a> 抄送: Chang, Abner (HPS SW/FW Technologist) <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>>; 'Michael D Kinney' <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>>; 'Zhiguang Liu' <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>>; 'Leif Lindholm' <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64<o:p></o:p></div></div> <o:p></o:p><div>Great!<o:p></o:p></div><div> <o:p></o:p></div><div>It is verified I can boot Linux from a virtio ESP using this patch on QEMU virt machine.<o:p></o:p></div><div>See: <a href="https://github.com/riscv/riscv-edk2-platforms/runs/2618819010?check_suite_focus=true">https://github.com/riscv/riscv-edk2-platforms/runs/2618819010?check_suite_focus=true</a><o:p></o:p></div><div> <o:p></o:p></div><div>Thanks,<o:p></o:p></div><div>Daniel<o:p></o:p></div><div class=MsoNormal align=center style='text-align:center'><hr size=2 width="98%" align=center></div><div id="x_divRplyFwdMsg">From: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>> on behalf of gaoliming <<a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a>> Sent: Friday, May 21, 2021 13:14 To: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>>; Schaefer, Daniel <<a href="mailto:daniel.schaefer@hpe.com">daniel.schaefer@hpe.com</a>> Cc: Chang, Abner (HPS SW/FW Technologist) <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>>; 'Michael D Kinney' <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>>; 'Zhiguang Liu' <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>>; 'Leif Lindholm' <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> Subject: 回复: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 <o:p></o:p><div> <o:p></o:p></div></div><div><div>Daniel: Now, it is clear to me. So, I suggest to merge this change when it is verified on generic RISC-V QEMU virt machine. Is it OK? Thanks Liming > -----邮件原件----- > 发件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>> 代表 Daniel > Schaefer > 发送时间: 2021年5月18日 10:35 > 收件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>; <a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a> > 抄送: 'Abner Chang' <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>>; 'Michael D Kinney' > <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>>; 'Zhiguang Liu' <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>>; 'Leif > Lindholm' <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> > 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence > implementation for RiscV64 > > On 5/18/21 9:04 AM, gaoliming wrote: > > Daniel: > > Seemly, this API is missing in BaseLib for RiscV64 arch. How do you detect > > this issue? > > What do you mean it's missing? > Yes MemoryFence() for RiscV64 is missing currently, that's why I'm adding it > here. > > Maybe you mean that it's not currently used? That's also true. > I'm enabling the generic QEMU virt machine (like OVMF or ArmVirtPkg) for > RISC-V. > At least QemuFwCfgLib and VirtioLib need it. > That's why I have the need to add this implementation now. > > Does that clear it up? > > > Thanks > > Liming > >> -----邮件原件----- > >> 发件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> <<a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a>> 代表 Daniel > >> Schaefer > >> 发送时间: 2021年5月16日 2:13 > >> 收件人: <a href="mailto:devel@edk2.groups.io">devel@edk2.groups.io</a> > >> 抄送: Abner Chang <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>>; Michael D Kinney > >> <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>>; Liming Gao <<a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a>>; > >> Zhiguang Liu <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>>; Leif Lindholm <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> > >> 主题: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for > >> RiscV64 > >> > >> Cc: Abner Chang <<a href="mailto:abner.chang@hpe.com">abner.chang@hpe.com</a>> > >> Cc: Michael D Kinney <<a href="mailto:michael.d.kinney@intel.com">michael.d.kinney@intel.com</a>> > >> Cc: Liming Gao <<a href="mailto:gaoliming@byosoft.com.cn">gaoliming@byosoft.com.cn</a>> > >> Cc: Zhiguang Liu <<a href="mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com</a>> > >> Cc: Leif Lindholm <<a href="mailto:leif@nuviainc.com">leif@nuviainc.com</a>> > >> Signed-off-by: Daniel Schaefer <<a href="mailto:daniel.schaefer@hpe.com">daniel.schaefer@hpe.com</a>> > >> --- > >> MdePkg/Library/BaseLib/BaseLib.inf | 1 + > >> MdePkg/Library/BaseLib/RiscV64/MemoryFence.S | 33 > >> ++++++++++++++++++++ > >> 2 files changed, 34 insertions(+) > >> > >> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > >> b/MdePkg/Library/BaseLib/BaseLib.inf > >> index b76f3af380ea..b7ab5f632366 100644 > >> --- a/MdePkg/Library/BaseLib/BaseLib.inf > >> +++ b/MdePkg/Library/BaseLib/BaseLib.inf > >> @@ -399,6 +399,7 @@ > >> RiscV64/DisableInterrupts.c > >> > >> > >> RiscV64/EnableInterrupts.c > >> > >> > >> RiscV64/CpuPause.c > >> > >> > >> + RiscV64/MemoryFence.S | GCC > >> > >> > >> RiscV64/RiscVSetJumpLongJump.S | GCC > >> > >> > >> RiscV64/RiscVCpuBreakpoint.S | GCC > >> > >> > >> RiscV64/RiscVCpuPause.S | GCC > >> > >> > >> diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> new file mode 100644 > >> index 000000000000..283df9356a9a > >> --- /dev/null > >> +++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> @@ -0,0 +1,33 @@ > >> > > +##------------------------------------------------------------------------- > > ----- > >> > >> > >> +# > >> > >> > >> +# MemoryFence() for RiscV64 > >> > >> > >> + > >> > >> > >> +# Copyright (c) 2021, Hewlett Packard Enterprise Development. All rights > >> reserved. > >> > >> > >> +# > >> > >> > >> +# SPDX-License-Identifier: BSD-2-Clause-Patent > >> > >> > >> +# > >> > >> > >> > > +##------------------------------------------------------------------------- > > ----- > >> > >> > >> + > >> > >> > >> +.text > >> > >> > >> +.p2align 2 > >> > >> > >> + > >> > >> > >> +ASM_GLOBAL ASM_PFX(MemoryFence) > >> > >> > >> + > >> > >> > >> + > >> > >> > >> +#/** > >> > >> > >> +# Used to serialize load and store operations. > >> > >> > >> +# > >> > >> > >> +# All loads and stores that proceed calls to this function are > > guaranteed to > >> be > >> > >> > >> +# globally visible when this function returns. > >> > >> > >> +# > >> > >> > >> +#**/ > >> > >> > >> +#VOID > >> > >> > >> +#EFIAPI > >> > >> > >> +#MemoryFence ( > >> > >> > >> +# VOID > >> > >> > >> +# ); > >> > >> > >> +# > >> > >> > >> +ASM_PFX(MemoryFence): > >> > >> > >> + // Fence on all memory and I/O > >> > >> > >> + fence > >> > >> > >> + ret > >> > >> > >> -- > >> 2.30.1 > >> > >> > >> > >> > >> > > > > > > > > > > > > > > > > > > > > <o:p></o:p></div></div></div></div><div></o:p></div></div></body></html> <div width="1" style="color:white;clear:both">_._,_._,_</div> <hr> Groups.io Links: You receive all messages sent to this group. <a target="_blank" href="https://edk2.groups.io/g/devel/message/75884">View/Reply Online (#75884)</a> | | <a target="_blank" href="https://groups.io/mt/83222949/1813853">Mute This Topic</a> | <a href="https://edk2.groups.io/g/devel/post">New Topic</a> <a href="https://edk2.groups.io/g/devel/editsub/1813853">Your Subscription</a> | <a href="mailto:devel+owner@edk2.groups.io">Contact Group Owner</a> | <a href="https://edk2.groups.io/g/devel/unsub">Unsubscribe</a> [edk2-devel-archive@redhat.com] <div width="1" style="color:white;clear:both">_._,_._,_</div>