<html xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=us-ascii">
<meta name="Generator" content="Microsoft Word 15 (filtered medium)">
<style><!--
/* Font Definitions */
@font-face
{font-family:"Cambria Math";
panose-1:2 4 5 3 5 4 6 3 2 4;}
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0cm;
font-size:10.0pt;
font-family:"Calibri",sans-serif;}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:blue;
text-decoration:underline;}
span.EmailStyle19
{mso-style-type:personal-reply;
font-family:"Calibri",sans-serif;
color:windowtext;}
.MsoChpDefault
{mso-style-type:export-only;
font-size:10.0pt;}
@page WordSection1
{size:612.0pt 792.0pt;
margin:72.0pt 72.0pt 72.0pt 72.0pt;}
div.WordSection1
{page:WordSection1;}
--></style>
</head>
<body lang="EN-GB" link="blue" vlink="purple" style="word-wrap:break-word">
<div class="WordSection1">
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">Hi Khasim,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">Thank you for splitting the patches.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">For this series,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">Reviewed-by: Sami Mujawar <sami.mujawar@arm.com><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US">Sami Mujawar<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm">
<p class="MsoNormal" style="margin-bottom:12.0pt"><b><span style="font-size:12.0pt;color:black">From:
</span></b><span style="font-size:12.0pt;color:black">Khasim Mohammed <Khasim.Mohammed@arm.com><br>
<b>Date: </b>Monday, 24 January 2022 at 15:56<br>
<b>To: </b>devel@edk2.groups.io <devel@edk2.groups.io><br>
<b>Cc: </b>nd <nd@arm.com>, Sami Mujawar <Sami.Mujawar@arm.com>, Pierre Gondois <Pierre.Gondois@arm.com>, Khasim Mohammed <Khasim.Mohammed@arm.com><br>
<b>Subject: </b>[PATCH v7 0/6] Enable CCIX port as PCIe root host on N1SDP<o:p></o:p></span></p>
</div>
<div>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:11.0pt">The patch series removes PciExpressLib and enables CCIX port<br>
as PCIe root on N1SDP.<br>
<br>
V7:<br>
- Spit the patches to separate Platform and Silicon specific files<br>
<br>
V6:<br>
- Sort PCDs in alphabetical order<br>
- Replace ASSERT calls with a if condition to capture the failure<br>
<br>
V5:<br>
- Split the CCIX patch, separate PCD updates and CCIX root port enablement.<br>
- Use GET_SEG_ macro for segment detection and update logic accordingly.<br>
<br>
V4:<br>
- Remove PciExpressLib and use PciSegmentLib instead. More detailed explanation<br>
is included in the patch.<br>
<br>
V3:<br>
- The conditional logic in GetPciExpressAddress is made simple.<br>
- Removed few more PCD entries that were unused.<br>
- Removed hardcoded entries.<br>
<br>
V2:<br>
- Removed few PCDs entries that were not used.<br>
- Migrated to latest version edk2-platform and validated the patches.<br>
<br>
V1:<br>
- The PciExpressLib is updated to validate the PCIe addresses<br>
and introducing corresponding PCD entries.<br>
- A custom PCI Segment library is adapted from SynQuacerPciSegmentLib<br>
and ported for N1Sdp.<br>
- The root complex node info in PciHostBridge library is updated to<br>
include the CCIX port information.<br>
<br>
The changes can be seen at:<br>
<a href="https://github.com/khasim/edk2-platforms-n1sdp/tree/n1sdp-ccix-root">https://github.com/khasim/edk2-platforms-n1sdp/tree/n1sdp-ccix-root</a><br>
<br>
<br>
Khasim Syed Mohammed (6):<br>
Silicon/ARM/NeoverseN1Soc: Port PCI Segment Library<br>
Silicon/ARM/NeoverseN1Soc: Update PCDs to support multiple PCI root<br>
ports<br>
Platform/ARM/N1Sdp: Update PCDs to support multiple PCI root ports<br>
Silicon/ARM/NeoverseN1Soc: Add CCIX root complex support<br>
Silicon/ARM/NeoverseN1Soc: Remove PciExpressLib use PciSegmentLib<br>
instead<br>
Platform/ARM/N1Sdp: Remove PciExpressLib use PciSegmentLib instead<br>
<br>
.../AslTables/SsdtPci.asl | 8 +-<br>
.../AslTables/SsdtRemotePci.asl | 4 +-<br>
.../ConfigurationManager.c | 24 +-<br>
.../ConfigurationManagerDxe.inf | 18 +-<br>
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 8 -<br>
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +-<br>
.../PciExpressLib.c | 1589 ----------------<br>
.../PciExpressLib.inf | 56 -<br>
.../PciHostBridgeLib/PciHostBridgeLib.c | 71 +-<br>
.../PciHostBridgeLib/PciHostBridgeLib.inf | 11 +-<br>
.../Library/PciSegmentLib/PciSegmentLib.c | 1622 +++++++++++++++++<br>
.../Library/PciSegmentLib/PciSegmentLib.inf | 38 +<br>
.../Library/PlatformLib/PlatformLib.inf | 1 +<br>
.../Library/PlatformLib/PlatformLibMem.c | 4 +-<br>
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 64 +-<br>
15 files changed, 1808 insertions(+), 1715 deletions(-)<br>
delete mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c<br>
delete mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf<br>
create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.c<br>
create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.inf<br>
<br>
-- <br>
2.17.1<o:p></o:p></span></p>
</div>
</div>
</body>
</html>
<div width="1" style="color:white;clear:both">_._,_._,_</div> <hr> Groups.io Links:<p> You receive all messages sent to this group. <p> <a target="_blank" href="https://edk2.groups.io/g/devel/message/86029">View/Reply Online (#86029)</a> | | <a target="_blank" href="https://groups.io/mt/88649445/1813853">Mute This Topic</a> | <a href="https://edk2.groups.io/g/devel/post">New Topic</a><br> <a href="https://edk2.groups.io/g/devel/editsub/1813853">Your Subscription</a> | <a href="mailto:devel+owner@edk2.groups.io">Contact Group Owner</a> | <a href="https://edk2.groups.io/g/devel/unsub">Unsubscribe</a> [edk2-devel-archive@redhat.com]<br> <div width="1" style="color:white;clear:both">_._,_._,_</div>