<html xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="blue" vlink="purple" style="word-wrap:break-word"> <div class="WordSection1"> <a href="https://github.com/pttuan/edk2.git">https://github.com/pttuan/edk2.git</a><o:p></o:p> branch: tphan/riscv_mmu_new_pcd<o:p></o:p> <o:p> </o:p> <div id="mail-editor-reference-message-container"> <div> <div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in"> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Andrei Warkentin <andrei.warkentin@intel.com> Date: Wednesday, October 4, 2023 at 11:42 AM To: Tuan Phan <tphan@ventanamicro.com>, devel@edk2.groups.io <devel@edk2.groups.io> Cc: Kinney, Michael D <michael.d.kinney@intel.com>, Gao, Liming <gaoliming@byosoft.com.cn>, Liu, Zhiguang <zhiguang.liu@intel.com>, sunilvl@ventanamicro.com <sunilvl@ventanamicro.com>, git@danielschaefer.me <git@danielschaefer.me>, ardb+tianocore@kernel.org <ardb+tianocore@kernel.org> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: RISC-V: MMU: Introduce a PCD for SATP mode<o:p></o:p> </div> <div> Do you happen to have a link to a Github tree? A > -----Original Message----- > From: Tuan Phan <tphan@ventanamicro.com> > Sent: Tuesday, October 3, 2023 4:00 PM > To: devel@edk2.groups.io > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; > sunilvl@ventanamicro.com; git@danielschaefer.me; Warkentin, Andrei > <andrei.warkentin@intel.com>; ardb+tianocore@kernel.org; Tuan Phan > <tphan@ventanamicro.com> > Subject: [PATCH] UefiCpuPkg: RISC-V: MMU: Introduce a PCD for SATP mode > > Introduce a PCD to control the maximum SATP mode that MMU allowed to > use. This PCD helps RISC-V platform set bare or minimum SATA mode during > bring up to debug memory map issue. > > Signed-off-by: Tuan Phan <tphan@ventanamicro.com> > --- > UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 6 +++++- > UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 3 +++ > UefiCpuPkg/UefiCpuPkg.dec | 8 ++++++++ > 3 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c > b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c > index 9cca5fc128af..826a1d32a1d4 100644 > --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c > +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c > @@ -36,7 +36,7 @@ > #define PTE_PPN_SHIFT 10 #define RISCV_MMU_PAGE_SHIFT 12 - > STATIC UINTN mModeSupport[] = { SATP_MODE_SV57, SATP_MODE_SV48, > SATP_MODE_SV39 };+STATIC UINTN mModeSupport[] = { SATP_MODE_SV57, > SATP_MODE_SV48, SATP_MODE_SV39, SATP_MODE_OFF }; STATIC UINTN > mMaxRootTableLevel; STATIC UINTN mBitPerLevel; STATIC UINTN > mTableEntryCount;@@ -590,6 +590,10 @@ RiscVMmuSetSatpMode ( > UINTN Index; EFI_STATUS Status; + if > (SatpMode > PcdGet32 (PcdCpuRiscVMmuMaxSatpMode)) {+ return > EFI_DEVICE_ERROR;+ }+ switch (SatpMode) { case SATP_MODE_OFF: > return EFI_SUCCESS;diff --git > a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf > b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf > index 9b28a98cb346..51ebe1750e97 100644 > --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf > +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf > @@ -25,3 +25,6 @@ > [LibraryClasses] BaseLib++[Pcd]+ > gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## > CONSUMESdiff --git a/UefiCpuPkg/UefiCpuPkg.dec > b/UefiCpuPkg/UefiCpuPkg.dec > index 68473fc640e6..79191af18a05 100644 > --- a/UefiCpuPkg/UefiCpuPkg.dec > +++ b/UefiCpuPkg/UefiCpuPkg.dec > @@ -396,6 +396,14 @@ > # @Prompt Access to non-SMRAM memory is restricted to reserved, > runtime and ACPI NVS type after SmmReadyToLock. > gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|TRUE|B > OOLEAN|0x3213210F +[PcdsFixedAtBuild.RISCV64]+ ## Indicate the > maximum SATP mode allowed.+ # 0 - Bare mode.+ # 8 - 39bit mode.+ # 9 - > 48bit mode.+ # 10 - 57bit mode.+ > gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode|0|UINT32|0x6 > 0000021+ [PcdsDynamic, PcdsDynamicEx] ## Contains the pointer to a CPU > S3 data buffer of structure ACPI_CPU_DATA. # @Prompt The pointer to a CPU > S3 data buffer.-- > 2.25.1 <o:p></o:p> </div> </div> </div> </div> </body> </html> <div width="1" style="color:white;clear:both">_._,_._,_</div> <hr> Groups.io Links: You receive all messages sent to this group. <a target="_blank" href="https://edk2.groups.io/g/devel/message/109332">View/Reply Online (#109332)</a> | | <a target="_blank" href="https://groups.io/mt/101742937/1813853">Mute This Topic</a> | <a href="https://edk2.groups.io/g/devel/post">New Topic</a> <a href="https://edk2.groups.io/g/devel/editsub/1813853">Your Subscription</a> | <a href="mailto:devel+owner@edk2.groups.io">Contact Group Owner</a> | <a href="https://edk2.groups.io/g/devel/unsub">Unsubscribe</a> [edk2-devel-archive@redhat.com] <div width="1" style="color:white;clear:both">_._,_._,_</div>