[PATCH 1/1] cpu_riscv64.c: add update() implementation

[Daniel Henrique Barboza]

At this moment it is not possible to launch a 'riscv64' domain of type
'qemu' (i.e. TCG) and machine 'virt' in a x86 host:

$ sudo ./run tools/virsh start riscv-virt1
error: Failed to start domain 'riscv-virt1'
error: this function is not supported by the connection driver:
       cannot update guest CPU for riscv64 architecture

A guest CPU definition will be added if absent by
qemuDomainSetDefaultCPU():

  <cpu mode='custom' match='exact' check='none'>
    <model fallback='forbid'>rv64</model>
  </cpu>

This def will then be updated in qemuProcessUpdateGuestCPU(), which
calls virCPUUpdate(). The error above is being thrown by this function
because the current RISC-V driver does not have an 'update' API
implemented.

There is no particular reason to not support TCG RISC-V guests in x86 or
any other host arch, so let's add an 'update' API to the RISC-V driver.
The code was copied from virCPUarmUpdate() from the ARM driver since
it's a good enough implementation to get us started.

Signed-off-by: Daniel Henrique Barboza <dbarboza at ventanamicro.com>
---
 src/cpu/cpu_riscv64.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/src/cpu/cpu_riscv64.c b/src/cpu/cpu_riscv64.c
index c44bdeb291..9796f8c967 100644
--- a/src/cpu/cpu_riscv64.c
+++ b/src/cpu/cpu_riscv64.c
@@ -46,6 +46,32 @@ virCPURiscv64ValidateFeatures(virCPUDef *cpu G_GNUC_UNUSED)
 }
 
 
+static int
+virCPUriscvUpdate(virCPUDef *guest,
+                  const virCPUDef *host,
+                  bool relative)
+{
+    g_autoptr(virCPUDef) updated = virCPUDefCopyWithoutModel(guest);
+
+    if (!relative || guest->mode != VIR_CPU_MODE_HOST_MODEL)
+        return 0;
+
+    if (!host) {
+        virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
+                       _("unknown host CPU model"));
+        return -1;
+    }
+
+    updated->mode = VIR_CPU_MODE_CUSTOM;
+    virCPUDefCopyModel(updated, host, true);
+
+    virCPUDefStealModel(guest, updated, false);
+    guest->mode = VIR_CPU_MODE_CUSTOM;
+    guest->match = VIR_CPU_MATCH_EXACT;
+
+    return 0;
+}
+
 struct cpuArchDriver cpuDriverRiscv64 = {
     .name = "riscv64",
     .arch = archs,
@@ -54,6 +80,6 @@ struct cpuArchDriver cpuDriverRiscv64 = {
     .decode     = NULL,
     .encode     = NULL,
     .baseline   = NULL,
-    .update     = NULL,
+    .update     = virCPUriscvUpdate,
     .validateFeatures = virCPURiscv64ValidateFeatures,
 };
-- 
2.40.0