<div dir="ltr"><div><div><div><div><div><div>Hello,<br><br></div>My earlier patch with commit id : ae16c95f1bb5591c27676c5de8d383e5612c3568 (Link: <a href="https://www.redhat.com/archives/libvir-list/2017-January/msg00226.html">https://www.redhat.com/archives/libvir-list/2017-January/msg00226.html</a> )<br></div>computed the .attrConfig value incorrectly. The right way to compute .attrConfig value for a PERF_TYPE_HW_CACHE event is listed here (<a href="https://linux.die.net/man/2/perf_event_open">https://linux.die.net/man/2/perf_event_open</a>) . I somehow missed this info at the time of sending the patch and have sent another patch to rectify it.<br><br></div>Link: <a href="https://www.redhat.com/archives/libvir-list/2017-January/msg00679.html">https://www.redhat.com/archives/libvir-list/2017-January/msg00679.html</a><br><br></div>I think this patch needs to be in before 3.0.0 is released else a wrong value shall be displayed on enabling and displaying cache_l1d perf event.<br><br></div>Thanks,<br></div>Nitesh Konkar.<br><div><div><br></div></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Jan 14, 2017 at 1:49 PM, Nitesh Konkar <span dir="ltr"><<a href="mailto:niteshkonkar.libvirt@gmail.com" target="_blank">niteshkonkar.libvirt@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">This patch computes the .attrConfig value for<br>
cache_l1d correctly and updates the documentation.<br>
The cache_l1d perf event now is renamed as<br>
cache_l1dra perf event for measuring read accesses<br>
for level 1 data cache<br>
<br>
Signed-off-by: Nitesh Konkar <<a href="mailto:nitkon12@linux.vnet.ibm.com">nitkon12@linux.vnet.ibm.com</a>><br>
---<br>
docs/<a href="http://formatdomain.html.in" rel="noreferrer" target="_blank">formatdomain.html.in</a> | 12 ++++++------<br>
docs/news.xml | 5 +++--<br>
docs/schemas/domaincommon.rng | 2 +-<br>
include/libvirt/libvirt-<wbr>domain.h | 12 ++++++------<br>
src/libvirt-domain.c | 5 +++--<br>
src/qemu/qemu_driver.c | 2 +-<br>
src/util/virperf.c | 8 +++++---<br>
src/util/virperf.h | 2 +-<br>
tests/genericxml2xmlindata/<wbr>generic-perf.xml | 2 +-<br>
tools/virsh.pod | 6 +++---<br>
10 files changed, 30 insertions(+), 26 deletions(-)<br>
<br>
diff --git a/docs/<a href="http://formatdomain.html.in" rel="noreferrer" target="_blank">formatdomain.html.in</a> b/docs/<a href="http://formatdomain.html.in" rel="noreferrer" target="_blank">formatdomain.html.in</a><br>
index 30cb196..a8ee2db 100644<br>
--- a/docs/<a href="http://formatdomain.html.in" rel="noreferrer" target="_blank">formatdomain.html.in</a><br>
+++ b/docs/<a href="http://formatdomain.html.in" rel="noreferrer" target="_blank">formatdomain.html.in</a><br>
@@ -1937,7 +1937,7 @@<br>
<event name='stalled_cycles_frontend' enabled='no'/><br>
<event name='stalled_cycles_backend' enabled='no'/><br>
<event name='ref_cpu_cycles' enabled='no'/><br>
- <event name='cache_l1d' enabled='no'/><br>
+ <event name='cache_l1dra' enabled='no'/><br>
</perf><br>
...<br>
</pre><br>
@@ -2013,14 +2013,14 @@<br>
<tr><br>
<td><code>ref_cpu_cycles</<wbr>code></td><br>
<td>the count of total cpu cycles not affected by CPU frequency scaling<br>
- by applications running on the platform</td><br>
+ by applications running on the platform</td><br>
<td><code>perf.ref_cpu_cycles<<wbr>/code></td><br>
</tr><br>
<tr><br>
- <td><code>cache_l1d</code></<wbr>td><br>
- <td>the count of total level 1 data cache by applications running on<br>
- the platform</td><br>
- <td><code>perf.cache_l1d</<wbr>code></td><br>
+ <td><code>cache_l1dra</code></<wbr>td><br>
+ <td>the count of total read accesses for level 1 data cache by<br>
+ applications running on the platform</td><br>
+ <td><code>perf.cache_l1dra</<wbr>code></td><br>
</tr><br>
</table><br>
<br>
diff --git a/docs/news.xml b/docs/news.xml<br>
index baafcff..93ab40c 100644<br>
--- a/docs/news.xml<br>
+++ b/docs/news.xml<br>
@@ -82,8 +82,9 @@<br>
<description><br>
Add support to get the count of branch instructions<br>
executed, branch misses, bus cycles, stalled frontend<br>
- cpu cycles, stalled backend cpu cycles, and ref cpu<br>
- cycles by applications running on the platform.<br>
+ cpu cycles, stalled backend cpu cycles, ref cpu<br>
+ cycles and cache l1dra by applications running on the<br>
+ platform.<br>
</description><br>
</change><br>
<change><br>
diff --git a/docs/schemas/domaincommon.<wbr>rng b/docs/schemas/domaincommon.<wbr>rng<br>
index be0a609..a65ad13 100644<br>
--- a/docs/schemas/domaincommon.<wbr>rng<br>
+++ b/docs/schemas/domaincommon.<wbr>rng<br>
@@ -433,7 +433,7 @@<br>
<value>stalled_cycles_<wbr>frontend</value><br>
<value>stalled_cycles_backend<<wbr>/value><br>
<value>ref_cpu_cycles</value><br>
- <value>cache_l1d</value><br>
+ <value>cache_l1dra</value><br>
</choice><br>
</attribute><br>
<attribute name="enabled"><br>
diff --git a/include/libvirt/libvirt-<wbr>domain.h b/include/libvirt/libvirt-<wbr>domain.h<br>
index 1e0e74c..3da0e9b 100644<br>
--- a/include/libvirt/libvirt-<wbr>domain.h<br>
+++ b/include/libvirt/libvirt-<wbr>domain.h<br>
@@ -2189,15 +2189,15 @@ void virDomainStatsRecordListFree(<wbr>virDomainStatsRecordPtr *stats);<br>
# define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles"<br>
<br>
/**<br>
- * VIR_PERF_PARAM_CACHE_L1D:<br>
+ * VIR_PERF_PARAM_CACHE_L1DRA:<br>
*<br>
- * Macro for typed parameter name that represents cache_l1d<br>
+ * Macro for typed parameter name that represents cache_l1dra<br>
* perf event which can be used to measure the count of total<br>
- * level 1 data cache by applications running on the platform.<br>
- * It corresponds to the "perf.cache_l1d" field in the<br>
- * *Stats APIs.<br>
+ * read accesses for level 1 data cache by applications running<br>
+ * on the platform. It corresponds to the "perf.cache_l1dra"<br>
+ * field in the *Stats APIs.<br>
*/<br>
-# define VIR_PERF_PARAM_CACHE_L1D "cache_l1d"<br>
+# define VIR_PERF_PARAM_CACHE_L1DRA "cache_l1dra"<br>
<br>
int virDomainGetPerfEvents(<wbr>virDomainPtr dom,<br>
virTypedParameterPtr *params,<br>
diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c<br>
index 3023f30..fa39069 100644<br>
--- a/src/libvirt-domain.c<br>
+++ b/src/libvirt-domain.c<br>
@@ -11250,8 +11250,9 @@ virConnectGetDomainCapabilitie<wbr>s(virConnectPtr conn,<br>
* CPU frequency scaling by applications running<br>
* as unsigned long long. It is produced by the<br>
* ref_cpu_cycles perf event.<br>
- * "perf.cache_l1d" - The count of total level 1 data cache as unsigned<br>
- * long long. It is produced by cache_l1d perf event.<br>
+ * "perf.cache_l1dra" - The count of total read accesses for level 1 data<br>
+ * cache as unsigned long long. It is produced by<br>
+ * cache_l1dra perf event.<br>
*<br>
* Note that entire stats groups or individual stat fields may be missing from<br>
* the output in case they are not supported by the given hypervisor, are not<br>
diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c<br>
index 42f9889..7e2ea96 100644<br>
--- a/src/qemu/qemu_driver.c<br>
+++ b/src/qemu/qemu_driver.c<br>
@@ -9877,7 +9877,7 @@ qemuDomainSetPerfEvents(<wbr>virDomainPtr dom,<br>
VIR_PERF_PARAM_STALLED_CYCLES_<wbr>FRONTEND, VIR_TYPED_PARAM_BOOLEAN,<br>
VIR_PERF_PARAM_STALLED_CYCLES_<wbr>BACKEND, VIR_TYPED_PARAM_BOOLEAN,<br>
VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN,<br>
- VIR_PERF_PARAM_CACHE_L1D, VIR_TYPED_PARAM_BOOLEAN,<br>
+ VIR_PERF_PARAM_CACHE_L1DRA, VIR_TYPED_PARAM_BOOLEAN,<br>
NULL) < 0)<br>
return -1;<br>
<br>
diff --git a/src/util/virperf.c b/src/util/virperf.c<br>
index 8554723..11e64df 100644<br>
--- a/src/util/virperf.c<br>
+++ b/src/util/virperf.c<br>
@@ -44,7 +44,7 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST,<br>
"branch_instructions", "branch_misses",<br>
"bus_cycles", "stalled_cycles_frontend",<br>
"stalled_cycles_backend", "ref_cpu_cycles",<br>
- "cache_l1d");<br>
+ "cache_l1dra");<br>
<br>
struct virPerfEvent {<br>
int type;<br>
@@ -113,9 +113,11 @@ static struct virPerfEventAttr attrs[] = {<br>
.attrConfig = 0,<br>
# endif<br>
},<br>
- {.type = VIR_PERF_EVENT_CACHE_L1D,<br>
+ {.type = VIR_PERF_EVENT_CACHE_L1DRA,<br>
.attrType = PERF_TYPE_HW_CACHE,<br>
- .attrConfig = PERF_COUNT_HW_CACHE_L1D},<br>
+ .attrConfig = (PERF_COUNT_HW_CACHE_L1D) |<br>
+ (PERF_COUNT_HW_CACHE_OP_READ << 8) |<br>
+ (PERF_COUNT_HW_CACHE_RESULT_<wbr>ACCESS << 16)},<br>
};<br>
typedef struct virPerfEventAttr *virPerfEventAttrPtr;<br>
<br>
diff --git a/src/util/virperf.h b/src/util/virperf.h<br>
index 4c562af..36ceb3a 100644<br>
--- a/src/util/virperf.h<br>
+++ b/src/util/virperf.h<br>
@@ -47,7 +47,7 @@ typedef enum {<br>
the backend of the instruction<br>
processor pipeline */<br>
VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */<br>
- VIR_PERF_EVENT_CACHE_L1D, /* Count of level 1 data cache*/<br>
+ VIR_PERF_EVENT_CACHE_L1DRA, /* Count of read accesses for level 1 data cache */<br>
<br>
VIR_PERF_EVENT_LAST<br>
} virPerfEventType;<br>
diff --git a/tests/genericxml2xmlindata/<wbr>generic-perf.xml b/tests/genericxml2xmlindata/<wbr>generic-perf.xml<br>
index d1418d0..9b01aef 100644<br>
--- a/tests/genericxml2xmlindata/<wbr>generic-perf.xml<br>
+++ b/tests/genericxml2xmlindata/<wbr>generic-perf.xml<br>
@@ -26,7 +26,7 @@<br>
<event name='stalled_cycles_frontend' enabled='yes'/><br>
<event name='stalled_cycles_backend' enabled='yes'/><br>
<event name='ref_cpu_cycles' enabled='yes'/><br>
- <event name='cache_l1d' enabled='yes'/><br>
+ <event name='cache_l1dra' enabled='yes'/><br>
</perf><br>
<devices><br>
</devices><br>
diff --git a/tools/virsh.pod b/tools/virsh.pod<br>
index cfa7a24..798c02e 100644<br>
--- a/tools/virsh.pod<br>
+++ b/tools/virsh.pod<br>
@@ -946,7 +946,7 @@ I<--perf> returns the statistics of all enabled perf events:<br>
"perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles,<br>
"perf.stalled_cycles_backend" - the count of stalled backend cpu cycles,<br>
"perf.ref_cpu_cycles" - the count of ref cpu cycles,<br>
-"perf.cache_l1d" - the count of level 1 data cache<br>
+"perf.cache_l1dra" - the count of read accesses for level 1 data cache<br>
<br>
See the B<perf> command for more details about each event.<br>
<br>
@@ -2311,8 +2311,8 @@ B<Valid perf event names><br>
ref_cpu_cycles - Provides the count of total cpu cycles<br>
not affected by CPU frequency scaling by<br>
applications running on the platform.<br>
- cache_l1d - Provides the count of total level 1 data cache<br>
- by applications running on the platform.<br>
+ cache_l1dra - Provides the count of total read accesses for level 1<br>
+ data cache by applications running on the platform.<br>
<br>
B<Note>: The statistics can be retrieved using the B<domstats> command using<br>
the I<--perf> flag.<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.9.3<br>
<br>
</font></span></blockquote></div><br></div>