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<p style="color: #A0A0A8;">On Friday, 31 March 2017 at 7:19 PM, Martin Kletzander wrote:</p>
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<span><div><div><div>On Fri, Mar 31, 2017 at 09:56:32AM +0800, Eli Qiao wrote:</div><blockquote type="cite"><div><div><br></div><blockquote type="cite"><div></cells></div></blockquote><div>Okay, cool, this comes better than my patches and have some differences.</div><div>I am open with this as long as that it can meet cache allocation requires and</div><div>everyone will be happy.</div><div><br></div><div>I am ++ for this.</div><div><br></div><div>But I am not sure expose all of cache information in the capabilities XML.</div></div></blockquote><div><br></div><div>??? Are you not sure we "should expose" all of cache information? Or</div><div>are you afraid we're not exposing enough information?</div><div><br></div></div></div></span></blockquote><div>Well, I was saying not to expose all of the information, but after your reply, it's okay for me.</div><div><br></div><div> </div><blockquote type="cite" style="border-left-style:solid;border-width:1px;margin-left:0px;padding-left:10px;"><span><div><div><div></div><blockquote type="cite"><div><blockquote type="cite"><div><div></topology></div><div>+ <cache></div><div>+ <bank id='0' level='3' type='unified' size='8192' unit='KiB' cpus='0-7'/></div></div></blockquote><div><br></div><div>eg: if enabled CDP feature on the host, what the type of level=3 cache should be like?</div></div></blockquote><div><br></div><div>This has nothing to do with resctrl yet. I'm just exposing the caches</div><div>that exist on the host.</div><div><br></div><blockquote type="cite"><div><blockquote type="cite"><div>+ <bank id='0' level='2' type='unified' size='256' unit='KiB' cpus='0-1'/></div></blockquote><div>for the bank id, it’s per cache level unique right (data/instruction shares same id)?</div></div></blockquote><div><br></div><div>It looks like it's per cache level/type unique. But it's precisely just</div><div>what the kernel exposes to us. I'm not doing anything on top of that.</div><div><br></div><blockquote type="cite"><div><blockquote type="cite"><div><div>+ <bank id='0' level='1' type='instruction' size='32' unit='KiB' cpus='0-1'/></div><div>+ <bank id='0' level='1' type='data' size='32' unit='KiB' cpus='0-1'/></div><div>+ <bank id='1' level='2' type='unified' size='256' unit='KiB' cpus='2-3'/></div><div>+ <bank id='1' level='1' type='instruction' size='32' unit='KiB' cpus='2-3'/></div><div>+ <bank id='1' level='1' type='data' size='32' unit='KiB' cpus='2-3'/></div><div>+ <bank id='2' level='2' type='unified' size='256' unit='KiB' cpus='4-5'/></div><div>+ <bank id='2' level='1' type='instruction' size='32' unit='KiB' cpus='4-5'/></div><div>+ <bank id='2' level='1' type='data' size='32' unit='KiB' cpus='4-5'/></div><div>+ <bank id='3' level='2' type='unified' size='256' unit='KiB' cpus='6-7'/></div><div>+ <bank id='3' level='1' type='instruction' size='32' unit='KiB' cpus='6-7'/></div><div>+ <bank id='3' level='1' type='data' size='32' unit='KiB' cpus='6-7'/></div><div>+ </cache></div></div></blockquote><div><br></div><div><br></div><div>This’s really good that you have work this out by expose all these out to capabilities,</div><div>and it will be much easy to let resctrl keep focus on cache allocation.</div><div><br></div><div>So if util/virresctrl.c would like to access some cache abilities, it will first get virCapsPtr.host.caches,</div><div>right?</div></div></blockquote><div><br></div><div>Well yeah, it'll probably extend the CacheBank struct.</div></div></div></span></blockquote><div>+1 </div><blockquote type="cite" style="border-left-style:solid;border-width:1px;margin-left:0px;padding-left:10px;"><span><div><div><div><br></div><blockquote type="cite"><div><div>but I am not sure if that’s be okay to expose all cache information which we can not</div><div>do the allocation yet.</div></div></blockquote><div><br></div><div>What's the harm?</div><div><br></div></div></div></span></blockquote><div><br></div><div>think about I have a host has 2 Socket 22 core and 2 thread per core, I will have 88 cpus</div><div><br></div><div>so the cache bank will be a large list </div><div><br></div><div>2 for l3 , 44 for l2, 44 for l1d and 44 for l1c, not all of them are useful to users, and the capabilities XML are boring.</div><div><br></div><div>Even though I am Okay to expose all of them.</div><div> </div><div>I remember that Daniel has some comments for this in the RFC to not expose all caches of the host if no cache allocation support yet.</div><div><br></div><div>Any way, no harm.</div><div><br></div><div><br></div><blockquote type="cite" style="border-left-style:solid;border-width:1px;margin-left:0px;padding-left:10px;"><span><div><div><div></div><blockquote type="cite"><div>How can a user/admin to know from capabilities?</div></blockquote><div><br></div><div>Easily. The XML you see above just says what cache is on the host. If</div><div>any of the banks are allocatable, then it will have a sub-element. Is</div><div>there any problem with that?</div></div></div></span></blockquote><div>No problem, +1 to extend a sub-element .</div><div><br></div><div>Any suggestions for what’s it should be? </div><div><br></div><div>How about for l3: </div><div><pre style="font-variant-ligatures: normal; orphans: 2; widows: 2;"><control min="2816" avail=“56320” cbm_len=“20” scope=‘both’ reserved=“2816"/></pre></div><div><br></div><blockquote type="cite" style="border-left-style:solid;border-width:1px;margin-left:0px;padding-left:10px;"><span><div><div><div></div><blockquote type="cite"><blockquote type="cite"><div><div></host></div><div><br></div><div></capabilities></div><div>diff --git a/tests/vircaps2xmltest.c b/tests/vircaps2xmltest.c</div><div>index ffbe9a783811..dda0757766a8 100644</div><div>--- a/tests/vircaps2xmltest.c</div><div>+++ b/tests/vircaps2xmltest.c</div><div>@@ -58,7 +58,8 @@ test_virCapabilities(const void *opaque)</div><div>if (!caps)</div><div>goto cleanup;</div><div><br></div><div>- if (virCapabilitiesInitNUMA(caps) < 0)</div><div>+ if (virCapabilitiesInitNUMA(caps) < 0 ||</div><div>+ virCapabilitiesInitCaches(caps) < 0)</div><div>goto cleanup;</div><div><br></div><div>virSysfsSetSystemPath(NULL);</div><div>--</div><div>2.12.2</div><div><br></div><div>--</div><div>libvir-list mailing list</div><div>libvir-list@redhat.com (<a href="mailto:libvir-list@redhat.com">mailto:libvir-list@redhat.com</a>)</div><div><a href="https://www.redhat.com/mailman/listinfo/libvir-list">https://www.redhat.com/mailman/listinfo/libvir-list</a></div></div></blockquote></blockquote></div></div></span>
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