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<font size="+1">Erik,<br>
<br>
It appears that patches 1 and 2 are good to go (and probably can
be<br>
pushed separately from the other 2). Should I resend only patches
3<br>
and 4 when I get more info from NVIDIA about the detection code<br>
in patch 3?<br>
<br>
<br>
Thanks,<br>
<br>
<br>
Daniel<br>
</font><br>
<div class="moz-cite-prefix">On 3/5/19 9:46 AM, Daniel Henrique
Barboza wrote:<br>
</div>
<blockquote type="cite"
cite="mid:20190305124609.873-1-danielhb413@gmail.com">
<pre class="moz-quote-pre" wrap="">This series includes Libvirt support for a new QEMU feature for
the spapr (PPC64) machine, NVIDIA V100 + P9 passthrough. Refer to
[1] for the version 3 of this feature (same version used as a reference
for this series).
Changes in v3:
- added a new patch (patch 2) that isolates the PPC64 exclusive
code to calculate the memLockLimit (suggested by Erik Skultety)
- fixed 'make syntax-check' errors across all patches
- v2 can be found at [2]
[1] <a class="moz-txt-link-freetext" href="https://patchwork.kernel.org/cover/10831413/">https://patchwork.kernel.org/cover/10831413/</a>
[2] <a class="moz-txt-link-freetext" href="https://www.redhat.com/archives/libvir-list/2019-March/msg00059.html">https://www.redhat.com/archives/libvir-list/2019-March/msg00059.html</a>
Daniel Henrique Barboza (4):
qemu_domain: simplify non-VFIO memLockLimit calc for PPC64
qemu_domain: add a PPC64 memLockLimit helper
qemu_domain: NVLink2 device tree functions for PPC64
PPC64 support for NVIDIA V100 GPU with NVLink2 passthrough
src/qemu/qemu_domain.c | 402 ++++++++++++++++++++++++++++++++---------
1 file changed, 321 insertions(+), 81 deletions(-)
</pre>
</blockquote>
<br>
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