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<font size="+1">Ping<br>
<br>
The QEMU implementation was accepted and will be presented in<br>
QEMU 4.1. The implementation accepted is compatible with the<br>
work already done in this series, so this version is still
current.<br>
<br>
<br>
Thanks,<br>
<br>
<br>
dhb<br>
</font><br>
<div class="moz-cite-prefix">On 3/12/19 6:55 PM, Daniel Henrique
Barboza wrote:<br>
</div>
<blockquote type="cite"
cite="mid:20190312215550.28625-1-danielhb413@gmail.com">
<pre class="moz-quote-pre" wrap="">This series adds support for a new QEMU feature for the spapr
(PPC64) machine, NVIDIA V100 + P9 passthrough. Refer to [1]
for the version 7 of this feature (same version used as a
reference for this series).
changes in v4:
- only 2 patches - previous patches 1 and 2 were applied
- the detection mechanism was redesigned in patch 3. It
is now simpler and shorter after the discussions from
the previous version.
- previous version can be found at [2]
[1] <a class="moz-txt-link-freetext" href="https://patchwork.kernel.org/patch/10848727/">https://patchwork.kernel.org/patch/10848727/</a>
[2] <a class="moz-txt-link-freetext" href="https://www.redhat.com/archives/libvir-list/2019-March/msg00212.html">https://www.redhat.com/archives/libvir-list/2019-March/msg00212.html</a>
Daniel Henrique Barboza (2):
qemu_domain: NVLink2 bridge detection function for PPC64
PPC64 support for NVIDIA V100 GPU with NVLink2 passthrough
src/qemu/qemu_domain.c | 71 ++++++++++++++++++++++++++++++++++++++++--
1 file changed, 69 insertions(+), 2 deletions(-)
</pre>
</blockquote>
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