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<p><br>
not sure which kernel parameter or libvirt option that would be
either unfortunately. <br>
</p>
<p>If you or someone else can point to some clear directions I am
still happy to help.<br>
</p>
<br>
<div class="moz-cite-prefix">On 06/04/17 20:06, Joshua Lee wrote:<br>
</div>
<blockquote
cite="mid:CA+uM4wRnKO-fnBe0JQUHf7qOk7TfaEhCxyq5OG0wKj=vor2PcA@mail.gmail.com"
type="cite">
<div dir="ltr">If you get that running, run FIrestrike both
"before and after" using posted interrupts for me... and show
what scores you get, maybe some other benchmark like one of the
ones from Unigine if you have the time.</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Thu, Apr 6, 2017 at 1:00 PM, Joshua
Lee <span dir="ltr"><<a moz-do-not-send="true"
href="mailto:joshua613@gmail.com" target="_blank">joshua613@gmail.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr">I'm not sure, I know there's a kernel command
line argument that activates support for it, then there
might be something also within your libvirt XML and QEMU
command-line?</div>
<div class="HOEnZb">
<div class="h5">
<div class="gmail_extra"><br>
<div class="gmail_quote">On Thu, Apr 6, 2017 at 8:00
AM, P. Pronk <span dir="ltr"><<a
moz-do-not-send="true"
href="mailto:vfio@pronk.nl" target="_blank">vfio@pronk.nl</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000">
<p><br>
</p>
<p>With regards to your first question, I am
using an E5-1620v4 with X99 chipset but I am
not sure how I can check for you if the 16xx
supports this. Let me know if you would like
me to check something specifically.<br>
</p>
<p>Kind regards, Pim<br>
</p>
<span> <br>
<div
class="m_-8940190185187009433m_1230614543402891169moz-cite-prefix">On
06/04/17 13:18, Joshua Lee wrote:<br>
</div>
</span>
<blockquote type="cite"><span>
<div dir="ltr">I'm not clear if posted
interrupts, a feature of Broadwell-EP, is
available on both E5 1xxx V4 and E5 2xxx
V4, or just E5 2xxx V4? Intel's marketing
literature seems to stress the latter
family of processors as having it, but
reviews on sources such as Anandtech do
not mention anything but Broadwell-EP E5
Xeons having it in general.
<div><br>
</div>
<div>Also, a second question, what amount
of performance increase in GPU
performance could one expect for a
KVM/QEMU virtual machine with PCIE VGA
passthrough using the posted interrupt
feature of Broadwell-EP Xeons, using say
a 1620 V4, 1630 V4, or 1650 V4, assuming
those have the feature (if not, insert a
frequency-optimized E5 2xxx instead)
versus say a i7-5820k?</div>
</div>
<br>
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