SuperMicro H8SSL-i (ServerWorks HT1000) -- JMR SATAStor 6x2.5" in 1x5.25" array

[Bryan J. Smith]

On Sun, 2005-12-04 at 20:05 -0500, Peter Arremann wrote:
> -- I will not respond to anything that I said above -- 
> so for those that care and want to form their own opinion the thread is here:
> http://lists.centos.org/pipermail/centos/2005-June/007544.html
> (Hope I won't get in trouble for posting a centos mailing list link on a 
> fedora list) 

BTW, this is how much you nit-pick things to death ...
  http://lists.centos.org/pipermail/centos/2005-June/007872.html  

I like to differentiate whether or not the processor, when in PAE mode,
is using 52-bit (x86-64/IA-32e) or 36-bit (x86/IA-32).  From the
standpoint of a programmer writing user-space programs, it's the exact
same.  I have received several complements from engineers saying for
those writing OSes and compilers, it would have been nice for some
manuals to use that nomenclature.

Instead, they just refer to it collectively as "PAE" -- even though page
tables are _radically_different_ for the 2 modes.  ;->

-- Bryan

P.S.  I'm sorry, but I have a tendency to interject new concepts in the
engineering community when they are needed.  Forgive me to get approval
from you in the future -- especially when you are so ignorant about
something like you were on AMD x86-64.


-- 
Bryan J. Smith   mailto:b.j.smith at ieee.org
http://thebs413.blogspot.com
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