[Crash-utility] [PATCH 0/5] [ppc32] Support E500 processor for FSL BOOKE

[Dave Anderson]

----- Original Message -----
> This patch add support fleescale ppce500mc in E500 processor chipset.
> And make platform specific code shape-up so that new support can get
> easy.
> 
> Todo:
> vtop for kernel vaddr in ppce500mc can not work out yet.
> crash> vtop c0000000
> VIRTUAL   PHYSICAL
> c0000000  0
> 
> PAGE DIRECTORY: c08d1000
>   PGD: c08d2800 => 0 # Not mapped from PGD.
> 
> - linux/arch/powerpc/mm/fsl_booke_mmu.c
>  I think if kernel use TLBCAM's fixed map, page table setting are not required?
>  I'll make up fsl-booke specific physaddr search method later.
> 
> Thanks,
> Toshi
> 
> Toshikazu Nakayama (5):
>   ppc32: handle PTE size by using gdb datatype request
>   ppc32: shrink machine_specific
>   ppc32: handle greater PTE_RPN_SHIFT than PAGE_SHIFT
>   ppc32: add E500 processor probe function
>   ppc32: cleanup page table code
> 
>  defs.h |   59 ++++++++++++++++++++++----------
>  ppc.c  |  118
>  +++++++++++++++++++++++++++++++++++++--------------------------
>  2 files changed, 109 insertions(+), 68 deletions(-)

Queued for crash-6.0.5.

Thanks,
  Dave