[Crash-utility] [PATCH 1/6] MIPS: fix register numbers

Rabin Vincent rabin.vincent at axis.com
Fri Apr 24 14:09:13 UTC 2015


The MIPS general purpose registers in the elf_gregset_t don't start at
index 0 but at index 6.

(Note that the example dump files I provided earlier use the wrong
 offsets; I'll make new ones).
---
 mips.c |   11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/mips.c b/mips.c
index c181074..e5567f0 100644
--- a/mips.c
+++ b/mips.c
@@ -47,6 +47,11 @@ typedef ulong pte_t;
 
 #define MIPS_CPU_RIXI	0x00800000llu
 
+#define MIPS32_EF_R0	6
+#define MIPS32_EF_R29	35
+#define MIPS32_EF_R31	37
+#define MIPS32_EF_CPU0_EPC	40
+
 static struct machine_specific mips_machine_specific = { 0 };
 
 static void
@@ -520,7 +525,7 @@ mips_back_trace_cmd(struct bt_info *bt)
 
 	if (bt->machdep) {
 		struct mips_regset *regs = bt->machdep;
-		previous.pc = current.ra = regs->regs[31];
+		previous.pc = current.ra = regs->regs[MIPS32_EF_R31];
 	}
 
 	while (INSTACK(current.sp, bt)) {
@@ -614,9 +619,9 @@ mips_dumpfile_stack_frame(struct bt_info *bt, ulong *nip, ulong *ksp)
 	}
 
 	if (nip)
-		*nip = regs->regs[40];
+		*nip = regs->regs[MIPS32_EF_CPU0_EPC];
 	if (ksp)
-		*ksp = regs->regs[29];
+		*ksp = regs->regs[MIPS32_EF_R29];
 }
 
 static int
-- 
1.7.10.4




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