[Crash-utility] [PATCH] mips: support help -r
Dave Anderson
anderson at redhat.com
Thu Oct 20 19:25:24 UTC 2016
----- Original Message -----
> From: Rabin Vincent <rabinv at axis.com>
>
> Add support form printing out the registers from the dump file. We
> don't take the registers directly from the ELF notes but instead use the
> version we've saved into the machine_specific structure. If we don't do
> this, we'd get misleading output when the number of ELF notes don't
> match the number of online CPUs.
OK, but unfortunately the way you implemented it won't compile on any other
architecture, because the machdep->machspec machine_specific structure
contents can only be referenced from within the arch-specific files.
So I moved the register definitions and the display function (plus a dummy
!MIPS version) into mips.c, and called it from netdump.c.
Queued for crash-7.1.7:
https://github.com/crash-utility/crash/commit/26c5915ce5963f2ac187189f1b9a7ffc830dc65b
Thanks,
Dave
> ---
> defs.h | 11 ++++++++++
> mips.c | 6 +-----
> netdump.c | 74
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--
> 3 files changed, 84 insertions(+), 7 deletions(-)
>
> diff --git a/defs.h b/defs.h
> index 0384f4e..9daf792 100644
> --- a/defs.h
> +++ b/defs.h
> @@ -3128,6 +3128,17 @@ struct arm64_stackframe {
>
> #define _SECTION_SIZE_BITS 26
> #define _MAX_PHYSMEM_BITS 32
> +
> +#define MIPS32_EF_R0 6
> +#define MIPS32_EF_R29 35
> +#define MIPS32_EF_R31 37
> +#define MIPS32_EF_LO 38
> +#define MIPS32_EF_HI 39
> +#define MIPS32_EF_CP0_EPC 40
> +#define MIPS32_EF_CP0_BADVADDR 41
> +#define MIPS32_EF_CP0_STATUS 42
> +#define MIPS32_EF_CP0_CAUSE 43
> +
> #endif /* MIPS */
>
> #ifdef X86
> diff --git a/mips.c b/mips.c
> index 4eeab55..6cd8d1f 100644
> --- a/mips.c
> +++ b/mips.c
> @@ -47,10 +47,6 @@ typedef ulong pte_t;
>
> #define MIPS_CPU_RIXI 0x00800000llu
>
> -#define MIPS32_EF_R0 6
> -#define MIPS32_EF_R29 35
> -#define MIPS32_EF_R31 37
> -#define MIPS32_EF_CPU0_EPC 40
>
> static struct machine_specific mips_machine_specific = { 0 };
>
> @@ -650,7 +646,7 @@ mips_dumpfile_stack_frame(struct bt_info *bt, ulong *nip,
> ulong *ksp)
> }
>
> regs = &ms->crash_task_regs[bt->tc->processor];
> - epc = regs->regs[MIPS32_EF_CPU0_EPC];
> + epc = regs->regs[MIPS32_EF_CP0_EPC];
> r29 = regs->regs[MIPS32_EF_R29];
>
> if (!epc && !r29) {
> diff --git a/netdump.c b/netdump.c
> index 3350c28..4b5af9c 100644
> --- a/netdump.c
> +++ b/netdump.c
> @@ -2505,7 +2505,8 @@ display_regs_from_elf_notes(int cpu, FILE *ofp)
> }
> }
>
> - if ((cpu - skipped_count) >= nd->num_prstatus_notes) {
> + if ((cpu - skipped_count) >= nd->num_prstatus_notes &&
> + !machine_type("MIPS")) {
> error(INFO, "registers not collected for cpu %d\n", cpu);
> return;
> }
> @@ -2691,6 +2692,74 @@ display_regs_from_elf_notes(int cpu, FILE *ofp)
> ULONG(user_regs + sizeof(ulong) * 32),
> ULONG(user_regs + sizeof(ulong) * 33),
> UINT(user_regs + sizeof(ulong) * 34));
> + } if (machine_type("MIPS")) {
> + const struct machine_specific *ms = machdep->machspec;
> + struct mips_regset *regs;
> +
> + if (!ms->crash_task_regs) {
> + error(INFO, "registers not collected for cpu %d\n", cpu);
> + return;
> + }
> +
> + regs = &ms->crash_task_regs[cpu];
> + if (!regs->regs[MIPS32_EF_R29] && !regs->regs[MIPS32_EF_CP0_EPC]) {
> + error(INFO, "registers not collected for cpu %d\n", cpu);
> + return;
> + }
> +
> + fprintf(ofp,
> + " R0: %08lx R1: %08lx R2: %08lx\n"
> + " R3: %08lx R4: %08lx R5: %08lx\n"
> + " R6: %08lx R7: %08lx R8: %08lx\n"
> + " R9: %08lx R10: %08lx R11: %08lx\n"
> + " R12: %08lx R13: %08lx R14: %08lx\n"
> + " R15: %08lx R16: %08lx R17: %08lx\n"
> + " R18: %08lx R19: %08lx R20: %08lx\n"
> + " R21: %08lx R22: %08lx R23: %08lx\n"
> + " R24: %08lx R25: %08lx R26: %08lx\n"
> + " R27: %08lx R28: %08lx R29: %08lx\n"
> + " R30: %08lx R31: %08lx\n"
> + " LO: %08lx HI: %08lx\n"
> + " EPC: %08lx BADVADDR: %08lx\n"
> + " STATUS: %08lx CAUSE: %08lx\n",
> + regs->regs[MIPS32_EF_R0],
> + regs->regs[MIPS32_EF_R0 + 1],
> + regs->regs[MIPS32_EF_R0 + 2],
> + regs->regs[MIPS32_EF_R0 + 3],
> + regs->regs[MIPS32_EF_R0 + 4],
> + regs->regs[MIPS32_EF_R0 + 5],
> + regs->regs[MIPS32_EF_R0 + 6],
> + regs->regs[MIPS32_EF_R0 + 7],
> + regs->regs[MIPS32_EF_R0 + 8],
> + regs->regs[MIPS32_EF_R0 + 9],
> + regs->regs[MIPS32_EF_R0 + 10],
> + regs->regs[MIPS32_EF_R0 + 11],
> + regs->regs[MIPS32_EF_R0 + 12],
> + regs->regs[MIPS32_EF_R0 + 13],
> + regs->regs[MIPS32_EF_R0 + 14],
> + regs->regs[MIPS32_EF_R0 + 15],
> + regs->regs[MIPS32_EF_R0 + 16],
> + regs->regs[MIPS32_EF_R0 + 17],
> + regs->regs[MIPS32_EF_R0 + 18],
> + regs->regs[MIPS32_EF_R0 + 19],
> + regs->regs[MIPS32_EF_R0 + 20],
> + regs->regs[MIPS32_EF_R0 + 21],
> + regs->regs[MIPS32_EF_R0 + 22],
> + regs->regs[MIPS32_EF_R0 + 23],
> + regs->regs[MIPS32_EF_R0 + 24],
> + regs->regs[MIPS32_EF_R0 + 25],
> + regs->regs[MIPS32_EF_R0 + 26],
> + regs->regs[MIPS32_EF_R0 + 27],
> + regs->regs[MIPS32_EF_R0 + 28],
> + regs->regs[MIPS32_EF_R0 + 29],
> + regs->regs[MIPS32_EF_R0 + 30],
> + regs->regs[MIPS32_EF_R0 + 31],
> + regs->regs[MIPS32_EF_LO],
> + regs->regs[MIPS32_EF_HI],
> + regs->regs[MIPS32_EF_CP0_EPC],
> + regs->regs[MIPS32_EF_CP0_BADVADDR],
> + regs->regs[MIPS32_EF_CP0_STATUS],
> + regs->regs[MIPS32_EF_CP0_CAUSE]);
> }
> }
>
> @@ -2700,7 +2769,8 @@ dump_registers_for_elf_dumpfiles(void)
> int c;
>
> if (!(machine_type("X86") || machine_type("X86_64") ||
> - machine_type("ARM64") || machine_type("PPC64")))
> + machine_type("ARM64") || machine_type("PPC64") ||
> + machine_type("MIPS")))
> error(FATAL, "-r option not supported for this dumpfile\n");
>
> if (NETDUMP_DUMPFILE()) {
> --
> 2.1.4
>
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