[Crash-utility] [PATCH v2] x86_64: Make the conversion between 4level and 5level paging automatically

[Dave Anderson]

----- Original Message -----
> 
> 
> At 07/12/2018 02:23 AM, Dave Anderson wrote:
> > 
> > 
> > ----- Original Message -----
> >>
> >>
> >> ----- Original Message -----
> >>> Hi Dave,
> >>>
> >>> At 07/11/2018 03:33 AM, Dave Anderson wrote:
> >>>>
> >>>> The final phase of support would be making this work:
> >>>>
> >>>>     static int
> >>>>     x86_64_task_uses_5level(struct task_context *tc)
> >>>>     {
> >>>>             return FALSE;
> >>>>     }
> >>>>
> >>>> Have you had a chance to look at how that can be done?
> >>>>
> >>>
> >>> I have no idea to check if 5level paging is used in User-space.
> >>>
> >>> You gave me some methods, and I have try:
> >>>
> >>>     -The MAP_FIXED flag
> >>>     -check if the contents of the page directory or p4d is 'flods'
> >>
> >> It would be most helpful if you can compare two tasks, one with 5-level
> >> and one without, and see if there's anything obviously different.
> >> (I don't know what "flods" means)
> > 
> > Ah, sorry, you mean if the top-level page directory folds back into itself.
> > 
> > So yes, I wonder if it would be obvious enough by checking whether the
> > top-level pgd folds back into itself, and if so, 4-levels of page tables
> > are in use?  But if that were the case, it seems that the 5-level translation
> > code would work on both types of user-space tasks.  I just don't understand
> > how it's supposed to work.
> > 
> 
> OK, let me try to clarify if the the 5-level translation code would work
> on both types of user-space tasks at first. ;-)
> 
> Thank you so much for you kind explanation!
> 
> 	dou.

Hi Dou,

That leads me to this question:  can you confirm that this crash patch 
works with a kernel that is configured with CONFIG_X86_5LEVEL, but either:

  (1) the kernel was booted with "no5lvl", or
  (2) the host hardware does not have the X86_CR4_LA57 bit set

Thanks,
  Dave