[edk2-devel] [edk2-platforms Patch 08/14] Vlv2TbltDevicePkg: Remove use of Data Hub Protocol
Michael D Kinney
michael.d.kinney at intel.com
Mon Jul 1 02:55:47 UTC 2019
Update all platform code to stop using the Data Hub Protocol
from the IntelFrameworkPkg.
Cc: Zailiang Sun <zailiang.sun at intel.com>
Cc: Yi Qian <yi.qian at intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney at intel.com>
---
.../Vlv2TbltDevicePkg/Include/Guid/IdccData.h | 104 -
.../Vlv2TbltDevicePkg/Include/Guid/ItkData.h | 18 +-
.../Vlv2TbltDevicePkg/PlatformDxe/BoardId.c | 45 +-
.../PlatformDxe/ClockControl.c | 80 +-
.../Vlv2TbltDevicePkg/PlatformDxe/IdccInfo.c | 72 -
.../Vlv2TbltDevicePkg/PlatformDxe/Platform.c | 1 -
.../PlatformDxe/PlatformDxe.h | 2 -
.../PlatformDxe/PlatformDxe.inf | 2 -
.../Intel/Vlv2TbltDevicePkg/PlatformPkg.dec | 1 -
.../Intel/Vlv2TbltDevicePkg/PlatformPkg.fdf | 6 -
.../Vlv2TbltDevicePkg/PlatformPkgConfig.dsc | 1 -
.../Vlv2TbltDevicePkg/PlatformPkgGcc.fdf | 6 -
.../Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 7 -
.../Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 7 -
.../Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 7 -
.../PlatformSetupDxe/PlatformSetupDxe.h | 2 -
.../PlatformSetupDxe/SetupFunctions.c | 38 +-
.../PlatformSetupDxe/SetupInfoRecords.c | 477 +--
.../SmBiosMiscDxe/CommonHeader.h | 10 +-
.../SmBiosMiscDxe/DataHubRecords.h | 2934 +++++++++++++++++
.../SmBiosMiscDxe/MiscMemoryDeviceFunction.c | 318 +-
.../SmBiosMiscDxe/MiscOemType0x94Function.c | 1 -
.../SmBiosMiscDxe/MiscProcessorCacheData.c | 11 +-
.../MiscProcessorCacheFunction.c | 273 +-
.../MiscProcessorInformationFunction.c | 203 +-
.../MiscSubclassDriverDataTable.c | 14 +-
.../MiscSubclassDriverEntryPoint.c | 13 +-
.../SmBiosMiscDxe/SmBiosMiscDxe.inf | 3 +-
.../VlvPlatformInitDxe/IgdOpRegion.c | 3 -
.../VlvPlatformInitDxe/VlvPlatformInitDxe.inf | 6 +-
30 files changed, 3458 insertions(+), 1207 deletions(-)
delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/IdccData.h
delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IdccInfo.c
create mode 100644 Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/DataHubRecords.h
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/IdccData.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/IdccData.h
deleted file mode 100644
index 7e3b965666..0000000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/IdccData.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*++
-
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
-
-Module Name:
-
- IdccData.h
-
-Abstract:
-
---*/
-
-#ifndef _IDCCDATAHUB_GUID_H_
-#define _IDCCDATAHUB_GUID_H_
-
-//
-// This GUID is for the IDCC related data found in the Data Hub.
-//
-#define IDCC_DATA_HUB_GUID \
- { 0x788e1d9f, 0x1eab, 0x47d2, 0xa2, 0xf3, 0x78, 0xca, 0xe8, 0x7d, 0x60, 0x12 }
-
-extern EFI_GUID gIdccDataHubGuid;
-
-#pragma pack(1)
-
-typedef struct {
- UINT32 Type;
- UINT32 RecordLength;
-} EFI_IDCC_DATA_HEADER;
-
-typedef struct {
- EFI_IDCC_DATA_HEADER IdccHeader;
- UINT32 Tcontrol;
-} EFI_IDCC_TCONTROL;
-
-typedef struct {
- UINT32 EntryCount;
-} EFI_IDCC_CLOCK_COMMON;
-
-typedef struct {
- UINT8 Polarity;
- UINT8 Percent;
- UINT32 FpValue;
-} EFI_IDCC_TYPE_2_DATA;
-
-typedef struct {
- UINT8 SetupVal;
- UINT32 FpValue;
-} EFI_IDCC_TYPE_3_4_DATA;
-
-typedef struct {
- EFI_IDCC_DATA_HEADER IdccHeader;
- UINT32 ProcessorRatio;
-} EFI_IDCC_PROCESSOR_RATIO;
-
-typedef struct {
- EFI_IDCC_DATA_HEADER IdccHeader;
- UINT32 BoardFormFactor;
-} EFI_IDCC_BOARD_FORM_FACTOR;
-
-typedef struct {
- EFI_IDCC_DATA_HEADER IdccHeader;
- UINT32 ProcessorInfo;
-} EFI_IDCC_PROCESSOR_INFO;
-
-#define EFI_IDCC_PROCESSOR_UNCON (1 << 0) // Bit 0: UnCon CPU
-#define EFI_IDCC_PROCESSOR_UNLOCK (1 << 1) // Bit 1: UnLock CPU
-#define EFI_IDCC_PROCESSOR_CNR (1 << 2) // Bit 2: CNR CPU
-#define EFI_IDCC_PROCESSOR_KNF (1 << 3) // Bit 3: KNF CPU
-
-typedef struct {
- EFI_IDCC_DATA_HEADER IdccHeader;
- UINT32 MinFSB;
- UINT32 MaxFSB;
- UINT8 StepFSB;
-} EFI_IDCC_FSB_DATA;
-
-#pragma pack()
-
-#define EFI_IDCC_POSITIVE 0
-#define EFI_IDCC_NEGATIVE 1
-
-//
-// Board Form Factor equates.
-//
-#define ATX_FORM_FACTOR 0x00
-#define BTX_FORM_FACTOR 0x01
-
-
-#define EFI_IDCC_TCONTROL_TYPE 1
-#define EFI_IDCC_FSB_TYPE 2
-#define EFI_IDCC_PCI_TYPE 3
-#define EFI_IDCC_PCIE_TYPE 4
-#define EFI_IDCC_PROC_RATIO_TYPE 5
-#define EFI_IDCC_BOARD_FORM_FACTOR_TYPE 6
-#define EFI_IDCC_PROC_INFO_TYPE 7
-#define EFI_IDCC_FSB_DATA_TYPE 8
-
-#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/ItkData.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/ItkData.h
index e7bd29e6e4..2dcaac15f3 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/ItkData.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/ItkData.h
@@ -1,11 +1,9 @@
/*++
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
Module Name:
ItkData.h
@@ -14,16 +12,8 @@ Abstract:
--*/
-#ifndef _ITKDATAHUB_GUID_H_
-#define _ITKDATAHUB_GUID_H_
-
-//
-// This GUID is for the ITK related data found in the Data Hub {E7060843-A336-4d5b-9598-13402F5D7375}
-//
-#define ITK_DATA_HUB_GUID \
- { 0xe7060843, 0xa336, 0x4d5b, 0x95, 0x98, 0x13, 0x40, 0x2f, 0x5d, 0x73, 0x75 }
-
-extern EFI_GUID gItkDataHubGuid;
+#ifndef _ITKDATA_GUID_H_
+#define _ITKDATA_GUID_H_
//
// This GUID is for the ITK related data found in a Variable {3812723D-7E48-4e29-BC27-F5A39AC94EF1}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/BoardId.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/BoardId.c
index 7d774568e3..66c76453a8 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/BoardId.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/BoardId.c
@@ -1,11 +1,9 @@
/** @file
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
Module Name:
@@ -23,13 +21,9 @@ Abstract:
#include "PchRegs.h"
#include "PlatformDxe.h"
-#include <Guid/IdccData.h>
#include <Guid/EfiVpdData.h>
-#include <Protocol/DataHub.h>
-extern EFI_GUID mPlatformDriverGuid;
-
//
// Global module data
//
@@ -52,8 +46,6 @@ InitializeBoardId (
{
UINT32 BoardIdBufferSize;
- EFI_IDCC_BOARD_FORM_FACTOR IdccBoardFormFactor;
- EFI_DATA_HUB_PROTOCOL *DataHub;
EFI_STATUS Status;
DMI_DATA DmiDataVariable;
UINTN Size;
@@ -186,38 +178,5 @@ InitializeBoardId (
BoardIdBufferSize,
&mBoardFeatures
);
-
- //
- // Get the Data Hub protocol
- //
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (VOID **) &DataHub
- );
- if (!(EFI_ERROR(Status))) {
- //
- // Fill out data
- //
- IdccBoardFormFactor.IdccHeader.Type = EFI_IDCC_BOARD_FORM_FACTOR_TYPE;
- IdccBoardFormFactor.IdccHeader.RecordLength = sizeof(EFI_IDCC_BOARD_FORM_FACTOR);
- if ((mBoardFeatures & B_BOARD_FEATURES_FORM_FACTOR_ATX) || (mBoardFeatures & B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX)) {
- IdccBoardFormFactor.BoardFormFactor = ATX_FORM_FACTOR; // ATX
- } else {
- IdccBoardFormFactor.BoardFormFactor = BTX_FORM_FACTOR; // BTX
- }
-
- //
- // Publish the Board Form Factor value for IDCC
- //
- Status = DataHub->LogData (
- DataHub,
- &gIdccDataHubGuid,
- &mPlatformDriverGuid,
- EFI_DATA_RECORD_CLASS_DATA,
- &IdccBoardFormFactor,
- sizeof(EFI_IDCC_BOARD_FORM_FACTOR)
- );
- }
}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/ClockControl.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/ClockControl.c
index 1669f0357f..596f55bcbe 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/ClockControl.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/ClockControl.c
@@ -1,11 +1,9 @@
/** @file
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
Module Name:
@@ -75,71 +73,6 @@ EFI_CLOCK_PLATFORM_INFO mAtxClockSettings = {
sizeof(mAtxSxClocks) / sizeof(mAtxSxClocks[0])
};
-#if defined( RVP_SUPPORT ) && RVP_SUPPORT
-//
-// RVP Clock Settings
-//
-// Static clock table.
-// This should be used to define any clock settings that are static
-// (Always On or Always Off). Dynamic clocks should be set to enabled
-// in this table.
-//
-//UPSD_TBD Check with Jan if any porting required.
-//
-EFI_STATIC_SIGNALS mRvpStaticClocks[] = {
- {SrcClk11, Enabled, All}, // Not used/not present but leave coding enabled
- {SrcClk10, Enabled, All}, // Not used/not present but leave coding enabled
- {SrcClk9, Enabled, All}, // Not used/not present but leave coding enabled
- {SrcClk8, Enabled, All}, // ICHSATAII
- {SrcClk7, Enabled, All}, // DPL_REFSSCLKIN
- {SrcClk6, Enabled, All}, // 100M_MCH
- {SrcClk5, Enabled, All}, // Mini-PCIe //TODO PNV: Need to check ICH GPIO38:
- // 0: turn on; 1: turn off
- {SrcClk4, Enabled, All}, // ICHSATA
- {SrcClk3, Enabled, All}, // 100M_ICH
- {SrcClk2, Enabled, All}, // 100M_LAN
- {SrcClk1, Enabled, All}, // 25M_LAN
- {SrcClk0, Enabled, All}, // 96M_DREF
- {Ref0, Enabled, All},
- {Dot96, Enabled, All},
- {Usb48, Enabled, All},
- {PciClkF5, Enabled, All}, // 33M_ICH
- {PciClk0, Enabled, All}, // 33M_RISER
- {PciClk1, Enabled, All}, // 33M_RISER
- {PciClk2, Enabled, All}, // VDD_Clock
- {PciClk3, Enabled, All}, // 33M_S1
- {PciClk4, Enabled, All}, // 33M_PA
-};
-
-//
-// Dynamic clock table
-// This is used to determine if a clock should be left on or turned off based
-// on the presence of a device. The bridge information is used so the bus
-// number for the device to be detected can be found.
-//
-
-//
-// ClockSxInfo Table
-// This is a list of clocks that need to be set to a known state when the
-// system enters S4 or S5.
-//
-EFI_STATIC_SIGNALS mRvpSxClocks[] = {
- {SaveClockConfiguration, Disabled, All}
-};
-
-//
-// RVP settings structure
-//
-EFI_CLOCK_PLATFORM_INFO mRvpClockSettings = {
- mRvpStaticClocks,
- sizeof(mRvpStaticClocks) / sizeof(mRvpStaticClocks[0]),
- 0, // No clocks will be turned off mRvpDynamicClocks,
- 0, // No clocks will be turned off sizeof(mRvpDynamicClocks) / sizeof(mRvpDynamicClocks[0]),
- mRvpSxClocks,
- sizeof(mRvpSxClocks) / sizeof(mRvpSxClocks[0])
-};
-#endif
-
VOID
InitializeClockRouting(
)
@@ -165,12 +98,6 @@ InitializeClockRouting(
);
if (!EFI_ERROR (Status)) {
-#if defined( RVP_SUPPORT ) && RVP_SUPPORT
- if (BoardIdVar & B_BOARD_FEATURES_RVP) {
- ClockPolicy = &mRvpClockSettings;
- }
-#else
-
//
// Isolate board type information
//
@@ -183,9 +110,6 @@ InitializeClockRouting(
BoardIdVar == B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX) {
ClockPolicy = &mAtxClockSettings;
}
-
-#endif
-
}
Handle = NULL;
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IdccInfo.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IdccInfo.c
deleted file mode 100644
index 3b3e4b4c82..0000000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IdccInfo.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/** @file
-
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
-Module Name:
-
-
- IdccInfo.c
-
-Abstract:
-
- Platform information used by IDCC.
-
-Revision History
-
---*/
-
-#include "PlatformDxe.h"
-
-#include <Guid/IdccData.h>
-
-extern EFI_GUID mPlatformDriverGuid;
-
-
-EFI_STATUS
-WriteIdccInfo (
- )
-{
- EFI_STATUS Status;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- UINT8 Ratio;
- EFI_IDCC_PROCESSOR_RATIO ProcRatio;
-
- //
- // Locate the data hub protocol
- //
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (VOID **) &DataHub
- );
-
- //
- // Find processor actual ratio
- //
- Ratio = 15; //Temporary - some dummy value.
-
- //
- // Fill in IDCC Type 5 structure
- //
- ProcRatio.IdccHeader.Type = EFI_IDCC_PROC_RATIO_TYPE;
- ProcRatio.IdccHeader.RecordLength = sizeof(EFI_IDCC_PROCESSOR_RATIO);
- ProcRatio.ProcessorRatio = Ratio;
-
- //
- // Write data to the data hub
- //
- Status = DataHub->LogData (
- DataHub,
- &gIdccDataHubGuid,
- &mPlatformDriverGuid,
- EFI_DATA_RECORD_CLASS_DATA,
- &ProcRatio,
- sizeof(EFI_IDCC_PROCESSOR_RATIO)
- );
-
- return Status;
-}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c
index 7e083e3933..0bc3f44c49 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c
@@ -55,7 +55,6 @@ GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =
EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;
-EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;
SYSTEM_CONFIGURATION mSystemConfiguration;
EFI_HANDLE mImageHandle;
BOOLEAN mMfgMode = FALSE;
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h
index 5c60f823de..f2f0097efc 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h
@@ -43,8 +43,6 @@ Abstract:
#include <Protocol/CpuIo2.h>
#include <Guid/GlobalVariable.h>
#include <Guid/BoardFeatures.h>
-#include <Guid/DataHubRecords.h>
-#include <Protocol/DataHub.h>
#include <Protocol/PciIo.h>
#include <Protocol/Speaker.h>
#include <IndustryStandard/Pci22.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
index 0c432642e4..a9ef744ef7 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
@@ -35,7 +35,6 @@ [sources.common]
ClockControl.c
Platform.c
IchRegTable.c
- IdccInfo.c
IchPlatformPolicy.c
PciDevice.c
SlotConfig.c
@@ -80,7 +79,6 @@ [Guids]
gEfiBoardFeaturesGuid
gItkDataVarGuid
gDmiDataGuid
- gIdccDataHubGuid
gEfiPciLanInfoGuid
gEfiNormalSetupGuid
gEfiGlobalVariableGuid
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.dec b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.dec
index bfde7be398..5b255f4b05 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.dec
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.dec
@@ -41,7 +41,6 @@ [Guids]
gEfiBoardFeaturesGuid = { 0x94b9e8ae, 0x8877, 0x479a, { 0x98, 0x42, 0xf5, 0x97, 0x4b, 0x82, 0xce, 0xd3 } }
gItkDataVarGuid = { 0x3812723d, 0x7e48, 0x4e29, { 0xbc, 0x27, 0xf5, 0xa3, 0x9a, 0xc9, 0x4e, 0xf1 } }
gDmiDataGuid = { 0x70e56c5e, 0x280c, 0x44b0, { 0xa4, 0x97, 0x09, 0x68, 0x1a, 0xbc, 0x37, 0x5e } }
- gIdccDataHubGuid = { 0x788e1d9f, 0x1eab, 0x47d2, { 0xa2, 0xf3, 0x78, 0xca, 0xe8, 0x7d, 0x60, 0x12 } }
gEfiSetupVariableGuid = { 0xec87d643, 0xeba4, 0x4bb5, { 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0x0d, 0xa9 } }
gEfiPlatformInfoGuid = { 0x1e2acc41, 0xe26a, 0x483d, { 0xaf, 0xc7, 0xa0, 0x56, 0xc3, 0x4e, 0x08, 0x7b } }
gMfgModeVariableGuid = { 0xEF14FD78, 0x0793, 0x4e2b, { 0xAC, 0x6D, 0x06, 0x28, 0x47, 0xE0, 0x17, 0x91 } }
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.fdf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.fdf
index 4c60d0a0f2..15a4251cf8 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.fdf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkg.fdf
@@ -430,9 +430,6 @@ [FV.FVMAIN]
INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
-!if $(DATAHUB_ENABLE) == TRUE
-INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
-!endif
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
@@ -584,9 +581,6 @@ [FV.FVMAIN]
INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
-INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
-
-
#
# FAT file system
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgConfig.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgConfig.dsc
index d5068b514c..7b48d7b44e 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgConfig.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgConfig.dsc
@@ -48,7 +48,6 @@
DEFINE MICOCODE_CAPSULE_ENABLE = TRUE
DEFINE GOP_DRIVER_ENABLE = TRUE
-DEFINE DATAHUB_ENABLE = TRUE
DEFINE USB_ENABLE = TRUE
DEFINE ISA_SERIAL_STATUS_CODE_ENABLE = TRUE
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
index 61e1adcd14..b8ac61d710 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
@@ -376,9 +376,6 @@ [FV.FVMAIN]
INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
-!if $(DATAHUB_ENABLE) == TRUE
-INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
-!endif
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
@@ -530,9 +527,6 @@ [FV.FVMAIN]
INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
-INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
-
-
#
# FAT file system
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
index 25d1beb400..b16883e98c 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
@@ -984,12 +984,6 @@ [Components.X64]
Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
-!if $(DATAHUB_ENABLE) == TRUE
- IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf {
- <PcdsFixedAtBuild>
- gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0
- }
-!endif
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
@@ -1212,7 +1206,6 @@ [Components.X64]
MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
- Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
#
# CPU/FW Microde
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
index 8a5c42577d..c9335a98c8 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
@@ -968,12 +968,6 @@ [Components.IA32]
Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
-!if $(DATAHUB_ENABLE) == TRUE
- IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf {
- <PcdsFixedAtBuild>
- gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0
- }
-!endif
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
@@ -1196,7 +1190,6 @@ [Components.IA32]
MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
- Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
#
# CPU/FW Microde
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
index c0fe0892ac..fd9ddebfd9 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
@@ -983,12 +983,6 @@ [Components.X64]
Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
-!if $(DATAHUB_ENABLE) == TRUE
- IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf {
- <PcdsFixedAtBuild>
- gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0
- }
-!endif
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
@@ -1211,7 +1205,6 @@ [Components.X64]
MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
- Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
#
# CPU/FW Microde
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
index 1ba75175e1..b4a30511ac 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
@@ -25,10 +25,8 @@
#include <Protocol/DevicePathToText.h>
#include <Protocol/DevicePath.h>
#include <Protocol/PlatformDriverOverride.h>
-#include <Protocol/DataHub.h>
#include <Guid/MdeModuleHii.h>
#include <Guid/VariableFormat.h>
-#include <Guid/DataHubRecords.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupFunctions.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupFunctions.c
index a84b425826..f3bc823056 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupFunctions.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupFunctions.c
@@ -1,12 +1,9 @@
/** @file
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
SetupFunctions.c
@@ -52,34 +49,3 @@ SwapEntries (
return;
}
-
-UINT32
-ConvertBase10ToRaw (
- IN EFI_EXP_BASE10_DATA *Data)
-{
- UINTN Index;
- UINT32 RawData;
-
- RawData = Data->Value;
- for (Index = 0; Index < (UINTN) Data->Exponent; Index++) {
- RawData *= 10;
- }
-
- return RawData;
-}
-
-UINT32
-ConvertBase2ToRaw (
- IN EFI_EXP_BASE2_DATA *Data)
-{
- UINTN Index;
- UINT32 RawData;
-
- RawData = Data->Value;
- for (Index = 0; Index < (UINTN) Data->Exponent; Index++) {
- RawData <<= 1;
- }
-
- return RawData;
-}
-
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
index c767021aed..efd4a723e1 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
@@ -79,9 +79,6 @@ SB_REV SBRevisionTable[] = {
BOOLEAN mSetupInfoDone = FALSE;
UINT8 mUseProductKey = 0;
-EFI_EXP_BASE10_DATA mProcessorFrequency;
-EFI_EXP_BASE10_DATA mProcessorFsbFrequency;
-
EFI_GUID mProcessorProducerGuid;
EFI_HII_HANDLE mHiiHandle;
EFI_PLATFORM_CPU_INFO mPlatformCpuInfo;
@@ -91,50 +88,7 @@ EFI_PLATFORM_INFO_HOB *mPlatformInfo;
#define memset SetMem
-UINT16 mMemorySpeed = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelASlot0 = 0;
-UINT16 mMemorySpeedChannelASlot0 = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelASlot1 = 0;
-UINT16 mMemorySpeedChannelASlot1 = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelBSlot0 = 0;
-UINT16 mMemorySpeedChannelBSlot0 = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelBSlot1 = 0;
-UINT16 mMemorySpeedChannelBSlot1 = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelCSlot0 = 0;
-UINT16 mMemorySpeedChannelCSlot0 = 0xffff;
-EFI_PHYSICAL_ADDRESS mMemorySizeChannelCSlot1 = 0;
-UINT16 mMemorySpeedChannelCSlot1 = 0xffff;
-UINTN mMemoryMode = 0xff;
-
#define CHARACTER_NUMBER_FOR_VALUE 30
- typedef struct {
- EFI_STRING_TOKEN MemoryDeviceLocator;
- EFI_STRING_TOKEN MemoryBankLocator;
- EFI_STRING_TOKEN MemoryManufacturer;
- EFI_STRING_TOKEN MemorySerialNumber;
- EFI_STRING_TOKEN MemoryAssetTag;
- EFI_STRING_TOKEN MemoryPartNumber;
- EFI_INTER_LINK_DATA MemoryArrayLink;
- EFI_INTER_LINK_DATA MemorySubArrayLink;
- UINT16 MemoryTotalWidth;
- UINT16 MemoryDataWidth;
- UINT64 MemoryDeviceSize;
- EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
- UINT8 MemoryDeviceSet;
- EFI_MEMORY_ARRAY_TYPE MemoryType;
- EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
- UINT16 MemorySpeed;
- EFI_MEMORY_STATE MemoryState;
-} EFI_MEMORY_ARRAY_LINK;
-
-
-typedef struct {
- EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
- EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
- EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
- UINT16 MemoryArrayPartitionWidth;
-} EFI_MEMORY_ARRAY_START_ADDRESS;
-
typedef enum {
PCH_SATA_MODE_IDE = 0,
@@ -421,73 +375,6 @@ VOID UpdateLatestBootTime() {
HiiSetString(mHiiHandle,STRING_TOKEN(STR_LOG_BOOT_TIME_VALUE), Buffer, NULL);
}
-/**
- Get Cache Type for the specified Cache. This function is invoked when there is data records
- available in the Data Hub.
-
- Get Cache Type function arguments:
-
- @param Instance The instance number of the subclass with the same ProducerName..
- @param SubInstance The instance number of the RecordType for the same Instance.
- @param CacheType Cache type, see definition of EFI_CACHE_TYPE_DATA.
-
- @retval EFI_STATUS
-
-**/
-EFI_STATUS
-GetCacheType(
- IN UINT16 Instance,
- IN UINT16 SubInstance,
- IN EFI_CACHE_TYPE_DATA* CacheType)
-{
- EFI_STATUS Status;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- EFI_DATA_RECORD_HEADER *Record;
- UINT64 MonotonicCount;
- EFI_CACHE_VARIABLE_RECORD* CacheVariableRecord;
- EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
-
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (void **)&DataHub
- );
- ASSERT_EFI_ERROR(Status);
-
- //
- // Get all available data records from data hub
- //
- MonotonicCount = 0;
- Record = NULL;
-
- do {
- Status = DataHub->GetNextRecord (
- DataHub,
- &MonotonicCount,
- NULL,
- &Record
- );
- if (!EFI_ERROR(Status)) {
- if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
- DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
-
- if(CompareGuid(&Record->DataRecordGuid, &gEfiCacheSubClassGuid) &&
- (DataHeader->RecordType == CacheTypeRecordType) &&
- (DataHeader->Instance == Instance) &&
- (DataHeader->SubInstance == SubInstance)) {
- CacheVariableRecord = (EFI_CACHE_VARIABLE_RECORD *)(DataHeader + 1);
- if(CacheType){
- *CacheType = CacheVariableRecord->CacheType;
- return EFI_SUCCESS;
- }
- }
- }
- }
- } while(!EFI_ERROR(Status) && (MonotonicCount != 0));
-
- return EFI_NOT_FOUND;
-}
-
/**
Setup data filter function. This function is invoked when there is data records
available in the Data Hub.
@@ -504,230 +391,23 @@ VOID
PrepareSetupInformation (
)
{
-
EFI_STATUS Status;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- EFI_DATA_RECORD_HEADER *Record;
- UINT8 *SrcData;
- EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
CHAR16 *NewString;
- CHAR16 *NewString2;
- CHAR16 *NewStringToken;
STRING_REF TokenToUpdate;
- EFI_PROCESSOR_VERSION_DATA *ProcessorVersion;
- UINTN Index;
- UINTN DataOutput;
-
- EFI_PROCESSOR_MICROCODE_REVISION_DATA *CpuUcodeRevisionData;
- EFI_MEMORY_ARRAY_START_ADDRESS *MemoryArray;
- EFI_MEMORY_ARRAY_LINK *MemoryArrayLink;
- UINT64 MonotonicCount;
-
CHAR16 Version[100]; //Assuming that strings are < 100 UCHAR
CHAR16 ReleaseDate[100]; //Assuming that strings are < 100 UCHAR
CHAR16 ReleaseTime[100]; //Assuming that strings are < 100 UCHAR
NewString = AllocateZeroPool (0x100);
- NewString2 = AllocateZeroPool (0x100);
SetMem(Version, sizeof(Version), 0);
SetMem(ReleaseDate, sizeof(ReleaseDate), 0);
SetMem(ReleaseTime, sizeof(ReleaseTime), 0);
- //
- // Get the Data Hub Protocol. Assume only one instance
- //
- Status = gBS->LocateProtocol (&gEfiDataHubProtocolGuid, NULL, (void **)&DataHub);
- ASSERT_EFI_ERROR(Status);
-
- //
- // Get all available data records from data hub
- //
- MonotonicCount = 0;
- Record = NULL;
-
- do {
- Status = DataHub->GetNextRecord (DataHub, &MonotonicCount, NULL, &Record);
- if (!EFI_ERROR(Status)) {
- if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
- DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
- SrcData = (UINT8 *)(DataHeader + 1);
-
- //
- // Processor
- //
- if (CompareGuid(&Record->DataRecordGuid, &gEfiProcessorSubClassGuid)) {
- CopyMem (&mProcessorProducerGuid, &Record->ProducerName, sizeof(EFI_GUID));
- switch (DataHeader->RecordType) {
- case ProcessorCoreFrequencyRecordType:
- CopyMem(&mProcessorFrequency, SrcData, sizeof(EFI_EXP_BASE10_DATA));
- Index = EfiValueToString (
- NewString,
- ConvertBase10ToRaw ((EFI_EXP_BASE10_DATA *)SrcData)/1000000000,
- PREFIX_ZERO,
- 0
- );
- StrCat (NewString, L".");
- EfiValueToString (
- NewString + Index + 1,
- ((ConvertBase10ToRaw ((EFI_EXP_BASE10_DATA *)SrcData)%1000000000)/10000000),
- PREFIX_ZERO,
- 0
- );
- StrCat (NewString, L" GHz");
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_SPEED_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- break;
-
- case ProcessorVersionRecordType:
- ProcessorVersion = (EFI_PROCESSOR_VERSION_DATA *)SrcData;
- NewStringToken = HiiGetPackageString(&mProcessorProducerGuid, *ProcessorVersion, NULL);
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_VERSION_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, NewStringToken, NULL);
- break;
- case CpuUcodeRevisionDataRecordType:
- CpuUcodeRevisionData = (EFI_PROCESSOR_MICROCODE_REVISION_DATA *) SrcData;
- if (CpuUcodeRevisionData->ProcessorMicrocodeRevisionNumber != 0) {
- EfiValueToHexStr (
- NewString,
- CpuUcodeRevisionData->ProcessorMicrocodeRevisionNumber,
- PREFIX_ZERO,
- 8
- );
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_MICROCODE_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- }
- break;
- default:
- break;
- }
-
- //
- // Cache
- //
- } else if (CompareGuid(&Record->DataRecordGuid, &gEfiCacheSubClassGuid) &&
- (DataHeader->RecordType == CacheSizeRecordType)) {
- if (DataHeader->SubInstance == EFI_CACHE_L1) {
- EFI_CACHE_TYPE_DATA CacheType;
- if (EFI_SUCCESS == GetCacheType(DataHeader->Instance, DataHeader->SubInstance,&CacheType)){
- if (CacheType == EfiCacheTypeData) {
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_L1_DATA_CACHE_VALUE;
- } else if (CacheType == EfiCacheTypeInstruction) {
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_L1_INSTR_CACHE_VALUE;
- } else {
- continue;
- }
- } else {
- continue;
- }
- }
- else if (DataHeader->SubInstance == EFI_CACHE_L2) {
- TokenToUpdate = (STRING_REF)STR_PROCESSOR_L2_CACHE_VALUE;
- } else {
- continue;
- }
- if (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA *)SrcData)) {
- DataOutput = ConvertBase2ToRaw((EFI_EXP_BASE2_DATA *)SrcData) >> 10;
- EfiValueToString (NewString, DataOutput, PREFIX_ZERO, 0);
-
- StrCat (NewString, L" KB");
- if (DataHeader->SubInstance == EFI_CACHE_L3) {
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- } else if(DataHeader->SubInstance == EFI_CACHE_L2 && mPlatformCpuInfo.CpuPackage.CoresPerPhysicalPackage > 1){
- //
- // Show XxL2 string
- //
- EfiValueToString (
- NewString2,
- mPlatformCpuInfo.CpuPackage.CoresPerPhysicalPackage,
- PREFIX_ZERO,
- 0
- );
- StrCat(NewString2, L"x ");
- StrCat(NewString2, NewString);
- HiiSetString(mHiiHandle, TokenToUpdate, NewString2, NULL);
- } else {
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- }
- }
-
- //
- // Memory
- //
- } else if (CompareGuid(&Record->DataRecordGuid, &gEfiMemorySubClassGuid)) {
- switch (DataHeader->RecordType) {
- case EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER:
- MemoryArrayLink = (EFI_MEMORY_ARRAY_LINK *)SrcData;
-
- if (MemoryArrayLink->MemorySpeed > 0) {
- //
- // Save the lowest speed memory module
- //
- if (MemoryArrayLink->MemorySpeed < mMemorySpeed) {
- mMemorySpeed = MemoryArrayLink->MemorySpeed;
- }
- switch (DataHeader->SubInstance) {
- case 1:
- mMemorySpeedChannelASlot0 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelASlot0 = MemoryArrayLink->MemoryDeviceSize;
- break;
- case 2:
- mMemorySpeedChannelASlot1 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelASlot1 = MemoryArrayLink->MemoryDeviceSize;
- break;
- case 3:
- mMemorySpeedChannelBSlot0 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelBSlot0 = MemoryArrayLink->MemoryDeviceSize;
- break;
- case 4:
- mMemorySpeedChannelBSlot1 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelBSlot1 = MemoryArrayLink->MemoryDeviceSize;
- break;
- case 5:
- mMemorySpeedChannelCSlot0 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelCSlot0 = MemoryArrayLink->MemoryDeviceSize;
- break;
- case 6:
- mMemorySpeedChannelCSlot1 = MemoryArrayLink->MemorySpeed;
- mMemorySizeChannelCSlot1 = MemoryArrayLink->MemoryDeviceSize;
- break;
- default:
- break;
- }
- }
- break;
-
- case EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER:
- MemoryArray = (EFI_MEMORY_ARRAY_START_ADDRESS *)SrcData;
- if (MemoryArray->MemoryArrayEndAddress - MemoryArray->MemoryArrayStartAddress) {
- DataOutput = (UINTN)RShiftU64((MemoryArray->MemoryArrayEndAddress - MemoryArray->MemoryArrayStartAddress + 1), 20);
- EfiValueToString (NewString, DataOutput / 1024, PREFIX_ZERO, 0);
- if(DataOutput % 1024) {
- StrCat (NewString, L".");
- DataOutput = ((DataOutput % 1024) * 1000) / 1024;
- while(!(DataOutput % 10))
- DataOutput = DataOutput / 10;
- EfiValueToString (NewString2, DataOutput, PREFIX_ZERO, 0);
- StrCat (NewString, NewString2);
- }
- StrCat (NewString, L" GB");
- TokenToUpdate = (STRING_REF)STR_TOTAL_MEMORY_SIZE_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- }
- break;
-
- default:
- break;
- }
- }
- }
- }
- } while (!EFI_ERROR(Status) && (MonotonicCount != 0));
-
Status = GetBiosVersionDateTime (
Version,
- ReleaseDate,
- ReleaseTime
- );
+ ReleaseDate,
+ ReleaseTime
+ );
DEBUG ((EFI_D_ERROR, "GetBiosVersionDateTime :%s %s %s \n", Version, ReleaseDate, ReleaseTime));
if (!EFI_ERROR (Status)) {
@@ -750,24 +430,7 @@ PrepareSetupInformation (
HiiSetString(mHiiHandle, TokenToUpdate, BuildDateTime, NULL);
}
- //
- // Calculate and update memory speed display in Main Page
- //
- //
- // Update the overall memory speed
- //
- if (mMemorySpeed != 0xffff) {
- EfiValueToString (NewString, mMemorySpeed, PREFIX_ZERO, 0);
- StrCat (NewString, L" MHz");
-
- TokenToUpdate = (STRING_REF)STR_SYSTEM_MEMORY_SPEED_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, NewString, NULL);
- }
-
gBS->FreePool(NewString);
- gBS->FreePool(NewString2);
-
- return;
}
/**
@@ -782,65 +445,23 @@ UpdateAdditionalInformation (
)
{
EFI_STATUS Status;
- UINT64 MonotonicCount;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- EFI_DATA_RECORD_HEADER *Record;
- EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
EFI_SMBIOS_PROTOCOL *Smbios;
EFI_SMBIOS_HANDLE SmbiosHandle;
EFI_SMBIOS_TABLE_HEADER *SmbiosRecord;
SMBIOS_TABLE_TYPE0 *Type0Record;
+ SMBIOS_TABLE_TYPE4 *Type4Record;
+ SMBIOS_TABLE_TYPE7 *Type7Record;
+ SMBIOS_TABLE_TYPE17 *Type17Record;
UINT8 StrIndex;
CHAR16 *BiosVersion = NULL;
+ CHAR16 *ProcessorVersion = NULL;
CHAR16 *IfwiVersion = NULL;
UINT16 SearchIndex;
EFI_STRING_ID TokenToUpdate;
-#if defined( RVP_SUPPORT ) && RVP_SUPPORT
- EFI_MISC_SYSTEM_MANUFACTURER *SystemManufacturer;
-#endif
-
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (void **)&DataHub
- );
-
- ASSERT_EFI_ERROR(Status);
-
- MonotonicCount = 0;
- Record = NULL;
- do {
- Status = DataHub->GetNextRecord (
- DataHub,
- &MonotonicCount,
- NULL,
- &Record
- );
- if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
- DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
-
- if (CompareGuid(&Record->DataRecordGuid, &gEfiMiscSubClassGuid) &&
- (DataHeader->RecordType == EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER)) {
-#if defined( RVP_SUPPORT ) && RVP_SUPPORT
- //
- // System Information
- //
- SystemManufacturer = (EFI_MISC_SYSTEM_MANUFACTURER *)(DataHeader + 1);
-
- //
- // UUID (System Information)
- //
- SMBIOSString = EfiLibAllocateZeroPool (0x100);
- GuidToString ( &SystemManufacturer->SystemUuid, SMBIOSString, 0x00 );
-
- TokenToUpdate = (STRING_REF)STR_SYSTEM_UUID_VALUE;
- HiiSetString(mHiiHandle, TokenToUpdate, SMBIOSString, NULL);
-
- gBS->FreePool(SMBIOSString);
-#endif
- }
- }
- } while (!EFI_ERROR(Status) && (MonotonicCount != 0));
+ UINT32 MicrocodeRevision;
+ CHAR16 NewString[0x100];
+ UINTN TotalMemorySize;
+ UINT16 MemorySpeed;
Status = gBS->LocateProtocol (
&gEfiSmbiosProtocolGuid,
@@ -850,6 +471,8 @@ UpdateAdditionalInformation (
ASSERT_EFI_ERROR (Status);
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ TotalMemorySize = 0;
+ MemorySpeed = 0xffff;
do {
Status = Smbios->GetNext (
Smbios,
@@ -858,6 +481,70 @@ UpdateAdditionalInformation (
&SmbiosRecord,
NULL
);
+
+
+ if (SmbiosRecord->Type == EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION) {
+ Type4Record = (SMBIOS_TABLE_TYPE4 *) SmbiosRecord;
+ UnicodeSPrint (NewString, sizeof (NewString), L"%d.%d GHz",
+ Type4Record->CurrentSpeed / 1000,
+ Type4Record->CurrentSpeed % 1000
+ );
+ HiiSetString (mHiiHandle, STR_PROCESSOR_SPEED_VALUE, NewString, NULL);
+
+ StrIndex = Type4Record->ProcessorVersion;
+ GetOptionalStringByIndex ((CHAR8*)((UINT8*)Type4Record + Type4Record->Hdr.Length), StrIndex, &ProcessorVersion);
+ HiiSetString (mHiiHandle, STR_PROCESSOR_VERSION_VALUE, ProcessorVersion, NULL);
+
+ MicrocodeRevision = (UINT32) RShiftU64 (AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID), 32);
+ UnicodeSPrint (NewString, sizeof (NewString), L"%8x", MicrocodeRevision);
+ HiiSetString (mHiiHandle, STR_PROCESSOR_MICROCODE_VALUE, NewString, NULL);
+ }
+ if (SmbiosRecord->Type == SMBIOS_TYPE_CACHE_INFORMATION) {
+ Type7Record = (SMBIOS_TABLE_TYPE7 *) SmbiosRecord;
+ UnicodeSPrint (NewString, sizeof (NewString), L"%d KB", Type7Record->InstalledSize);
+ switch (Type7Record->CacheConfiguration & 0x03) {
+ case 0:
+ //
+ // Level 1 Cache
+ //
+ if (Type7Record->SystemCacheType == CacheTypeInstruction) {
+ HiiSetString (mHiiHandle, STR_PROCESSOR_L1_INSTR_CACHE_VALUE, NewString, NULL);
+ }
+ if (Type7Record->SystemCacheType == CacheTypeData) {
+ HiiSetString (mHiiHandle, STR_PROCESSOR_L1_DATA_CACHE_VALUE, NewString, NULL);
+ }
+ break;
+ case 1:
+ //
+ // Level 2 Cache
+ //
+ HiiSetString (mHiiHandle, STR_PROCESSOR_L2_CACHE_VALUE, NewString, NULL);
+ break;
+ default:
+ break;
+ }
+ HiiSetString (mHiiHandle, STR_PROCESSOR_MICROCODE_VALUE, NewString, NULL);
+ }
+ if (SmbiosRecord->Type == EFI_SMBIOS_TYPE_MEMORY_DEVICE) {
+ Type17Record = (SMBIOS_TABLE_TYPE17 *) SmbiosRecord;
+ if (Type17Record->Size > 0) {
+ if ((Type17Record->Size & BIT15) != 0) {
+ //
+ // Size is in KB
+ //
+ TotalMemorySize = TotalMemorySize + Type17Record->Size;
+ } else {
+ //
+ // Size is in MB
+ //
+ TotalMemorySize = TotalMemorySize + (UINTN)LShiftU64 (Type17Record->Size, 10);
+ }
+ if (Type17Record->Speed < MemorySpeed) {
+ MemorySpeed = Type17Record->Speed;
+ }
+ }
+ }
+
if (SmbiosRecord->Type == EFI_SMBIOS_TYPE_BIOS_INFORMATION) {
Type0Record = (SMBIOS_TABLE_TYPE0 *) SmbiosRecord;
StrIndex = Type0Record->BiosVersion;
@@ -884,6 +571,16 @@ UpdateAdditionalInformation (
}
} while (!EFI_ERROR(Status));
+ if ((TotalMemorySize % 1024) != 0) {
+ UnicodeSPrint (NewString, sizeof (NewString), L"%d.%d GB", TotalMemorySize / 1024, ((TotalMemorySize % 1024) * 100) / 1024);
+ } else {
+ UnicodeSPrint (NewString, sizeof (NewString), L"%d GB", TotalMemorySize / 1024);
+ }
+ HiiSetString (mHiiHandle, STR_TOTAL_MEMORY_SIZE_VALUE, NewString, NULL);
+
+ UnicodeSPrint (NewString, sizeof (NewString), L"%d MHz", MemorySpeed);
+ HiiSetString(mHiiHandle, STR_SYSTEM_MEMORY_SPEED_VALUE, NewString, NULL);
+
UpdateLatestBootTime();
return EFI_SUCCESS;
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/CommonHeader.h b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/CommonHeader.h
index e339b31065..f95e6bbc2d 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/CommonHeader.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/CommonHeader.h
@@ -3,11 +3,10 @@
This file includes package header files, library classes and protocol, PPI & GUID definitions.
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
**/
#ifndef __COMMON_HEADER_H_
@@ -15,11 +14,10 @@
-#include <FrameworkDxe.h>
+#include <PiDxe.h>
#include <IndustryStandard/SmBios.h>
#include <Protocol/Smbios.h>
-#include <Guid/DataHubRecords.h>
#include <Guid/MdeModuleHii.h>
#include <Library/DebugLib.h>
@@ -36,4 +34,6 @@
#include <Library/PchPlatformLib.h>
#include <Library/PrintLib.h>
+#include "DataHubRecords.h"
+
#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/DataHubRecords.h b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/DataHubRecords.h
new file mode 100644
index 0000000000..f57a5a8c0f
--- /dev/null
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/DataHubRecords.h
@@ -0,0 +1,2934 @@
+/** @file
+ DataHubRecord.h includes all data hub subclass GUID definitions.
+
+ This file includes all data hub sub class defitions from
+ Cache subclass specification 0.9, DataHub SubClass specification 0.9, Memory SubClass Spec 0.9,
+ Processor Subclass specification 0.9, and Misc SubClass specification 0.9.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _DATAHUB_RECORDS_GUID_H_
+#define _DATAHUB_RECORDS_GUID_H_
+
+//
+// Local defintion of STRING_REF
+//
+typedef UINT16 STRING_REF;
+
+//
+// The include is required to retrieve type EFI_EXP_BASE10_DATA
+//
+#include <Guid/StatusCodeDataTypeId.h>
+
+#define EFI_PROCESSOR_SUBCLASS_GUID \
+ { 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }
+
+extern EFI_GUID gEfiProcessorSubClassGuid;
+
+
+#define EFI_CACHE_SUBCLASS_GUID \
+ { 0x7f0013a7, 0xdc79, 0x4b22, {0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } }
+
+extern EFI_GUID gEfiCacheSubClassGuid;
+
+///
+/// The memory subclass belongs to the data class and is identified as the memory
+/// subclass by the GUID.
+///
+#define EFI_MEMORY_SUBCLASS_GUID \
+ {0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }
+
+extern EFI_GUID gEfiMemorySubClassGuid;
+
+#define EFI_MISC_SUBCLASS_GUID \
+ { 0x772484B2, 0x7482, 0x4b91, {0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } }
+
+extern EFI_GUID gEfiMiscSubClassGuid;
+
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the value is 0x0100.
+/// Keep it unchanged from the perspective of binary consistency.
+///
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+#pragma pack(1)
+
+typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} USB_PORT_DEVICE_PATH;
+
+//
+// IDE
+//
+typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} IDE_DEVICE_PATH;
+
+//
+// RMC Connector
+//
+typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RMC_CONN_DEVICE_PATH;
+
+//
+// RIDE
+//
+typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RIDE_DEVICE_PATH;
+
+//
+// Gigabit NIC
+//
+typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} GB_NIC_DEVICE_PATH;
+
+//
+// P/S2 Connector
+//
+typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_CONN_DEVICE_PATH;
+
+//
+// Serial Port Connector
+//
+typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} SERIAL_CONN_DEVICE_PATH;
+
+//
+// Parallel Port Connector
+//
+typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PARALLEL_CONN_DEVICE_PATH;
+
+//
+// Floopy Connector
+//
+typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} FLOOPY_CONN_DEVICE_PATH;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+} EFI_MISC_PORT_DEVICE_PATH;
+
+#pragma pack()
+
+///
+/// String Token Definition
+///
+/// Inconsistent with specification here:
+/// The macro isn't defined by any specification.
+/// Keep it unchanged for backward compatibility.
+///
+#define EFI_STRING_TOKEN UINT16
+
+///
+/// Each data record that is a member of some subclass starts with a standard
+/// header of type EFI_SUBCLASS_TYPE1_HEADER.
+/// This header is only a guideline and applicable only to a data
+/// subclass that is producing SMBIOS data records. A subclass can start with a
+/// different header if needed.
+///
+typedef struct {
+ ///
+ /// The version of the specification to which a specific subclass data record adheres.
+ ///
+ UINT32 Version;
+ ///
+ /// The size in bytes of this data class header.
+ ///
+ UINT32 HeaderSize;
+ ///
+ /// The instance number of the subclass with the same ProducerName. This number is
+ /// applicable in cases where multiple subclass instances that were produced by the same
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not
+ /// Applicable. All data consumer drivers should be able to handle all the possible values
+ /// of Instance, including Not Applicable and Reserved.
+ ///
+ UINT16 Instance;
+ ///
+ /// The instance number of the RecordType for the same Instance. This number is
+ /// applicable in cases where multiple instances of the RecordType exist for a specific
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.
+ /// All data consumer drivers should be able to handle all the possible values of
+ /// SubInstance, including Not Applicable and Reserved.
+ ///
+ UINT16 SubInstance;
+ ///
+ /// The record number for the data record being specified. The numbering scheme and
+ /// definition is defined in the specific subclass specification.
+ ///
+ UINT32 RecordType;
+} EFI_SUBCLASS_TYPE1_HEADER;
+
+///
+/// This structure is used to link data records in the same subclasses. A data record is
+/// defined as a link to another data record in the same subclass using this structure.
+///
+typedef struct {
+ ///
+ /// An EFI_GUID that identifies the component that produced this data record. Type
+ /// EFI_GUID is defined in InstallProtocolInterface() in the EFI 1.10 Specification.
+ ///
+ EFI_GUID ProducerName;
+ ///
+ /// The instance number of the subclass with the same ProducerName. This number is
+ /// applicable in cases where multiple subclass instances that were produced by the same
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not
+ /// Applicable. All data consumer drivers should be able to handle all the possible values
+ /// of Instance, including Not Applicable and Reserved.
+ ///
+ UINT16 Instance;
+ /// The instance number of the RecordType for the same Instance. This number is
+ /// applicable in cases where multiple instances of the RecordType exist for a specific
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.
+ /// All data consumer drivers should be able to handle all the possible values of
+ /// SubInstance, including Not Applicable and Reserved.
+ UINT16 SubInstance;
+} EFI_INTER_LINK_DATA;
+
+//
+// EXP data
+//
+///
+/// This macro provides a calculation for base-10 representations. Value and Exponent are each
+/// INT16. It is signed to cover negative values and is 16 bits wide (15 bits for data and 1 bit
+/// for the sign).
+///
+typedef struct {
+ ///
+ /// The INT16 number by which to multiply the base-10 representation.
+ ///
+ UINT16 Value;
+ ///
+ /// The INT16 number by which to raise the base-10 calculation.
+ ///
+ UINT16 Exponent;
+} EFI_EXP_BASE2_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;
+
+///
+/// This data record refers to the list of frequencies that the processor core supports. The list of
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example,
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data
+/// record is in Hertz. For asynchronous processors, the content of this data record is zero.
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means
+/// that the processor/driver supports automatic frequency selection.
+///
+/// Inconsistent with specification here:
+/// According to MiscSubclass 0.9 specification, it should be a pointer since it refers to a list of frequencies.
+///
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;
+
+///
+/// This data record refers to the list of supported frequencies of the processor external bus. The list of
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example,
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data
+/// record is in Hertz. For asynchronous processors, the content of this data record is NULL.
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means
+/// that the processor/driver supports automatic frequency selection.
+///
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;
+typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;
+
+typedef struct {
+ UINT32 ProcessorSteppingId:4;
+ UINT32 ProcessorModel: 4;
+ UINT32 ProcessorFamily: 4;
+ UINT32 ProcessorType: 2;
+ UINT32 ProcessorReserved1: 2;
+ UINT32 ProcessorXModel: 4;
+ UINT32 ProcessorXFamily: 8;
+ UINT32 ProcessorReserved2: 4;
+} EFI_PROCESSOR_SIGNATURE;
+
+
+///
+/// Inconsistent with specification here:
+/// The name of third field in ProcSubClass specification 0.9 is LogicalProcessorCount.
+/// Keep it unchanged for backward compatibility.
+///
+typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+} EFI_PROCESSOR_MISC_INFO;
+
+typedef struct {
+ UINT32 ProcessorFpu: 1;
+ UINT32 ProcessorVme: 1;
+ UINT32 ProcessorDe: 1;
+ UINT32 ProcessorPse: 1;
+ UINT32 ProcessorTsc: 1;
+ UINT32 ProcessorMsr: 1;
+ UINT32 ProcessorPae: 1;
+ UINT32 ProcessorMce: 1;
+ UINT32 ProcessorCx8: 1;
+ UINT32 ProcessorApic: 1;
+ UINT32 ProcessorReserved1: 1;
+ UINT32 ProcessorSep: 1;
+ UINT32 ProcessorMtrr: 1;
+ UINT32 ProcessorPge: 1;
+ UINT32 ProcessorMca: 1;
+ UINT32 ProcessorCmov: 1;
+ UINT32 ProcessorPat: 1;
+ UINT32 ProcessorPse36: 1;
+ UINT32 ProcessorPsn: 1;
+ UINT32 ProcessorClfsh: 1;
+ UINT32 ProcessorReserved2: 1;
+ UINT32 ProcessorDs: 1;
+ UINT32 ProcessorAcpi: 1;
+ UINT32 ProcessorMmx: 1;
+ UINT32 ProcessorFxsr: 1;
+ UINT32 ProcessorSse: 1;
+ UINT32 ProcessorSse2: 1;
+ UINT32 ProcessorSs: 1;
+ UINT32 ProcessorReserved3: 1;
+ UINT32 ProcessorTm: 1;
+ UINT32 ProcessorReserved4: 2;
+} EFI_PROCESSOR_FEATURE_FLAGS;
+
+///
+/// This data record refers to the unique ID that identifies a set of processors. This data record is 16
+/// bytes in length. The data in this structure is processor specific and reserved values can be defined
+/// for future use. The consumer of this data should not make any assumption and should use this data
+/// with respect to the processor family defined in the Family record number.
+///
+typedef struct {
+ ///
+ /// Identifies the processor.
+ ///
+ EFI_PROCESSOR_SIGNATURE Signature;
+ ///
+ /// Provides additional processor information.
+ ///
+ EFI_PROCESSOR_MISC_INFO MiscInfo;
+ ///
+ /// Reserved for future use.
+ ///
+ UINT32 Reserved;
+ ///
+ /// Provides additional processor information.
+ ///
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;
+} EFI_PROCESSOR_ID_DATA;
+
+///
+/// This data record refers to the general classification of the processor. This data record is 4 bytes in
+/// length.
+///
+typedef enum {
+ EfiProcessorOther = 1,
+ EfiProcessorUnknown = 2,
+ EfiCentralProcessor = 3,
+ EfiMathProcessor = 4,
+ EfiDspProcessor = 5,
+ EfiVideoProcessor = 6
+} EFI_PROCESSOR_TYPE_DATA;
+
+///
+/// This data record refers to the family of the processor as defined by the DMTF.
+/// This data record is 4 bytes in length.
+///
+typedef enum {
+ EfiProcessorFamilyOther = 0x01,
+ EfiProcessorFamilyUnknown = 0x02,
+ EfiProcessorFamily8086 = 0x03,
+ EfiProcessorFamily80286 = 0x04,
+ EfiProcessorFamilyIntel386 = 0x05,
+ EfiProcessorFamilyIntel486 = 0x06,
+ EfiProcessorFamily8087 = 0x07,
+ EfiProcessorFamily80287 = 0x08,
+ EfiProcessorFamily80387 = 0x09,
+ EfiProcessorFamily80487 = 0x0A,
+ EfiProcessorFamilyPentium = 0x0B,
+ EfiProcessorFamilyPentiumPro = 0x0C,
+ EfiProcessorFamilyPentiumII = 0x0D,
+ EfiProcessorFamilyPentiumMMX = 0x0E,
+ EfiProcessorFamilyCeleron = 0x0F,
+ EfiProcessorFamilyPentiumIIXeon = 0x10,
+ EfiProcessorFamilyPentiumIII = 0x11,
+ EfiProcessorFamilyM1 = 0x12,
+ EfiProcessorFamilyM2 = 0x13,
+ EfiProcessorFamilyM1Reserved2 = 0x14,
+ EfiProcessorFamilyM1Reserved3 = 0x15,
+ EfiProcessorFamilyM1Reserved4 = 0x16,
+ EfiProcessorFamilyM1Reserved5 = 0x17,
+ EfiProcessorFamilyAmdDuron = 0x18,
+ EfiProcessorFamilyK5 = 0x19,
+ EfiProcessorFamilyK6 = 0x1A,
+ EfiProcessorFamilyK6_2 = 0x1B,
+ EfiProcessorFamilyK6_3 = 0x1C,
+ EfiProcessorFamilyAmdAthlon = 0x1D,
+ EfiProcessorFamilyAmd29000 = 0x1E,
+ EfiProcessorFamilyK6_2Plus = 0x1F,
+ EfiProcessorFamilyPowerPC = 0x20,
+ EfiProcessorFamilyPowerPC601 = 0x21,
+ EfiProcessorFamilyPowerPC603 = 0x22,
+ EfiProcessorFamilyPowerPC603Plus = 0x23,
+ EfiProcessorFamilyPowerPC604 = 0x24,
+ EfiProcessorFamilyPowerPC620 = 0x25,
+ EfiProcessorFamilyPowerPCx704 = 0x26,
+ EfiProcessorFamilyPowerPC750 = 0x27,
+ EfiProcessorFamilyAlpha3 = 0x30,
+ EfiProcessorFamilyAlpha21064 = 0x31,
+ EfiProcessorFamilyAlpha21066 = 0x32,
+ EfiProcessorFamilyAlpha21164 = 0x33,
+ EfiProcessorFamilyAlpha21164PC = 0x34,
+ EfiProcessorFamilyAlpha21164a = 0x35,
+ EfiProcessorFamilyAlpha21264 = 0x36,
+ EfiProcessorFamilyAlpha21364 = 0x37,
+ EfiProcessorFamilyMips = 0x40,
+ EfiProcessorFamilyMIPSR4000 = 0x41,
+ EfiProcessorFamilyMIPSR4200 = 0x42,
+ EfiProcessorFamilyMIPSR4400 = 0x43,
+ EfiProcessorFamilyMIPSR4600 = 0x44,
+ EfiProcessorFamilyMIPSR10000 = 0x45,
+ EfiProcessorFamilySparc = 0x50,
+ EfiProcessorFamilySuperSparc = 0x51,
+ EfiProcessorFamilymicroSparcII = 0x52,
+ EfiProcessorFamilymicroSparcIIep = 0x53,
+ EfiProcessorFamilyUltraSparc = 0x54,
+ EfiProcessorFamilyUltraSparcII = 0x55,
+ EfiProcessorFamilyUltraSparcIIi = 0x56,
+ EfiProcessorFamilyUltraSparcIII = 0x57,
+ ///
+ /// Inconsistent with specification here:
+ /// This field in ProcSubClass specification 0.9 is defined as EfiProcessorFamilyUltraSparcIIi.
+ /// Change it to EfiProcessorFamilyUltraSparcIIIi to avoid build break.
+ ///
+ EfiProcessorFamilyUltraSparcIIIi = 0x58,
+ EfiProcessorFamily68040 = 0x60,
+ EfiProcessorFamily68xxx = 0x61,
+ EfiProcessorFamily68000 = 0x62,
+ EfiProcessorFamily68010 = 0x63,
+ EfiProcessorFamily68020 = 0x64,
+ EfiProcessorFamily68030 = 0x65,
+ EfiProcessorFamilyHobbit = 0x70,
+ EfiProcessorFamilyCrusoeTM5000 = 0x78,
+ EfiProcessorFamilyCrusoeTM3000 = 0x79,
+ EfiProcessorFamilyEfficeonTM8000 = 0x7A,
+ EfiProcessorFamilyWeitek = 0x80,
+ EfiProcessorFamilyItanium = 0x82,
+ EfiProcessorFamilyAmdAthlon64 = 0x83,
+ EfiProcessorFamilyAmdOpteron = 0x84,
+ EfiProcessorFamilyAmdSempron = 0x85,
+ EfiProcessorFamilyAmdTurion64Mobile = 0x86,
+ EfiProcessorFamilyDualCoreAmdOpteron = 0x87,
+ EfiProcessorFamilyAmdAthlon64X2DualCore = 0x88,
+ EfiProcessorFamilyAmdTurion64X2Mobile = 0x89,
+ EfiProcessorFamilyPARISC = 0x90,
+ EfiProcessorFamilyPaRisc8500 = 0x91,
+ EfiProcessorFamilyPaRisc8000 = 0x92,
+ EfiProcessorFamilyPaRisc7300LC = 0x93,
+ EfiProcessorFamilyPaRisc7200 = 0x94,
+ EfiProcessorFamilyPaRisc7100LC = 0x95,
+ EfiProcessorFamilyPaRisc7100 = 0x96,
+ EfiProcessorFamilyV30 = 0xA0,
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,
+ EfiProcessorFamilyPentium4 = 0xB2,
+ EfiProcessorFamilyIntelXeon = 0xB3,
+ EfiProcessorFamilyAS400 = 0xB4,
+ EfiProcessorFamilyIntelXeonMP = 0xB5,
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,
+ EfiProcessorFamilyIntelItanium2 = 0xB8,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumM = 0xB9,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCeleronD = 0xBA,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumD = 0xBB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCoreSolo = 0xBD,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyReserved = 0xBE,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIntelCore2 = 0xBF,
+ EfiProcessorFamilyIBM390 = 0xC8,
+ EfiProcessorFamilyG4 = 0xC9,
+ EfiProcessorFamilyG5 = 0xCA,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyG6 = 0xCB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyzArchitectur = 0xCC,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7M = 0xD2,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7D = 0xD3,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaC7 = 0xD4,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyViaEden = 0xD5,
+ EfiProcessorFamilyi860 = 0xFA,
+ EfiProcessorFamilyi960 = 0xFB,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyIndicatorFamily2 = 0xFE,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorFamilyReserved1 = 0xFF
+} EFI_PROCESSOR_FAMILY_DATA;
+
+typedef enum {
+ EfiProcessorFamilySh3 = 0x104,
+ EfiProcessorFamilySh4 = 0x105,
+ EfiProcessorFamilyArm = 0x118,
+ EfiProcessorFamilyStrongArm = 0x119,
+ EfiProcessorFamily6x86 = 0x12C,
+ EfiProcessorFamilyMediaGx = 0x12D,
+ EfiProcessorFamilyMii = 0x12E,
+ EfiProcessorFamilyWinChip = 0x140,
+ EfiProcessorFamilyDsp = 0x15E,
+ EfiProcessorFamilyVideo = 0x1F4
+} EFI_PROCESSOR_FAMILY2_DATA;
+
+///
+/// This data record refers to the core voltage of the processor being defined. The unit of measurement
+/// of this data record is in volts.
+///
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;
+
+///
+/// This data record refers to the base address of the APIC of the processor being defined. This data
+/// record is a physical address location.
+///
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;
+
+///
+/// This data record refers to the ID of the APIC of the processor being defined. This data record is a
+/// 4-byte entry.
+///
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;
+
+///
+/// This data record refers to the version number of the APIC of the processor being defined. This data
+/// record is a 4-byte entry.
+///
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;
+
+typedef enum {
+ EfiProcessorIa32Microcode = 1,
+ EfiProcessorIpfPalAMicrocode = 2,
+ EfiProcessorIpfPalBMicrocode = 3
+} EFI_PROCESSOR_MICROCODE_TYPE;
+
+///
+/// This data record refers to the revision of the processor microcode that is loaded in the processor.
+/// This data record is a 4-byte entry.
+///
+typedef struct {
+ ///
+ /// Identifies what type of microcode the data is.
+ ///
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;
+ ///
+ /// Indicates the revision number of this microcode.
+ ///
+ UINT32 ProcessorMicrocodeRevisionNumber;
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;
+
+///
+/// This data record refers to the status of the processor.
+///
+typedef struct {
+ UINT32 CpuStatus :3; ///< Indicates the status of the processor.
+ UINT32 Reserved1 :3; ///< Reserved for future use. Should be set to zero.
+ UINT32 SocketPopulated :1; ///< Indicates if the processor is socketed or not.
+ UINT32 Reserved2 :1; ///< Reserved for future use. Should be set to zero.
+ UINT32 ApicEnable :1; ///< Indicates if the APIC is enabled or not.
+ UINT32 BootApplicationProcessor :1; ///< Indicates if this processor is the boot processor.
+ UINT32 Reserved3 :22;///< Reserved for future use. Should be set to zero.
+} EFI_PROCESSOR_STATUS_DATA;
+
+typedef enum {
+ EfiCpuStatusUnknown = 0,
+ EfiCpuStatusEnabled = 1,
+ EfiCpuStatusDisabledByUser = 2,
+ EfiCpuStatusDisabledbyBios = 3,
+ EfiCpuStatusIdle = 4,
+ EfiCpuStatusOther = 7
+} EFI_CPU_STATUS;
+
+typedef enum {
+ EfiProcessorSocketOther = 1,
+ EfiProcessorSocketUnknown = 2,
+ EfiProcessorSocketDaughterBoard = 3,
+ EfiProcessorSocketZIF = 4,
+ EfiProcessorSocketReplacePiggyBack = 5,
+ EfiProcessorSocketNone = 6,
+ EfiProcessorSocketLIF = 7,
+ EfiProcessorSocketSlot1 = 8,
+ EfiProcessorSocketSlot2 = 9,
+ EfiProcessorSocket370Pin = 0xA,
+ EfiProcessorSocketSlotA = 0xB,
+ EfiProcessorSocketSlotM = 0xC,
+ EfiProcessorSocket423 = 0xD,
+ EfiProcessorSocketA462 = 0xE,
+ EfiProcessorSocket478 = 0xF,
+ EfiProcessorSocket754 = 0x10,
+ EfiProcessorSocket940 = 0x11,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocket939 = 0x12,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketmPGA604 = 0x13,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketLGA771 = 0x14,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiProcessorSocketLGA775 = 0x15
+
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_CACHE_ASSOCIATION_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+///
+/// This data record refers to the health status of the processor.
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_HEALTH_STATUS_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+} EFI_PROCESSOR_HEALTH_STATUS;
+
+///
+/// This data record refers to the package number of this processor. Multiple logical processors can
+/// exist in a system and each logical processor can be correlated to the physical processor using this
+/// record type.
+///
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;
+
+typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;
+typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;
+typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;
+
+typedef struct {
+ UINT16 Reserved :1;
+ UINT16 Unknown :1;
+ UINT16 Capable64Bit :1;
+ UINT16 Reserved2 :13;
+} EFI_PROCESSOR_CHARACTERISTICS_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the enumeration type data structure is NOT defined.
+/// The equivalent in specification is
+/// #define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001
+/// #define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002
+/// #define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003
+/// #define EFI_PROCESSOR_MANUFACTURER_RECORD_NUMBER 0x00000004
+/// #define EFI_PROCESSOR_SERIAL_NUMBER_RECORD_NUMBER 0x00000005
+/// #define EFI_PROCESSOR_ID_RECORD_NUMBER 0x00000006
+/// #define EFI_PROCESSOR_TYPE_RECORD_NUMBER 0x00000007
+/// #define EFI_PROCESSOR_FAMILY_RECORD_NUMBER 0x00000008
+/// #define EFI_PROCESSOR_VOLTAGE_RECORD_NUMBER 0x00000009
+/// #define EFI_PROCESSOR_APIC_BASE_ADDRESS_RECORD_NUMBER 0x0000000A
+/// #define EFI_PROCESSOR_APIC_ID_RECORD_NUMBER 0x0000000B
+/// #define EFI_PROCESSOR_APIC_VER_NUMBER_RECORD_NUMBER 0x0000000C
+/// #define EFI_PROCESSOR_MICROCODE_REVISION_RECORD_NUMBER 0x0000000D
+/// #define EFI_PROCESSOR_STATUS_RECORD_NUMBER 0x0000000E
+/// #define EFI_PROCESSOR_SOCKET_TYPE_RECORD_NUMBER 0x0000000F
+/// #define EFI_PROCESSOR_SOCKET_NAME_RECORD_NUMBER 0x00000010
+/// #define EFI_PROCESSOR_CACHE_ASSOCIATION_RECORD_NUMBER 0x00000011
+/// #define EFI_PROCESSOR_MAX_FREQUENCY_RECORD_NUMBER 0x00000012
+/// #define EFI_PROCESSOR_ASSET_TAG_RECORD_NUMBER 0x00000013
+/// #define EFI_PROCESSOR_MAX_FSB_FREQUENCY_RECORD_NUMBER 0x00000014
+/// #define EFI_PROCESSOR_PACKAGE_NUMBER_RECORD_NUMBER 0x00000015
+/// #define EFI_PROCESSOR_FREQUENCY_LIST_RECORD_NUMBER 0x00000016
+/// #define EFI_PROCESSOR_FSB_FREQUENCY_LIST_RECORD_NUMBER 0x00000017
+/// #define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018
+///
+/// Keep the definition unchanged for backward compatibility.
+typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24,
+ ProcessorCoreCountRecordType = 25,
+ ProcessorEnabledCoreCountRecordType = 26,
+ ProcessorThreadCountRecordType = 27,
+ ProcessorCharacteristicsRecordType = 28,
+ ProcessorFamily2RecordType = 29,
+ ProcessorPartNumberRecordType = 30,
+} EFI_CPU_VARIABLE_RECORD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In ProcSubclass specification 0.9, the union type data structure is NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;
+ EFI_PROCESSOR_ID_DATA ProcessorId;
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;
+ EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber;
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;
+ EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount;
+ EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount;
+ EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount;
+ EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics;
+ EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;
+} EFI_CPU_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+} EFI_CPU_DATA_RECORD;
+
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000
+
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the naming is EFI_CACHE_MAXIMUM_SIZE_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;
+
+typedef struct {
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 NonBurst :1;
+ UINT32 Burst :1;
+ UINT32 PipelineBurst :1;
+ ///
+ /// Inconsistent between CacheSubclass 0.9 and SMBIOS specifications here:
+ /// In CacheSubclass specification 0.9, the sequence of Asynchronous and Synchronous fileds
+ /// are opposite to SMBIOS specification.
+ ///
+ UINT32 Asynchronous :1;
+ UINT32 Synchronous :1;
+ UINT32 Reserved :25;
+} EFI_CACHE_SRAM_TYPE_DATA;
+
+typedef EFI_CACHE_SRAM_TYPE_DATA EFI_CACHE_SRAM_INSTALL_DATA;
+
+typedef enum {
+ EfiCacheErrorOther = 1,
+ EfiCacheErrorUnknown = 2,
+ EfiCacheErrorNone = 3,
+ EfiCacheErrorParity = 4,
+ EfiCacheErrorSingleBit = 5,
+ EfiCacheErrorMultiBit = 6
+} EFI_CACHE_ERROR_TYPE_DATA;
+
+typedef enum {
+ EfiCacheTypeOther = 1,
+ EfiCacheTypeUnknown = 2,
+ EfiCacheTypeInstruction = 3,
+ EfiCacheTypeData = 4,
+ EfiCacheTypeUnified = 5
+} EFI_CACHE_TYPE_DATA;
+
+typedef enum {
+ EfiCacheAssociativityOther = 1,
+ EfiCacheAssociativityUnknown = 2,
+ EfiCacheAssociativityDirectMapped = 3,
+ EfiCacheAssociativity2Way = 4,
+ EfiCacheAssociativity4Way = 5,
+ EfiCacheAssociativityFully = 6,
+ EfiCacheAssociativity8Way = 7,
+ EfiCacheAssociativity16Way = 8
+} EFI_CACHE_ASSOCIATIVITY_DATA;
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass 0.9 specification. It defines the field type as UINT16.
+/// In fact, it should be UINT32 type because it refers to a 32bit width data.
+///
+typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+} EFI_CACHE_CONFIGURATION_DATA;
+
+#define EFI_CACHE_L1 1
+#define EFI_CACHE_L2 2
+#define EFI_CACHE_L3 3
+#define EFI_CACHE_L4 4
+#define EFI_CACHE_LMAX EFI_CACHE_L4
+
+#define EFI_CACHE_SOCKETED 1
+#define EFI_CACHE_NOT_SOCKETED 0
+
+typedef enum {
+ EfiCacheInternal = 0,
+ EfiCacheExternal = 1,
+ EfiCacheReserved = 2,
+ EfiCacheUnknown = 3
+} EFI_CACHE_LOCATION;
+
+#define EFI_CACHE_ENABLED 1
+#define EFI_CACHE_DISABLED 0
+
+typedef enum {
+ EfiCacheWriteThrough = 0,
+ EfiCacheWriteBack = 1,
+ EfiCacheDynamicMode = 2,
+ EfiCacheUnknownMode = 3
+} EFI_CACHE_OPERATIONAL_MODE;
+
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the enumeration type data structure is NOT defined.
+/// The equivalent in specification is
+/// #define EFI_CACHE_SIZE_RECORD_NUMBER 0x00000001
+/// #define EFI_CACHE_MAXIMUM_SIZE_RECORD_NUMBER 0x00000002
+/// #define EFI_CACHE_SPEED_RECORD_NUMBER 0x00000003
+/// #define EFI_CACHE_SOCKET_RECORD_NUMBER 0x00000004
+/// #define EFI_CACHE_SRAM_SUPPORT_RECORD_NUMBER 0x00000005
+/// #define EFI_CACHE_SRAM_INSTALL_RECORD_NUMBER 0x00000006
+/// #define EFI_CACHE_ERROR_SUPPORT_RECORD_NUMBER 0x00000007
+/// #define EFI_CACHE_TYPE_RECORD_NUMBER 0x00000008
+/// #define EFI_CACHE_ASSOCIATIVITY_RECORD_NUMBER 0x00000009
+/// #define EFI_CACHE_CONFIGURATION_RECORD_NUMBER 0x0000000A
+/// Keep the definition unchanged for backward compatibility.
+///
+typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+} EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In CacheSubclass specification 0.9, the union type data structure is NOT defined.
+/// It's implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;
+ EFI_CACHE_SPEED_DATA CacheSpeed;
+ EFI_CACHE_SOCKET_DATA CacheSocket;
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;
+ EFI_CACHE_TYPE_DATA CacheType;
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+} EFI_CACHE_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+} EFI_CACHE_DATA_RECORD;
+
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001
+
+typedef enum _EFI_MEMORY_REGION_TYPE {
+ EfiMemoryRegionMemory = 0x01,
+ EfiMemoryRegionReserved = 0x02,
+ EfiMemoryRegionAcpi = 0x03,
+ EfiMemoryRegionNvs = 0x04
+} EFI_MEMORY_REGION_TYPE;
+
+///
+/// This data record refers to the size of a memory region. The regions that are
+/// described can refer to physical memory, memory-mapped I/O, or reserved BIOS memory regions.
+/// The unit of measurement of this data record is in bytes.
+///
+typedef struct {
+ ///
+ /// A zero-based value that indicates which processor(s) can access the memory region.
+ /// A value of 0xFFFF indicates the region is accessible by all processors.
+ ///
+ UINT32 ProcessorNumber;
+ ///
+ /// A zero-based value that indicates the starting bus that can access the memory region.
+ ///
+ UINT16 StartBusNumber;
+ ///
+ /// A zero-based value that indicates the ending bus that can access the memory region.
+ /// A value of 0xFF for a PCI system indicates the region is accessible by all buses and
+ /// is global in scope. An example of the EndBusNumber not being 0xFF is a system
+ /// with two or more peer-to-host PCI bridges.
+ ///
+ UINT16 EndBusNumber;
+ ///
+ /// The type of memory region from the operating system's point of view.
+ /// MemoryRegionType values are equivalent to the legacy INT 15 AX = E820 BIOS
+ /// command values.
+ ///
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;
+ ///
+ /// The size of the memory region in bytes.
+ ///
+ EFI_EXP_BASE2_DATA MemorySize;
+ ///
+ /// The starting physical address of the memory region.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;
+} EFI_MEMORY_SIZE_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002
+
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {
+ EfiMemoryArrayLocationOther = 0x01,
+ EfiMemoryArrayLocationUnknown = 0x02,
+ EfiMemoryArrayLocationSystemBoard = 0x03,
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,
+ EfiMemoryArrayLocationPciAddonCard = 0x06,
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,
+ EfiMemoryArrayLocationNuBus = 0x0A,
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3
+} EFI_MEMORY_ARRAY_LOCATION;
+
+typedef enum _EFI_MEMORY_ARRAY_USE {
+ EfiMemoryArrayUseOther = 0x01,
+ EfiMemoryArrayUseUnknown = 0x02,
+ EfiMemoryArrayUseSystemMemory = 0x03,
+ EfiMemoryArrayUseVideoMemory = 0x04,
+ EfiMemoryArrayUseFlashMemory = 0x05,
+ EfiMemoryArrayUseNonVolatileRam = 0x06,
+ EfiMemoryArrayUseCacheMemory = 0x07
+} EFI_MEMORY_ARRAY_USE;
+
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {
+ EfiMemoryErrorCorrectionOther = 0x01,
+ EfiMemoryErrorCorrectionUnknown = 0x02,
+ EfiMemoryErrorCorrectionNone = 0x03,
+ EfiMemoryErrorCorrectionParity = 0x04,
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,
+ EfiMemoryErrorCorrectionCrc = 0x07
+} EFI_MEMORY_ERROR_CORRECTION;
+
+///
+/// This data record refers to the physical memory array. This data record is a structure.
+/// The type definition structure for EFI_MEMORY_ARRAY_LOCATION_DATA is in SMBIOS 2.3.4:
+/// - Table 3.3.17.1, Type 16, Offset 0x4
+/// - Table 3.3.17.2, Type 16, Offset 0x5
+/// - Table 3.3.17.3, Type 16, with the following offsets:
+/// -- Offset 0x6
+/// -- Offset 0x7
+/// -- Offset 0xB
+/// -- Offset 0xD
+///
+typedef struct {
+ ///
+ /// The physical location of the memory array.
+ ///
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;
+ ///
+ /// The memory array usage.
+ ///
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;
+ ///
+ /// The primary error correction or detection supported by this memory array.
+ ///
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;
+ ///
+ /// The maximum memory capacity size in kilobytes. If capacity is unknown, then
+ /// values of MaximumMemoryCapacity.Value = 0x00 and
+ /// MaximumMemoryCapacity.Exponent = 0x8000 are used.
+ ///
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;
+ ///
+ /// The number of memory slots or sockets that are available for memory devices
+ /// in this array.
+ ///
+ UINT16 NumberMemoryDevices;
+} EFI_MEMORY_ARRAY_LOCATION_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003
+
+typedef enum _EFI_MEMORY_FORM_FACTOR {
+ EfiMemoryFormFactorOther = 0x01,
+ EfiMemoryFormFactorUnknown = 0x02,
+ EfiMemoryFormFactorSimm = 0x03,
+ EfiMemoryFormFactorSip = 0x04,
+ EfiMemoryFormFactorChip = 0x05,
+ EfiMemoryFormFactorDip = 0x06,
+ EfiMemoryFormFactorZip = 0x07,
+ EfiMemoryFormFactorProprietaryCard = 0x08,
+ EfiMemoryFormFactorDimm = 0x09,
+ EfiMemoryFormFactorTsop = 0x0A,
+ EfiMemoryFormFactorRowOfChips = 0x0B,
+ EfiMemoryFormFactorRimm = 0x0C,
+ EfiMemoryFormFactorSodimm = 0x0D,
+ EfiMemoryFormFactorSrimm = 0x0E,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryFormFactorFbDimm = 0x0F
+} EFI_MEMORY_FORM_FACTOR;
+
+typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ EfiMemoryTypeOther = 0x01,
+ EfiMemoryTypeUnknown = 0x02,
+ EfiMemoryTypeDram = 0x03,
+ EfiMemoryTypeEdram = 0x04,
+ EfiMemoryTypeVram = 0x05,
+ EfiMemoryTypeSram = 0x06,
+ EfiMemoryTypeRam = 0x07,
+ EfiMemoryTypeRom = 0x08,
+ EfiMemoryTypeFlash = 0x09,
+ EfiMemoryTypeEeprom = 0x0A,
+ EfiMemoryTypeFeprom = 0x0B,
+ EfiMemoryTypeEprom = 0x0C,
+ EfiMemoryTypeCdram = 0x0D,
+ EfiMemoryType3Dram = 0x0E,
+ EfiMemoryTypeSdram = 0x0F,
+ EfiMemoryTypeSgram = 0x10,
+ EfiMemoryTypeRdram = 0x11,
+ EfiMemoryTypeDdr = 0x12,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryTypeDdr2 = 0x13,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryTypeDdr2FbDimm = 0x14
+} EFI_MEMORY_ARRAY_TYPE;
+
+typedef struct {
+ UINT32 Reserved :1;
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 FastPaged :1;
+ UINT32 StaticColumn :1;
+ UINT32 PseudoStatic :1;
+ UINT32 Rambus :1;
+ UINT32 Synchronous :1;
+ UINT32 Cmos :1;
+ UINT32 Edo :1;
+ UINT32 WindowDram :1;
+ UINT32 CacheDram :1;
+ UINT32 Nonvolatile :1;
+ UINT32 Reserved1 :19;
+} EFI_MEMORY_TYPE_DETAIL;
+
+typedef enum {
+ EfiMemoryStateEnabled = 0,
+ EfiMemoryStateUnknown = 1,
+ EfiMemoryStateUnsupported = 2,
+ EfiMemoryStateError = 3,
+ EfiMemoryStateAbsent = 4,
+ EfiMemoryStateDisabled = 5,
+ ///
+ /// Inconsistent with specification here:
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.
+ ///
+ EfiMemoryStatePartial = 6
+} EFI_MEMORY_STATE;
+
+///
+/// This data record describes a memory device. This data record is a structure.
+/// The type definition structure for EFI_MEMORY_ARRAY_LINK_DATA is in SMBIOS 2.3.4.
+///
+typedef struct {
+ ///
+ /// A string that identifies the physically labeled socket or board position where the
+ /// memory device is located.
+ ///
+ STRING_REF MemoryDeviceLocator;
+ ///
+ /// A string denoting the physically labeled bank where the memory device is located.
+ ///
+ STRING_REF MemoryBankLocator;
+ ///
+ /// A string denoting the memory manufacturer.
+ ///
+ STRING_REF MemoryManufacturer;
+ ///
+ /// A string denoting the serial number of the memory device.
+ ///
+ STRING_REF MemorySerialNumber;
+ ///
+ /// The asset tag of the memory device.
+ ///
+ STRING_REF MemoryAssetTag;
+ ///
+ /// A string denoting the part number of the memory device.
+ ///
+ STRING_REF MemoryPartNumber;
+ ///
+ /// A link to a memory array structure set.
+ ///
+ EFI_INTER_LINK_DATA MemoryArrayLink;
+ ///
+ /// A link to a memory array structure set.
+ ///
+ EFI_INTER_LINK_DATA MemorySubArrayLink;
+ ///
+ /// The total width in bits of this memory device. If there are no error correcting bits,
+ /// then the total width equals the data width. If the width is unknown, then set the field
+ /// to 0xFFFF.
+ ///
+ UINT16 MemoryTotalWidth;
+ ///
+ /// The data width in bits of the memory device. A data width of 0x00 and a total width
+ /// of 0x08 indicate that the device is used solely for error correction.
+ ///
+ UINT16 MemoryDataWidth;
+ ///
+ /// The size in bytes of the memory device. A value of 0x00 denotes that no device is
+ /// installed, while a value of all Fs denotes that the size is not known.
+ ///
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;
+ ///
+ /// The form factor of the memory device.
+ ///
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
+ ///
+ /// A memory device set that must be populated with all devices of the same type and
+ /// size. A value of 0x00 indicates that the device is not part of any set. A value of 0xFF
+ /// indicates that the attribute is unknown. Any other value denotes the set number.
+ ///
+ UINT8 MemoryDeviceSet;
+ ///
+ /// The memory type in the socket.
+ ///
+ EFI_MEMORY_ARRAY_TYPE MemoryType;
+ ///
+ /// The memory type details.
+ ///
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
+ ///
+ /// The memory speed in megahertz (MHz). A value of 0x00 denotes that
+ /// the speed is unknown.
+ /// Inconsistent with specification here:
+ /// In MemSubclass specification 0.9, the naming is MemoryTypeSpeed.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ ///
+ /// The memory state.
+ ///
+ EFI_MEMORY_STATE MemoryState;
+} EFI_MEMORY_ARRAY_LINK_DATA;
+
+
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004
+
+///
+/// This data record refers to a specified physical memory array associated with
+/// a given memory range.
+///
+typedef struct {
+ ///
+ /// The starting physical address in bytes of memory mapped to a specified physical
+ /// memory array.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
+ ///
+ /// The last physical address in bytes of memory mapped to a specified physical memory
+ /// array.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
+ ///
+ /// See Physical Memory Array (Type 16) for physical memory array structures.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ ///
+ /// The number of memory devices that form a single row of memory for the address
+ /// partition.
+ ///
+ UINT16 MemoryArrayPartitionWidth;
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;
+
+
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005
+
+///
+/// This data record refers to a physical memory device that is associated with
+/// a given memory range.
+///
+typedef struct {
+ ///
+ /// The starting physical address that is associated with the device.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;
+ ///
+ /// The ending physical address that is associated with the device.
+ ///
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;
+ ///
+ /// A link to the memory device data structure.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;
+ ///
+ /// A link to the memory array data structure.
+ ///
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ ///
+ /// The position of the memory device in a row. A value of 0x00 is reserved and a value
+ /// of 0xFF indicates that the position is unknown.
+ ///
+ UINT8 MemoryDevicePartitionRowPosition;
+ ///
+ /// The position of the device in an interleave.
+ ///
+ UINT8 MemoryDeviceInterleavePosition;
+ ///
+ /// The maximum number of consecutive rows from the device that are accessed in a
+ /// single interleave transfer. A value of 0x00 indicates that the device is not interleaved
+ /// and a value of 0xFF indicates that the interleave configuration is unknown.
+ ///
+ UINT8 MemoryDeviceInterleaveDataDepth;
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;
+
+
+//
+// Memory. Channel Device Type - SMBIOS Type 37
+//
+
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006
+
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {
+ EfiMemoryChannelTypeOther = 1,
+ EfiMemoryChannelTypeUnknown = 2,
+ EfiMemoryChannelTypeRambus = 3,
+ EfiMemoryChannelTypeSyncLink = 4
+} EFI_MEMORY_CHANNEL_TYPE;
+
+///
+/// This data record refers the type of memory that is associated with the channel. This data record is a
+/// structure.
+/// The type definition structure for EFI_MEMORY_CHANNEL_TYPE_DATA is in SMBIOS 2.3.4,
+/// Table 3.3.38, Type 37, with the following offsets:
+/// - Offset 0x4
+/// - Offset 0x5
+/// - Offset 0x6
+///
+typedef struct {
+ ///
+ /// The type of memory that is associated with the channel.
+ ///
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;
+ ///
+ /// The maximum load that is supported by the channel.
+ ///
+ UINT8 MemoryChannelMaximumLoad;
+ ///
+ /// The number of memory devices on this channel.
+ ///
+ UINT8 MemoryChannelDeviceCount;
+} EFI_MEMORY_CHANNEL_TYPE_DATA;
+
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007
+
+///
+/// This data record refers to the memory device that is associated with the memory channel. This data
+/// record is a structure.
+/// The type definition structure for EFI_MEMORY_CHANNEL_DEVICE_DATA is in SMBIOS 2.3.4,
+/// Table 3.3.38, Type 37, with the following offsets:
+/// - Offset 0x7
+/// - Offset 0x8
+///
+typedef struct {
+ ///
+ /// A number between one and MemoryChannelDeviceCount plus an arbitrary base.
+ ///
+ UINT8 DeviceId;
+ ///
+ /// The Link of the associated memory device. See Memory Device (Type 17) for
+ /// memory devices.
+ ///
+ EFI_INTER_LINK_DATA DeviceLink;
+ ///
+ /// The number of load units that this device consumes.
+ ///
+ UINT8 MemoryChannelDeviceLoad;
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;
+
+//
+// Memory. Controller Information - SMBIOS Type 5
+//
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+#define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef enum {
+ EfiErrorDetectingMethodOther = 1,
+ EfiErrorDetectingMethodUnknown = 2,
+ EfiErrorDetectingMethodNone = 3,
+ EfiErrorDetectingMethodParity = 4,
+ EfiErrorDetectingMethod32Ecc = 5,
+ EfiErrorDetectingMethod64Ecc = 6,
+ EfiErrorDetectingMethod128Ecc = 7,
+ EfiErrorDetectingMethodCrc = 8
+} EFI_MEMORY_ERROR_DETECT_METHOD_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT8 Other :1;
+ UINT8 Unknown :1;
+ UINT8 None :1;
+ UINT8 SingleBitErrorCorrect :1;
+ UINT8 DoubleBitErrorCorrect :1;
+ UINT8 ErrorScrubbing :1;
+ UINT8 Reserved :2;
+} EFI_MEMORY_ERROR_CORRECT_CAPABILITY;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef enum {
+ EfiMemoryInterleaveOther = 1,
+ EfiMemoryInterleaveUnknown = 2,
+ EfiMemoryInterleaveOneWay = 3,
+ EfiMemoryInterleaveTwoWay = 4,
+ EfiMemoryInterleaveFourWay = 5,
+ EfiMemoryInterleaveEightWay = 6,
+ EfiMemoryInterleaveSixteenWay = 7
+} EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 SeventyNs:1;
+ UINT16 SixtyNs :1;
+ UINT16 FiftyNs :1;
+ UINT16 Reserved :11;
+} EFI_MEMORY_SPEED_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT16 Other :1;
+ UINT16 Unknown :1;
+ UINT16 Standard :1;
+ UINT16 FastPageMode:1;
+ UINT16 EDO :1;
+ UINT16 Parity :1;
+ UINT16 ECC :1;
+ UINT16 SIMM :1;
+ UINT16 DIMM :1;
+ UINT16 BurstEdo :1;
+ UINT16 SDRAM :1;
+ UINT16 Reserved :5;
+} EFI_MEMORY_SUPPORTED_TYPE;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ UINT8 Five :1;
+ UINT8 Three :1;
+ UINT8 Two :1;
+ UINT8 Reserved:5;
+} EFI_MEMORY_MODULE_VOLTAGE_TYPE;
+
+///
+/// EFI_MEMORY_CONTROLLER_INFORMATION is obsolete
+/// Use EFI_MEMORY_CONTROLLER_INFORMATION_DATA instead
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ UINT16 *MemoryModuleConfigHandles;
+} EFI_MEMORY_CONTROLLER_INFORMATION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 5.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;
+ UINT8 MaxMemoryModuleSize;
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;
+ UINT8 NumberofMemorySlot;
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;
+ EFI_INTER_LINK_DATA MemoryModuleConfig[1];
+} EFI_MEMORY_CONTROLLER_INFORMATION_DATA;
+
+///
+/// Memory. Error Information - SMBIOS Type 18
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+#define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryErrorOther = 1,
+ EfiMemoryErrorUnknown = 2,
+ EfiMemoryErrorOk = 3,
+ EfiMemoryErrorBadRead = 4,
+ EfiMemoryErrorParity = 5,
+ EfiMemoryErrorSigleBit = 6,
+ EfiMemoryErrorDoubleBit = 7,
+ EfiMemoryErrorMultiBit = 8,
+ EfiMemoryErrorNibble = 9,
+ EfiMemoryErrorChecksum = 10,
+ EfiMemoryErrorCrc = 11,
+ EfiMemoryErrorCorrectSingleBit = 12,
+ EfiMemoryErrorCorrected = 13,
+ EfiMemoryErrorUnCorrectable = 14
+} EFI_MEMORY_ERROR_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryGranularityOther = 1,
+ EfiMemoryGranularityOtherUnknown = 2,
+ EfiMemoryGranularityDeviceLevel = 3,
+ EfiMemoryGranularityMemPartitionLevel = 4
+} EFI_MEMORY_ERROR_GRANULARITY_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef enum {
+ EfiMemoryErrorOperationOther = 1,
+ EfiMemoryErrorOperationUnknown = 2,
+ EfiMemoryErrorOperationRead = 3,
+ EfiMemoryErrorOperationWrite = 4,
+ EfiMemoryErrorOperationPartialWrite = 5
+} EFI_MEMORY_ERROR_OPERATION_TYPE;
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 18.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT32 MemoryArrayErrorAddress;
+ UINT32 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+} EFI_MEMORY_32BIT_ERROR_INFORMATION;
+
+///
+/// Memory. Error Information - SMBIOS Type 33.
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 33.
+///
+#define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 type 33.
+///
+typedef struct {
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;
+ UINT32 VendorSyndrome;
+ UINT64 MemoryArrayErrorAddress;
+ UINT64 DeviceErrorAddress;
+ UINT32 DeviceErrorResolution;
+} EFI_MEMORY_64BIT_ERROR_INFORMATION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;
+ EFI_MEMORY_CONTROLLER_INFORMATION MemoryControllerInfo;
+ EFI_MEMORY_32BIT_ERROR_INFORMATION Memory32bitErrorInfo;
+ EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo;
+} EFI_MEMORY_SUBCLASS_RECORDS;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+#define EFI_MISC_SUBCLASS_VERSION 0x0100
+
+#pragma pack(1)
+
+//
+// Last PCI Bus Number
+//
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001
+
+typedef struct {
+ UINT8 LastPciBus;
+} EFI_MISC_LAST_PCI_BUS_DATA;
+
+//
+// Misc. BIOS Vendor - SMBIOS Type 0
+//
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002
+
+typedef struct {
+ UINT64 Reserved1 :2;
+ UINT64 Unknown :1;
+ UINT64 BiosCharacteristicsNotSupported :1;
+ UINT64 IsaIsSupported :1;
+ UINT64 McaIsSupported :1;
+ UINT64 EisaIsSupported :1;
+ UINT64 PciIsSupported :1;
+ UINT64 PcmciaIsSupported :1;
+ UINT64 PlugAndPlayIsSupported :1;
+ UINT64 ApmIsSupported :1;
+ UINT64 BiosIsUpgradable :1;
+ UINT64 BiosShadowingAllowed :1;
+ UINT64 VlVesaIsSupported :1;
+ UINT64 EscdSupportIsAvailable :1;
+ UINT64 BootFromCdIsSupported :1;
+ UINT64 SelectableBootIsSupported :1;
+ UINT64 RomBiosIsSocketed :1;
+ UINT64 BootFromPcmciaIsSupported :1;
+ UINT64 EDDSpecificationIsSupported :1;
+ UINT64 JapaneseNecFloppyIsSupported :1;
+ UINT64 JapaneseToshibaFloppyIsSupported :1;
+ UINT64 Floppy525_360IsSupported :1;
+ UINT64 Floppy525_12IsSupported :1;
+ UINT64 Floppy35_720IsSupported :1;
+ UINT64 Floppy35_288IsSupported :1;
+ UINT64 PrintScreenIsSupported :1;
+ UINT64 Keyboard8042IsSupported :1;
+ UINT64 SerialIsSupported :1;
+ UINT64 PrinterIsSupported :1;
+ UINT64 CgaMonoIsSupported :1;
+ UINT64 NecPc98 :1;
+ UINT64 AcpiIsSupported :1;
+ UINT64 UsbLegacyIsSupported :1;
+ UINT64 AgpIsSupported :1;
+ UINT64 I20BootIsSupported :1;
+ UINT64 Ls120BootIsSupported :1;
+ UINT64 AtapiZipDriveBootIsSupported :1;
+ UINT64 Boot1394IsSupported :1;
+ UINT64 SmartBatteryIsSupported :1;
+ UINT64 BiosBootSpecIsSupported :1;
+ UINT64 FunctionKeyNetworkBootIsSupported :1;
+ UINT64 Reserved :22;
+} EFI_MISC_BIOS_CHARACTERISTICS;
+
+typedef struct {
+ UINT64 BiosReserved :16;
+ UINT64 SystemReserved:16;
+ UINT64 Reserved :32;
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;
+
+typedef struct {
+ STRING_REF BiosVendor;
+ STRING_REF BiosVersion;
+ STRING_REF BiosReleaseDate;
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION
+ BiosCharacteristics2;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosMajorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosMinorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosEmbeddedFirmwareMajorRelease;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 0.
+ ///
+ UINT8 BiosEmbeddedFirmwareMinorRelease;
+} EFI_MISC_BIOS_VENDOR_DATA;
+
+//
+// Misc. System Manufacturer - SMBIOS Type 1
+//
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003
+
+typedef enum {
+ EfiSystemWakeupTypeReserved = 0,
+ EfiSystemWakeupTypeOther = 1,
+ EfiSystemWakeupTypeUnknown = 2,
+ EfiSystemWakeupTypeApmTimer = 3,
+ EfiSystemWakeupTypeModemRing = 4,
+ EfiSystemWakeupTypeLanRemote = 5,
+ EfiSystemWakeupTypePowerSwitch = 6,
+ EfiSystemWakeupTypePciPme = 7,
+ EfiSystemWakeupTypeAcPowerRestored = 8
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;
+
+typedef struct {
+ STRING_REF SystemManufacturer;
+ STRING_REF SystemProductName;
+ STRING_REF SystemVersion;
+ STRING_REF SystemSerialNumber;
+ EFI_GUID SystemUuid;
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 1.
+ ///
+ STRING_REF SystemSKUNumber;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 1.
+ ///
+ STRING_REF SystemFamily;
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+//
+// Misc. Base Board Manufacturer - SMBIOS Type 2
+//
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ UINT32 Motherboard :1;
+ UINT32 RequiresDaughterCard :1;
+ UINT32 Removable :1;
+ UINT32 Replaceable :1;
+ UINT32 HotSwappable :1;
+ UINT32 Reserved :27;
+} EFI_BASE_BOARD_FEATURE_FLAGS;
+
+typedef enum {
+ EfiBaseBoardTypeUnknown = 1,
+ EfiBaseBoardTypeOther = 2,
+ EfiBaseBoardTypeServerBlade = 3,
+ EfiBaseBoardTypeConnectivitySwitch = 4,
+ EfiBaseBoardTypeSystemManagementModule = 5,
+ EfiBaseBoardTypeProcessorModule = 6,
+ EfiBaseBoardTypeIOModule = 7,
+ EfiBaseBoardTypeMemoryModule = 8,
+ EfiBaseBoardTypeDaughterBoard = 9,
+ EfiBaseBoardTypeMotherBoard = 0xA,
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,
+ EfiBaseBoardTypeProcessorIOModule = 0xC,
+ EfiBaseBoardTypeInterconnectBoard = 0xD
+} EFI_BASE_BOARD_TYPE;
+
+typedef struct {
+ STRING_REF BaseBoardManufacturer;
+ STRING_REF BaseBoardProductName;
+ STRING_REF BaseBoardVersion;
+ STRING_REF BaseBoardSerialNumber;
+ STRING_REF BaseBoardAssetTag;
+ STRING_REF BaseBoardChassisLocation;
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;
+ EFI_BASE_BOARD_TYPE BaseBoardType;
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;
+ UINT32 BaseBoardNumberLinks;
+ EFI_INTER_LINK_DATA LinkN;
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;
+
+//
+// Misc. System/Chassis Enclosure - SMBIOS Type 3
+//
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005
+
+typedef enum {
+ EfiMiscChassisTypeOther = 0x1,
+ EfiMiscChassisTypeUnknown = 0x2,
+ EfiMiscChassisTypeDeskTop = 0x3,
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,
+ EfiMiscChassisTypePizzaBox = 0x5,
+ EfiMiscChassisTypeMiniTower = 0x6,
+ EfiMiscChassisTypeTower = 0x7,
+ EfiMiscChassisTypePortable = 0x8,
+ EfiMiscChassisTypeLapTop = 0x9,
+ EfiMiscChassisTypeNotebook = 0xA,
+ EfiMiscChassisTypeHandHeld = 0xB,
+ EfiMiscChassisTypeDockingStation = 0xC,
+ EfiMiscChassisTypeAllInOne = 0xD,
+ EfiMiscChassisTypeSubNotebook = 0xE,
+ EfiMiscChassisTypeSpaceSaving = 0xF,
+ EfiMiscChassisTypeLunchBox = 0x10,
+ EfiMiscChassisTypeMainServerChassis = 0x11,
+ EfiMiscChassisTypeExpansionChassis = 0x12,
+ EfiMiscChassisTypeSubChassis = 0x13,
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,
+ EfiMiscChassisTypePeripheralChassis = 0x15,
+ EfiMiscChassisTypeRaidChassis = 0x16,
+ EfiMiscChassisTypeRackMountChassis = 0x17,
+ EfiMiscChassisTypeSealedCasePc = 0x18,
+ EfiMiscChassisMultiSystemChassis = 0x19
+} EFI_MISC_CHASSIS_TYPE;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass 0.9 specification, it has the incorrect field name "EFI_MISC_CHASSIS_TYPE".
+ /// Change it to "ChassisType" to pass build.
+ ///
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+} EFI_MISC_CHASSIS_STATUS;
+
+typedef enum {
+ EfiChassisStateOther = 0x01,
+ EfiChassisStateUnknown = 0x02,
+ EfiChassisStateSafe = 0x03,
+ EfiChassisStateWarning = 0x04,
+ EfiChassisStateCritical = 0x05,
+ EfiChassisStateNonRecoverable = 0x06
+} EFI_MISC_CHASSIS_STATE;
+
+typedef enum {
+ EfiChassisSecurityStatusOther = 0x01,
+ EfiChassisSecurityStatusUnknown = 0x02,
+ EfiChassisSecurityStatusNone = 0x03,
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
+} EFI_MISC_CHASSIS_SECURITY_STATE;
+
+typedef struct {
+ UINT32 RecordType :1;
+ UINT32 Type :7;
+ UINT32 Reserved :24;
+} EFI_MISC_ELEMENT_TYPE;
+
+typedef struct {
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;
+ EFI_INTER_LINK_DATA ChassisElementStructure;
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;
+ UINT32 ChassisElementMinimum;
+ UINT32 ChassisElementMaximum;
+} EFI_MISC_ELEMENTS;
+
+typedef struct {
+ STRING_REF ChassisManufacturer;
+ STRING_REF ChassisVersion;
+ STRING_REF ChassisSerialNumber;
+ STRING_REF ChassisAssetTag;
+ EFI_MISC_CHASSIS_STATUS ChassisType;
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;
+ UINT32 ChassisOemDefined;
+ UINT32 ChassisHeight;
+ UINT32 ChassisNumberPowerCords;
+ UINT32 ChassisElementCount;
+ UINT32 ChassisElementRecordLength;
+ EFI_MISC_ELEMENTS ChassisElements;
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;
+
+//
+// Misc. Port Connector Information - SMBIOS Type 8
+//
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006
+
+typedef enum {
+ EfiPortConnectorTypeNone = 0x00,
+ EfiPortConnectorTypeCentronics = 0x01,
+ EfiPortConnectorTypeMiniCentronics = 0x02,
+ EfiPortConnectorTypeProprietary = 0x03,
+ EfiPortConnectorTypeDB25Male = 0x04,
+ EfiPortConnectorTypeDB25Female = 0x05,
+ EfiPortConnectorTypeDB15Male = 0x06,
+ EfiPortConnectorTypeDB15Female = 0x07,
+ EfiPortConnectorTypeDB9Male = 0x08,
+ EfiPortConnectorTypeDB9Female = 0x09,
+ EfiPortConnectorTypeRJ11 = 0x0A,
+ EfiPortConnectorTypeRJ45 = 0x0B,
+ EfiPortConnectorType50PinMiniScsi = 0x0C,
+ EfiPortConnectorTypeMiniDin = 0x0D,
+ EfiPortConnectorTypeMicriDin = 0x0E,
+ EfiPortConnectorTypePS2 = 0x0F,
+ EfiPortConnectorTypeInfrared = 0x10,
+ EfiPortConnectorTypeHpHil = 0x11,
+ EfiPortConnectorTypeUsb = 0x12,
+ EfiPortConnectorTypeSsaScsi = 0x13,
+ EfiPortConnectorTypeCircularDin8Male = 0x14,
+ EfiPortConnectorTypeCircularDin8Female = 0x15,
+ EfiPortConnectorTypeOnboardIde = 0x16,
+ EfiPortConnectorTypeOnboardFloppy = 0x17,
+ EfiPortConnectorType9PinDualInline = 0x18,
+ EfiPortConnectorType25PinDualInline = 0x19,
+ EfiPortConnectorType50PinDualInline = 0x1A,
+ EfiPortConnectorType68PinDualInline = 0x1B,
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,
+ EfiPortConnectorTypeBNC = 0x20,
+ EfiPortConnectorType1394 = 0x21,
+ EfiPortConnectorTypePC98 = 0xA0,
+ EfiPortConnectorTypePC98Hireso = 0xA1,
+ EfiPortConnectorTypePCH98 = 0xA2,
+ EfiPortConnectorTypePC98Note = 0xA3,
+ EfiPortConnectorTypePC98Full = 0xA4,
+ EfiPortConnectorTypeOther = 0xFF
+} EFI_MISC_PORT_CONNECTOR_TYPE;
+
+typedef enum {
+ EfiPortTypeNone = 0x00,
+ EfiPortTypeParallelXtAtCompatible = 0x01,
+ EfiPortTypeParallelPortPs2 = 0x02,
+ EfiPortTypeParallelPortEcp = 0x03,
+ EfiPortTypeParallelPortEpp = 0x04,
+ EfiPortTypeParallelPortEcpEpp = 0x05,
+ EfiPortTypeSerialXtAtCompatible = 0x06,
+ EfiPortTypeSerial16450Compatible = 0x07,
+ EfiPortTypeSerial16550Compatible = 0x08,
+ EfiPortTypeSerial16550ACompatible = 0x09,
+ EfiPortTypeScsi = 0x0A,
+ EfiPortTypeMidi = 0x0B,
+ EfiPortTypeJoyStick = 0x0C,
+ EfiPortTypeKeyboard = 0x0D,
+ EfiPortTypeMouse = 0x0E,
+ EfiPortTypeSsaScsi = 0x0F,
+ EfiPortTypeUsb = 0x10,
+ EfiPortTypeFireWire = 0x11,
+ EfiPortTypePcmciaTypeI = 0x12,
+ EfiPortTypePcmciaTypeII = 0x13,
+ EfiPortTypePcmciaTypeIII = 0x14,
+ EfiPortTypeCardBus = 0x15,
+ EfiPortTypeAccessBusPort = 0x16,
+ EfiPortTypeScsiII = 0x17,
+ EfiPortTypeScsiWide = 0x18,
+ EfiPortTypePC98 = 0x19,
+ EfiPortTypePC98Hireso = 0x1A,
+ EfiPortTypePCH98 = 0x1B,
+ EfiPortTypeVideoPort = 0x1C,
+ EfiPortTypeAudioPort = 0x1D,
+ EfiPortTypeModemPort = 0x1E,
+ EfiPortTypeNetworkPort = 0x1F,
+ EfiPortType8251Compatible = 0xA0,
+ EfiPortType8251FifoCompatible = 0xA1,
+ EfiPortTypeOther = 0xFF
+} EFI_MISC_PORT_TYPE;
+
+typedef struct {
+ STRING_REF PortInternalConnectorDesignator;
+ STRING_REF PortExternalConnectorDesignator;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;
+ EFI_MISC_PORT_TYPE PortType;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this type of field is defined as EFI_DEVICE_PATH_PROTOCOL,
+ /// which causes the implementation some complexity. Keep it unchanged for backward
+ /// compatibility.
+ ///
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+//
+// Misc. System Slots - SMBIOS Type 9
+//
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007
+
+typedef enum {
+ EfiSlotTypeOther = 0x01,
+ EfiSlotTypeUnknown = 0x02,
+ EfiSlotTypeIsa = 0x03,
+ EfiSlotTypeMca = 0x04,
+ EfiSlotTypeEisa = 0x05,
+ EfiSlotTypePci = 0x06,
+ EfiSlotTypePcmcia = 0x07,
+ EfiSlotTypeVlVesa = 0x08,
+ EfiSlotTypeProprietary = 0x09,
+ EfiSlotTypeProcessorCardSlot = 0x0A,
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,
+ EfiSlotTypeIORiserCardSlot = 0x0C,
+ EfiSlotTypeNuBus = 0x0D,
+ EfiSlotTypePci66MhzCapable = 0x0E,
+ EfiSlotTypeAgp = 0x0F,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, its naming should be EfiSlotTypeAgp2X
+ /// rather than EfiSlotTypeApg2X.
+ ///
+ EfiSlotTypeAgp2X = 0x10,
+ EfiSlotTypeAgp4X = 0x11,
+ EfiSlotTypePciX = 0x12,
+ EfiSlotTypeAgp8x = 0x13,
+ EfiSlotTypePC98C20 = 0xA0,
+ EfiSlotTypePC98C24 = 0xA1,
+ EfiSlotTypePC98E = 0xA2,
+ EfiSlotTypePC98LocalBus = 0xA3,
+ EfiSlotTypePC98Card = 0xA4,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, these fields aren't defined.
+ /// They're introduced for SmBios 2.6 specification type 9.
+ ///
+ EfiSlotTypePciExpress = 0xA5,
+ EfiSlotTypePciExpressX1 = 0xA6,
+ EfiSlotTypePciExpressX2 = 0xA7,
+ EfiSlotTypePciExpressX4 = 0xA8,
+ EfiSlotTypePciExpressX8 = 0xA9,
+ EfiSlotTypePciExpressX16 = 0xAA
+} EFI_MISC_SLOT_TYPE;
+
+typedef enum {
+ EfiSlotDataBusWidthOther = 0x01,
+ EfiSlotDataBusWidthUnknown = 0x02,
+ EfiSlotDataBusWidth8Bit = 0x03,
+ EfiSlotDataBusWidth16Bit = 0x04,
+ EfiSlotDataBusWidth32Bit = 0x05,
+ EfiSlotDataBusWidth64Bit = 0x06,
+ EfiSlotDataBusWidth128Bit = 0x07,
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, these fields aren't defined.
+ /// They're introduced for SmBios 2.6 specification type 9.
+ ///
+ EfiSlotDataBusWidth1xOrx1 = 0x8,
+ EfiSlotDataBusWidth2xOrx2 = 0x9,
+ EfiSlotDataBusWidth4xOrx4 = 0xA,
+ EfiSlotDataBusWidth8xOrx8 = 0xB,
+ EfiSlotDataBusWidth12xOrx12 = 0xC,
+ EfiSlotDataBusWidth16xOrx16 = 0xD,
+ EfiSlotDataBusWidth32xOrx32 = 0xE
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+typedef enum {
+ EfiSlotUsageOther = 1,
+ EfiSlotUsageUnknown = 2,
+ EfiSlotUsageAvailable = 3,
+ EfiSlotUsageInUse = 4
+} EFI_MISC_SLOT_USAGE;
+
+typedef enum {
+ EfiSlotLengthOther = 1,
+ EfiSlotLengthUnknown = 2,
+ EfiSlotLengthShort = 3,
+ EfiSlotLengthLong = 4
+} EFI_MISC_SLOT_LENGTH;
+
+typedef struct {
+ UINT32 CharacteristicsUnknown :1;
+ UINT32 Provides50Volts :1;
+ UINT32 Provides33Volts :1;
+ UINT32 SharedSlot :1;
+ UINT32 PcCard16Supported :1;
+ UINT32 CardBusSupported :1;
+ UINT32 ZoomVideoSupported :1;
+ UINT32 ModemRingResumeSupported:1;
+ UINT32 PmeSignalSupported :1;
+ UINT32 HotPlugDevicesSupported :1;
+ UINT32 SmbusSignalSupported :1;
+ UINT32 Reserved :21;
+} EFI_MISC_SLOT_CHARACTERISTICS;
+
+typedef struct {
+ STRING_REF SlotDesignation;
+ EFI_MISC_SLOT_TYPE SlotType;
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;
+ EFI_MISC_SLOT_USAGE SlotUsage;
+ EFI_MISC_SLOT_LENGTH SlotLength;
+ UINT16 SlotId;
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;
+
+//
+// Misc. Onboard Device - SMBIOS Type 10
+//
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008
+
+typedef enum {
+ EfiOnBoardDeviceTypeOther = 1,
+ EfiOnBoardDeviceTypeUnknown = 2,
+ EfiOnBoardDeviceTypeVideo = 3,
+ EfiOnBoardDeviceTypeScsiController = 4,
+ EfiOnBoardDeviceTypeEthernet = 5,
+ EfiOnBoardDeviceTypeTokenRing = 6,
+ EfiOnBoardDeviceTypeSound = 7
+} EFI_MISC_ONBOARD_DEVICE_TYPE;
+
+typedef struct {
+ UINT32 DeviceType :16;
+ UINT32 DeviceEnabled :1;
+ UINT32 Reserved :15;
+} EFI_MISC_ONBOARD_DEVICE_STATUS;
+
+typedef struct {
+ STRING_REF OnBoardDeviceDescription;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the name is OnBoardDeviceType.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;
+} EFI_MISC_ONBOARD_DEVICE_DATA;
+
+//
+// Misc. BIOS Language Information - SMBIOS Type 11
+//
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009
+
+typedef struct {
+ STRING_REF OemStringRef[1];
+} EFI_MISC_OEM_STRING_DATA;
+
+//
+// Misc. System Options - SMBIOS Type 12
+//
+typedef struct {
+ STRING_REF SystemOptionStringRef[1];
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;
+
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A
+
+//
+// Misc. Number of Installable Languages - SMBIOS Type 13
+//
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B
+
+typedef struct {
+ UINT32 AbbreviatedLanguageFormat :1;
+ UINT32 Reserved :31;
+} EFI_MISC_LANGUAGE_FLAGS;
+
+typedef struct {
+ UINT16 NumberOfInstallableLanguages;
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;
+ UINT16 CurrentLanguageNumber;
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;
+
+//
+// Misc. System Language String
+//
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C
+
+typedef struct {
+ UINT16 LanguageId;
+ STRING_REF SystemLanguageString;
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;
+
+//
+// Group Associations - SMBIOS Type 14
+//
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D
+
+typedef struct {
+ STRING_REF GroupName;
+ UINT16 NumberGroupItems;
+ UINT16 GroupId;
+} EFI_MISC_GROUP_NAME_DATA;
+
+//
+// Group Item Set Element
+//
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E
+
+typedef struct {
+ EFI_GUID SubClass;
+ EFI_INTER_LINK_DATA GroupLink;
+ UINT16 GroupId;
+ UINT16 GroupElementId;
+} EFI_MISC_GROUP_ITEM_SET_DATA;
+
+//
+// Misc. Pointing Device Type - SMBIOS Type 21
+//
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F
+
+typedef enum {
+ EfiPointingDeviceTypeOther = 0x01,
+ EfiPointingDeviceTypeUnknown = 0x02,
+ EfiPointingDeviceTypeMouse = 0x03,
+ EfiPointingDeviceTypeTrackBall = 0x04,
+ EfiPointingDeviceTypeTrackPoint = 0x05,
+ EfiPointingDeviceTypeGlidePoint = 0x06,
+ EfiPointingDeviceTouchPad = 0x07,
+ EfiPointingDeviceTouchScreen = 0x08,
+ EfiPointingDeviceOpticalSensor = 0x09
+} EFI_MISC_POINTING_DEVICE_TYPE;
+
+typedef enum {
+ EfiPointingDeviceInterfaceOther = 0x01,
+ EfiPointingDeviceInterfaceUnknown = 0x02,
+ EfiPointingDeviceInterfaceSerial = 0x03,
+ EfiPointingDeviceInterfacePs2 = 0x04,
+ EfiPointingDeviceInterfaceInfrared = 0x05,
+ EfiPointingDeviceInterfaceHpHil = 0x06,
+ EfiPointingDeviceInterfaceBusMouse = 0x07,
+ EfiPointingDeviceInterfaceADB = 0x08,
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,
+ EfiPointingDeviceInterfaceUsb = 0xA2
+} EFI_MISC_POINTING_DEVICE_INTERFACE;
+
+typedef struct {
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;
+ UINT16 NumberPointingDeviceButtons;
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;
+} EFI_MISC_POINTING_DEVICE_TYPE_DATA;
+
+//
+// Portable Battery - SMBIOS Type 22
+//
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the name is EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER.
+/// Keep it unchanged for backward compatibilty.
+///
+#define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_DEVICE_CHEMISTRY.
+/// And all field namings are also different with specification.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiPortableBatteryDeviceChemistryOther = 1,
+ EfiPortableBatteryDeviceChemistryUnknown = 2,
+ EfiPortableBatteryDeviceChemistryLeadAcid = 3,
+ EfiPortableBatteryDeviceChemistryNickelCadmium = 4,
+ EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5,
+ EfiPortableBatteryDeviceChemistryLithiumIon = 6,
+ EfiPortableBatteryDeviceChemistryZincAir = 7,
+ EfiPortableBatteryDeviceChemistryLithiumPolymer = 8
+} EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_LOCATION_DATA.
+/// Also, the name and the order of the fields vary with specifications.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ STRING_REF Location;
+ STRING_REF Manufacturer;
+ STRING_REF ManufactureDate;
+ STRING_REF SerialNumber;
+ STRING_REF DeviceName;
+ EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY
+ DeviceChemistry;
+ UINT16 DesignCapacity;
+ UINT16 DesignVoltage;
+ STRING_REF SBDSVersionNumber;
+ UINT8 MaximumError;
+ UINT16 SBDSSerialNumber;
+ UINT16 SBDSManufactureDate;
+ STRING_REF SBDSDeviceChemistry;
+ UINT8 DesignCapacityMultiplier;
+ UINT32 OEMSpecific;
+ UINT8 BatteryNumber; // Temporary
+ BOOLEAN Valid; // Is entry valid - Temporary
+} EFI_MISC_PORTABLE_BATTERY;
+
+
+//
+// Misc. Reset Capabilities - SMBIOS Type 23
+//
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011
+
+typedef struct {
+ UINT32 Status :1;
+ UINT32 BootOption :2;
+ UINT32 BootOptionOnLimit :2;
+ UINT32 WatchdogTimerPresent:1;
+ UINT32 Reserved :26;
+} EFI_MISC_RESET_CAPABILITIES_TYPE;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES_DATA;
+
+//
+// Misc. Hardware Security - SMBIOS Type 24
+//
+#define EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA_RECORD_NUMBER 0x00000012
+
+///
+/// Inconsistent with specification here:
+/// The MiscSubclass specification 0.9 only mentions the possible value of each field in
+/// EFI_MISC_HARDWARE_SECURITY_SETTINGS.
+/// It's implementation-specific in order to to simplify the code logic.
+///
+typedef enum {
+ EfiHardwareSecurityStatusDisabled = 0,
+ EfiHardwareSecurityStatusEnabled = 1,
+ EfiHardwareSecurityStatusNotImplemented = 2,
+ EfiHardwareSecurityStatusUnknown = 3
+} EFI_MISC_HARDWARE_SECURITY_STATUS;
+
+typedef struct {
+ UINT32 FrontPanelResetStatus :2;
+ UINT32 AdministratorPasswordStatus :2;
+ UINT32 KeyboardPasswordStatus :2;
+ UINT32 PowerOnPasswordStatus :2;
+ UINT32 Reserved :24;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;
+
+//
+// System Power Controls - SMBIOS Type 25
+//
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013
+
+typedef struct {
+ UINT16 ScheduledPoweronMonth;
+ UINT16 ScheduledPoweronDayOfMonth;
+ UINT16 ScheduledPoweronHour;
+ UINT16 ScheduledPoweronMinute;
+ UINT16 ScheduledPoweronSecond;
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;
+
+//
+// Voltage Probe - SMBIOS Type 26
+//
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014
+
+typedef struct {
+ UINT32 VoltageProbeSite :5;
+ UINT32 VoltageProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF VoltageProbeDescription;
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 VoltageProbeOemDefined;
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;
+
+//
+// Cooling Device - SMBIOS Type 27
+//
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015
+
+typedef struct {
+ UINT32 CoolingDevice :5;
+ UINT32 CoolingDeviceStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_COOLING_DEVICE_TYPE;
+
+typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT8 CoolingDeviceUnitGroup;
+ UINT16 CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+//
+// Temperature Probe - SMBIOS Type 28
+//
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016
+
+typedef struct {
+ UINT32 TemperatureProbeSite :5;
+ UINT32 TemperatureProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF TemperatureProbeDescription;
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION
+ TemperatureProbeLocation;
+ ///
+ /// Inconsistent with specification here:
+ /// MiscSubclass 0.9 specification defines the fields type as EFI_EXP_BASE10_DATA.
+ /// In fact, they should be UINT16 type because they refer to 16bit width data.
+ /// Keeping this inconsistency for backward compatibility.
+ ///
+ UINT16 TemperatureProbeMaximumValue;
+ UINT16 TemperatureProbeMinimumValue;
+ UINT16 TemperatureProbeResolution;
+ UINT16 TemperatureProbeTolerance;
+ UINT16 TemperatureProbeAccuracy;
+ UINT16 TemperatureProbeNominalValue;
+ UINT16 MDLowerNoncriticalThreshold;
+ UINT16 MDUpperNoncriticalThreshold;
+ UINT16 MDLowerCriticalThreshold;
+ UINT16 MDUpperCriticalThreshold;
+ UINT16 MDLowerNonrecoverableThreshold;
+ UINT16 MDUpperNonrecoverableThreshold;
+ UINT32 TemperatureProbeOemDefined;
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+//
+// Electrical Current Probe - SMBIOS Type 29
+//
+
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017
+
+typedef struct {
+ UINT32 ElectricalCurrentProbeSite :5;
+ UINT32 ElectricalCurrentProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF ElectricalCurrentProbeDescription;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION
+ ElectricalCurrentProbeLocation;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 ElectricalCurrentProbeOemDefined;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;
+
+//
+// Out-of-Band Remote Access - SMBIOS Type 30
+//
+
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018
+
+typedef struct {
+ UINT32 InboundConnectionEnabled :1;
+ UINT32 OutboundConnectionEnabled :1;
+ UINT32 Reserved :30;
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;
+
+typedef struct {
+ STRING_REF RemoteAccessManufacturerNameDescription;
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;
+
+//
+// Misc. BIS Entry Point - SMBIOS Type 31
+//
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;
+} EFI_MISC_BIS_ENTRY_POINT_DATA;
+
+//
+// Misc. Boot Information - SMBIOS Type 32
+//
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef enum {
+ EfiBootInformationStatusNoError = 0x00,
+ EfiBootInformationStatusNoBootableMedia = 0x01,
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,
+ EfiBootInformationStatusOSDetectedFailure = 0x04,
+ EfiBootInformationStatusUserRequestedBoot = 0x05,
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,
+ EfiBootInformationStatusStartReserved = 0x09,
+ EfiBootInformationStatusStartOemSpecific = 0x80,
+ EfiBootInformationStatusStartProductSpecific = 0xC0
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the field name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ UINT8 BootInformationData[9];
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+//
+// Management Device - SMBIOS Type 34
+//
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B
+
+typedef enum {
+ EfiManagementDeviceTypeOther = 0x01,
+ EfiManagementDeviceTypeUnknown = 0x02,
+ EfiManagementDeviceTypeLm75 = 0x03,
+ EfiManagementDeviceTypeLm78 = 0x04,
+ EfiManagementDeviceTypeLm79 = 0x05,
+ EfiManagementDeviceTypeLm80 = 0x06,
+ EfiManagementDeviceTypeLm81 = 0x07,
+ EfiManagementDeviceTypeAdm9240 = 0x08,
+ EfiManagementDeviceTypeDs1780 = 0x09,
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,
+ EfiManagementDeviceTypeGl518Sm = 0x0B,
+ EfiManagementDeviceTypeW83781D = 0x0C,
+ EfiManagementDeviceTypeHt82H791 = 0x0D
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;
+
+typedef enum {
+ EfiManagementDeviceAddressTypeOther = 1,
+ EfiManagementDeviceAddressTypeUnknown = 2,
+ EfiManagementDeviceAddressTypeIOPort = 3,
+ EfiManagementDeviceAddressTypeMemory = 4,
+ EfiManagementDeviceAddressTypeSmbus = 5
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
+
+typedef struct {
+ STRING_REF ManagementDeviceDescription;
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;
+ UINTN ManagementDeviceAddress;
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
+ ManagementDeviceAddressType;
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;
+
+//
+// Management Device Component - SMBIOS Type 35
+//
+
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C
+
+typedef struct {
+ STRING_REF ManagementDeviceComponentDescription;
+ EFI_INTER_LINK_DATA ManagementDeviceLink;
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this field is NOT defined.
+ /// It's introduced for SmBios 2.6 specification type 35.
+ ///
+ EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, this field is NOT defined.
+ /// It's implementation-specific to simplify the code logic.
+ ///
+ UINT8 ComponentType;
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+//
+// IPMI Data Record - SMBIOS Type 38
+//
+typedef enum {
+ EfiIpmiOther = 0,
+ EfiIpmiKcs = 1,
+ EfiIpmiSmic = 2,
+ EfiIpmiBt = 3
+} EFI_MISC_IPMI_INTERFACE_TYPE;
+
+typedef struct {
+ UINT16 IpmiSpecLeastSignificantDigit:4;
+ UINT16 IpmiSpecMostSignificantDigit: 4;
+ UINT16 Reserved: 8;
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;
+
+typedef struct {
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;
+ EFI_MISC_IPMI_SPECIFICATION_REVISION
+ IpmiSpecificationRevision;
+ UINT16 IpmiI2CSlaveAddress;
+ UINT16 IpmiNvDeviceAddress;
+ UINT64 IpmiBaseAddress;
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;
+
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D
+///
+/// The definition above is *NOT* defined in MiscSubclass specifications 0.9.
+/// It's defined for backward compatibility.
+///
+#define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER
+
+///
+/// System Power supply Record - SMBIOS Type 39
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the type of all fields are UINT32.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT16 PowerSupplyHotReplaceable:1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+} EFI_MISC_POWER_SUPPLY_CHARACTERISTICS;
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_POWER_SUPPLY_UNIT_GROUP_DATA.
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT16 PowerUnitGroup;
+ STRING_REF PowerSupplyLocation;
+ STRING_REF PowerSupplyDeviceName;
+ STRING_REF PowerSupplyManufacturer;
+ STRING_REF PowerSupplySerialNumber;
+ STRING_REF PowerSupplyAssetTagNumber;
+ STRING_REF PowerSupplyModelPartNumber;
+ STRING_REF PowerSupplyRevisionLevel;
+ UINT16 PowerSupplyMaxPowerCapacity;
+ EFI_MISC_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E
+
+///
+/// OEM Data Record - SMBIOS Type 0x80-0xFF
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the structure name is EFI_SMBIOS_STRUCTURE_HDR.
+/// Due to this, the structure is commonly used by vendors to construct SmBios type 0x80~0xFF table,
+/// Keep it unchanged for backward compatibilty.
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE_HDR;
+
+typedef struct {
+ ///
+ /// Inconsistent with specification here:
+ /// In MiscSubclass specification 0.9, the field name is EFI_SMBIOS_STRUCTURE_HDR.
+ /// Keep it unchanged for backward compatibilty.
+ ///
+ SMBIOS_STRUCTURE_HDR Header;
+ UINT8 RawData[1];
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F
+
+///
+/// Misc. System Event Log - SMBIOS Type 15
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 15.
+///
+#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020
+
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 15.
+///
+typedef struct {
+ UINT16 LogAreaLength;
+ UINT16 LogHeaderStartOffset;
+ UINT16 LogDataStartOffset;
+ UINT8 AccessMethod;
+ UINT8 LogStatus;
+ UINT32 LogChangeToken;
+ UINT32 AccessMethodAddress;
+ UINT8 LogHeaderFormat;
+ UINT8 NumberOfSupportedLogType;
+ UINT8 LengthOfLogDescriptor;
+} EFI_MISC_SYSTEM_EVENT_LOG_DATA;
+
+//
+// Access Method.
+// 0x00~0x04: as following definition
+// 0x05~0x7f: Available for future assignment.
+// 0x80~0xff: BIOS Vendor/OEM-specific.
+//
+#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00
+#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01
+#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02
+#define ACCESS_MEMORY_MAPPED 0x03
+#define ACCESS_GPNV 0x04
+
+///
+/// Management Device Threshold Data Record - SMBIOS Type 36
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 36.
+///
+#define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021
+///
+/// Inconsistent with specification here:
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.
+/// It's introduced for SmBios 2.6 specification type 36.
+///
+typedef struct {
+ UINT16 LowerThresNonCritical;
+ UINT16 UpperThresNonCritical;
+ UINT16 LowerThresCritical;
+ UINT16 UpperThresCritical;
+ UINT16 LowerThresNonRecover;
+ UINT16 UpperThresNonRecover;
+} EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD;
+
+//
+// Declare the following strutures alias to use them more conviniently.
+//
+typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;
+typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;
+typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;
+typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;
+typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;
+typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;
+typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;
+typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;
+typedef EFI_MISC_POINTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;
+typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;
+typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;
+typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;
+typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;
+typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;
+typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;
+typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;
+typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;
+typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;
+typedef EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA EFI_MISC_SCHEDULED_POWER_ON_MONTH;
+typedef EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA EFI_MISC_VOLTAGE_PROBE_DESCRIPTION;
+typedef EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA EFI_MISC_COOLING_DEVICE_TEMP_LINK;
+typedef EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION;
+typedef EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION;
+typedef EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION;
+typedef EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION;
+typedef EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;
+ EFI_MISC_OEM_STRING_DATA MiscOemString;
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;
+ EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;
+ EFI_MISC_POINTING_DEVICE_TYPE_DATA MiscPointingDeviceTypeData;
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ MiscRemoteAccessManufacturerDescriptionData;
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ MiscmangementDeviceComponentDescriptionData;
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;
+ EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold;
+} EFI_MISC_SUBCLASS_RECORDS;
+
+///
+/// Inconsistent with specification here:
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.
+/// It is implementation-specific to simplify the code logic.
+///
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+} EFI_MISC_SUBCLASS_DRIVER_DATA;
+#pragma pack()
+
+///
+/// Inconsistent with specification here:
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.
+/// But value is meaningful, 0 means Reserved.
+///
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0
+///
+/// Inconsistent with specification here:
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.
+/// But value is meaningful, -1 means Not Applicable.
+///
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF
+
+#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscMemoryDeviceFunction.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscMemoryDeviceFunction.c
index 3872312c30..3e74ec31db 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscMemoryDeviceFunction.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscMemoryDeviceFunction.c
@@ -1,12 +1,9 @@
/*++
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscMemoryDeviceFunction.c
@@ -22,8 +19,6 @@ Abstract:
#include "CommonHeader.h"
#include "MiscSubclassDriver.h"
-#include <Protocol/DataHub.h>
-#include <Guid/DataHubRecords.h>
#include <Protocol/MemInfo.h>
@@ -46,13 +41,6 @@ enum {
};
-typedef struct {
- EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
- EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
- EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
- UINT16 MemoryArrayPartitionWidth;
-} EFI_MEMORY_ARRAY_START_ADDRESS;
-
/**
This function makes boot time changes to the contents of the
MiscBiosVendor (Type 0).
@@ -108,6 +96,7 @@ MISC_SMBIOS_TABLE_FUNCTION( MiscMemoryDevice )
EFI_STATUS Status;
STRING_REF TokenToGet;
SMBIOS_TABLE_TYPE17 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE19 *SmbiosRecord19;
EFI_SMBIOS_HANDLE SmbiosHandle;
EFI_MEMORY_ARRAY_LINK_DATA *ForType17InputData;
UINT16 DdrFreq=0;
@@ -117,6 +106,7 @@ MISC_SMBIOS_TABLE_FUNCTION( MiscMemoryDevice )
UINT8 Dimm;
UINT8 NumSlots;
+ UINT64 TotalMemorySize;
STRING_REF DevLocator[] = {
STRING_TOKEN(STR_MISC_MEM_DEV_LOCATOR0), STRING_TOKEN(STR_MISC_MEM_DEV_LOCATOR1)
};
@@ -183,137 +173,193 @@ MISC_SMBIOS_TABLE_FUNCTION( MiscMemoryDevice )
break;
}
- for (Dimm = 0; Dimm < NumSlots; Dimm++) {
- //
- // Memory Device Locator
- //
- TokenToGet = DevLocator[Dimm];
- MemDevice = SmbiosMiscGetString (TokenToGet);
- MemDeviceStrLen = StrLen(MemDevice);
- if (MemDeviceStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- TokenToGet = DevLocator[Dimm];
- MemDevice = SmbiosMiscGetString (TokenToGet);
- MemDeviceStrLen = StrLen(MemDevice);
- if (MemDeviceStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Memory Bank Locator
- //
- TokenToGet = BankLocator[Dimm];
- MemBankLocator = SmbiosMiscGetString (TokenToGet);
- MemBankLocatorStrLen = StrLen(MemBankLocator);
- if (MemBankLocatorStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Memory Manufacturer
- //
- TokenToGet = STRING_TOKEN (STR_MISC_MEM_MANUFACTURER);
- MemManufacturer = SmbiosMiscGetString (TokenToGet);
- MemManufacturerStrLen = StrLen(MemManufacturer);
- if (MemManufacturerStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Memory Serial Number
- //
- TokenToGet = STRING_TOKEN (STR_MISC_MEM_SERIAL_NO);
- MemSerialNumber = SmbiosMiscGetString (TokenToGet);
- MemSerialNumberStrLen = StrLen(MemSerialNumber);
- if (MemSerialNumberStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Memory Asset Tag Number
- //
- TokenToGet = STRING_TOKEN (STR_MISC_MEM_ASSET_TAG);
- MemAssetTag = SmbiosMiscGetString (TokenToGet);
- MemAssetTagStrLen = StrLen(MemAssetTag);
- if (MemAssetTagStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Memory Part Number
- //
- TokenToGet = STRING_TOKEN (STR_MISC_MEM_PART_NUMBER);
- MemPartNumber = SmbiosMiscGetString (TokenToGet);
- MemPartNumberStrLen = StrLen(MemPartNumber);
- if (MemPartNumberStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Two zeros following the last string.
- //
- SmbiosRecord = AllocatePool(sizeof (SMBIOS_TABLE_TYPE17) + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1 + MemAssetTagStrLen+1 + MemPartNumberStrLen + 1 + 1);
- ZeroMem(SmbiosRecord, sizeof (SMBIOS_TABLE_TYPE17) + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1 + MemAssetTagStrLen+1 + MemPartNumberStrLen + 1 + 1);
-
- SmbiosRecord->Hdr.Type = EFI_SMBIOS_TYPE_MEMORY_DEVICE;
- SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE17);
-
- //
- // Make handle chosen by smbios protocol.add automatically.
- //
- SmbiosRecord->Hdr.Handle = 0;
-
- //
- // Memory Array Handle will be the 3rd optional string following the formatted structure.
- //
GetType16Hndl( Smbios, &Type16Handle);
- SmbiosRecord->MemoryArrayHandle = Type16Handle;
+ TotalMemorySize = 0;
+ for (Dimm = 0; Dimm < NumSlots; Dimm++) {
+ //
+ // Memory Device Locator
+ //
+ TokenToGet = DevLocator[Dimm];
+ MemDevice = SmbiosMiscGetString (TokenToGet);
+ MemDeviceStrLen = StrLen(MemDevice);
+ if (MemDeviceStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
- //
- // Memory Size
- //
- if ((MemInfoHob->MemInfoData.dimmSize[Dimm])!=0){
- SmbiosRecord->TotalWidth = 32;
- SmbiosRecord->DataWidth = 32;
- SmbiosRecord->Size = MemInfoHob->MemInfoData.dimmSize[Dimm];
- SmbiosRecord->Speed = DdrFreq;
- SmbiosRecord->ConfiguredMemoryClockSpeed = DdrFreq;
- SmbiosRecord->FormFactor = EfiMemoryFormFactorDimm;
- }
+ TokenToGet = DevLocator[Dimm];
+ MemDevice = SmbiosMiscGetString (TokenToGet);
+ MemDeviceStrLen = StrLen(MemDevice);
+ if (MemDeviceStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Memory Bank Locator
+ //
+ TokenToGet = BankLocator[Dimm];
+ MemBankLocator = SmbiosMiscGetString (TokenToGet);
+ MemBankLocatorStrLen = StrLen(MemBankLocator);
+ if (MemBankLocatorStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Memory Manufacturer
+ //
+ TokenToGet = STRING_TOKEN (STR_MISC_MEM_MANUFACTURER);
+ MemManufacturer = SmbiosMiscGetString (TokenToGet);
+ MemManufacturerStrLen = StrLen(MemManufacturer);
+ if (MemManufacturerStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Memory Serial Number
+ //
+ TokenToGet = STRING_TOKEN (STR_MISC_MEM_SERIAL_NO);
+ MemSerialNumber = SmbiosMiscGetString (TokenToGet);
+ MemSerialNumberStrLen = StrLen(MemSerialNumber);
+ if (MemSerialNumberStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Memory Asset Tag Number
+ //
+ TokenToGet = STRING_TOKEN (STR_MISC_MEM_ASSET_TAG);
+ MemAssetTag = SmbiosMiscGetString (TokenToGet);
+ MemAssetTagStrLen = StrLen(MemAssetTag);
+ if (MemAssetTagStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Memory Part Number
+ //
+ TokenToGet = STRING_TOKEN (STR_MISC_MEM_PART_NUMBER);
+ MemPartNumber = SmbiosMiscGetString (TokenToGet);
+ MemPartNumberStrLen = StrLen(MemPartNumber);
+ if (MemPartNumberStrLen > SMBIOS_STRING_MAX_LENGTH) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Two zeros following the last string.
+ //
+ SmbiosRecord = AllocatePool(sizeof (SMBIOS_TABLE_TYPE17) + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1 + MemAssetTagStrLen+1 + MemPartNumberStrLen + 1 + 1);
+ ZeroMem(SmbiosRecord, sizeof (SMBIOS_TABLE_TYPE17) + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1 + MemAssetTagStrLen+1 + MemPartNumberStrLen + 1 + 1);
+
+ SmbiosRecord->Hdr.Type = EFI_SMBIOS_TYPE_MEMORY_DEVICE;
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE17);
+
+ //
+ // Make handle chosen by smbios protocol.add automatically.
+ //
+ SmbiosRecord->Hdr.Handle = 0;
+
+ //
+ // Memory Array Handle will be the 3rd optional string following the formatted structure.
+ //
+ SmbiosRecord->MemoryArrayHandle = Type16Handle;
+
+ //
+ // Memory Size
+ //
+ if ((MemInfoHob->MemInfoData.dimmSize[Dimm])!=0){
+ SmbiosRecord->TotalWidth = 32;
+ SmbiosRecord->DataWidth = 32;
+ SmbiosRecord->Size = MemInfoHob->MemInfoData.dimmSize[Dimm];
+ SmbiosRecord->Speed = DdrFreq;
+ SmbiosRecord->ConfiguredMemoryClockSpeed = DdrFreq;
+ SmbiosRecord->FormFactor = EfiMemoryFormFactorDimm;
+ }
- SmbiosRecord->DeviceSet =(UINT8) ForType17InputData->MemoryDeviceSet;
- SmbiosRecord->DeviceLocator= 1;
- SmbiosRecord->BankLocator = 2;
+ SmbiosRecord->DeviceSet =(UINT8) ForType17InputData->MemoryDeviceSet;
+ SmbiosRecord->DeviceLocator= 1;
+ SmbiosRecord->BankLocator = 2;
- SmbiosRecord->Manufacturer = 3;
- SmbiosRecord->SerialNumber= 4;
- SmbiosRecord->AssetTag= 5;
- SmbiosRecord->PartNumber= 6;
- SmbiosRecord->Attributes = (UINT8) ForType17InputData->MemoryState;
- SmbiosRecord->MemoryType = MemoryType;
+ SmbiosRecord->Manufacturer = 3;
+ SmbiosRecord->SerialNumber= 4;
+ SmbiosRecord->AssetTag= 5;
+ SmbiosRecord->PartNumber= 6;
+ SmbiosRecord->Attributes = (UINT8) ForType17InputData->MemoryState;
+ SmbiosRecord->MemoryType = MemoryType;
- OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
- UnicodeStrToAsciiStr(MemDevice, OptionalStrStart);
- UnicodeStrToAsciiStr(MemBankLocator, OptionalStrStart + MemDeviceStrLen + 1);
- UnicodeStrToAsciiStr(MemManufacturer, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1);
- UnicodeStrToAsciiStr(MemSerialNumber, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1);
- UnicodeStrToAsciiStr(MemAssetTag, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1);
- UnicodeStrToAsciiStr(MemPartNumber, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1+ MemAssetTagStrLen+1 );
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ UnicodeStrToAsciiStr(MemDevice, OptionalStrStart);
+ UnicodeStrToAsciiStr(MemBankLocator, OptionalStrStart + MemDeviceStrLen + 1);
+ UnicodeStrToAsciiStr(MemManufacturer, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1);
+ UnicodeStrToAsciiStr(MemSerialNumber, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1);
+ UnicodeStrToAsciiStr(MemAssetTag, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1);
+ UnicodeStrToAsciiStr(MemPartNumber, OptionalStrStart + MemDeviceStrLen + 1 + MemBankLocatorStrLen + 1 + MemManufacturerStrLen + 1 + MemSerialNumberStrLen + 1+ MemAssetTagStrLen+1 );
+
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ Status = Smbios-> Add(
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *) SmbiosRecord
+ );
+
+ if ((SmbiosRecord->Size & BIT15) != 0) {
+ //
+ // Size is in KB
+ //
+ TotalMemorySize = TotalMemorySize + LShiftU64 (SmbiosRecord->Size, 10);
+ } else {
+ //
+ // Size is in MB
+ //
+ TotalMemorySize = TotalMemorySize + LShiftU64 (SmbiosRecord->Size, 20);
+ }
+
+ FreePool(SmbiosRecord);
+ }
+
+ //
+ // Allocate and zero SMBIOS TYPE 19 Record
+ //
+ SmbiosRecord19 = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE19));
+ ASSERT (SmbiosRecord19 != NULL);
+
+ //
+ // Fill in SMBIOS type 19 information
+ //
+ SmbiosRecord19->Hdr.Type = SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS;
+ SmbiosRecord19->Hdr.Length = (UINT8) sizeof (SMBIOS_TABLE_TYPE19);
+ SmbiosRecord19->Hdr.Handle = 0;
+
+ SmbiosRecord19->MemoryArrayHandle = Type16Handle;
+ SmbiosRecord19->PartitionWidth = NumSlots;
+ if (TotalMemorySize <= SIZE_4TB) {
+ SmbiosRecord19->StartingAddress = 0x0;
+ //
+ // Convert bytes to KB
+ //
+ SmbiosRecord19->EndingAddress = (UINT32)RShiftU64 (TotalMemorySize, 10) - 1;
+ SmbiosRecord19->ExtendedStartingAddress = 0;
+ SmbiosRecord19->ExtendedEndingAddress = 0;
+ } else {
+ SmbiosRecord19->StartingAddress = 0xffffffff;
+ SmbiosRecord19->EndingAddress = 0xffffffff;
+ SmbiosRecord19->ExtendedStartingAddress = 0;
+ SmbiosRecord19->ExtendedEndingAddress = TotalMemorySize - 1;
+ }
//
- // Now we have got the full smbios record, call smbios protocol to add this record.
+ // Add SMBIOS type 19 record to SMBIOS table.
//
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
- Status = Smbios-> Add(
- Smbios,
- NULL,
- &SmbiosHandle,
- (EFI_SMBIOS_TABLE_HEADER *) SmbiosRecord
- );
- FreePool(SmbiosRecord);
- }
+ Smbios->Add(
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)SmbiosRecord19
+ );
+
return Status;
}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
index 2f25ab802b..97a782e362 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
@@ -17,7 +17,6 @@ Abstract:
#include "CommonHeader.h"
#include "MiscSubclassDriver.h"
-#include <Protocol/DataHub.h>
#include <Library/HiiLib.h>
#include <Library/PrintLib.h>
#include <Protocol/PciRootBridgeIo.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheData.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheData.c
index 6af7f56107..44f2530ac3 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheData.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheData.c
@@ -1,12 +1,9 @@
/*++
-Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscBiosProcessorCache.c
@@ -28,6 +25,4 @@ Abstract:
//
// Static (possibly build generated) Processor cache data.
//
-MISC_SMBIOS_TABLE_DATA(EFI_CACHE_VARIABLE_RECORD, MiscProcessorCache) = {
-0
-};
+MISC_SMBIOS_TABLE_DATA(UINTN, MiscProcessorCache) = 0;
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
index ca121525a0..c64e87e20b 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
@@ -1,12 +1,9 @@
/*++
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscProcessorCacheFunction.c
@@ -20,170 +17,144 @@ Abstract:
--*/
#include "CommonHeader.h"
#include "MiscSubclassDriver.h"
-#include <Protocol/DataHub.h>
-#include <Guid/DataHubRecords.h>
-
-UINT32
-ConvertBase2ToRaw (
- IN EFI_EXP_BASE2_DATA *Data)
-{
- UINTN Index;
- UINT32 RawData;
-
- RawData = Data->Value;
- for (Index = 0; Index < (UINTN) Data->Exponent; Index++) {
- RawData <<= 1;
- }
-
- return RawData;
-}
-
+#include <Register/Cpuid.h>
MISC_SMBIOS_TABLE_FUNCTION(MiscProcessorCache)
{
EFI_SMBIOS_HANDLE SmbiosHandle;
- SMBIOS_TABLE_TYPE7 *SmbiosRecordL1;
- SMBIOS_TABLE_TYPE7 *SmbiosRecordL2;
+ SMBIOS_TABLE_TYPE7 *SmbiosRecord;
EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
CHAR16 *SocketDesignation;
CHAR8 *OptionalStrStart;
UINTN SocketStrLen;
STRING_REF TokenToGet;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- UINT64 MonotonicCount;
- EFI_DATA_RECORD_HEADER *Record;
- EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
- UINT8 *SrcData;
- EFI_STATUS Status;
+ UINT32 SubIndex;
+ CPUID_CACHE_PARAMS_EAX CacheParamsEax;
+ CPUID_CACHE_PARAMS_EBX CacheParamsEbx;
+ UINT32 RegisterEcx;
+ CPUID_CACHE_PARAMS_EDX CacheParamsEdx;
+ UINT8 SystemCacheType;
+ UINTN Size;
//
- // Memory Device LOcator
+ // Memory Device Locator
//
- DEBUG ((EFI_D_ERROR, "type 7\n"));
-
TokenToGet = STRING_TOKEN (STR_SOCKET_DESIGNATION);
SocketDesignation = SmbiosMiscGetString (TokenToGet);
SocketStrLen = StrLen(SocketDesignation);
if (SocketStrLen > SMBIOS_STRING_MAX_LENGTH) {
- return EFI_UNSUPPORTED;
+ return EFI_UNSUPPORTED;
}
- SmbiosRecordL1 = AllocatePool(sizeof (SMBIOS_TABLE_TYPE7) + 7 + 1 + 1);
- ASSERT (SmbiosRecordL1 != NULL);
- ZeroMem(SmbiosRecordL1, sizeof (SMBIOS_TABLE_TYPE7) + 7 + 1 + 1);
-
- SmbiosRecordL2 = AllocatePool(sizeof (SMBIOS_TABLE_TYPE7) + 7 + 1 + 1);
- ASSERT (SmbiosRecordL2 != NULL);
- ZeroMem(SmbiosRecordL2, sizeof (SMBIOS_TABLE_TYPE7) + 7 + 1 + 1);
-
- //
- // Get the Data Hub Protocol. Assume only one instance
- //
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (VOID **)&DataHub
- );
- ASSERT_EFI_ERROR(Status);
-
- MonotonicCount = 0;
- Record = NULL;
-
- do {
- Status = DataHub->GetNextRecord (
- DataHub,
- &MonotonicCount,
- NULL,
- &Record
- );
- if (!EFI_ERROR(Status)) {
- if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
- DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
- SrcData = (UINT8 *)(DataHeader + 1);
- if (CompareGuid(&Record->DataRecordGuid, &gEfiCacheSubClassGuid) && (DataHeader->RecordType == CacheSizeRecordType)) {
- if (DataHeader->SubInstance == EFI_CACHE_L1) {
- SmbiosRecordL1->InstalledSize += (UINT16) (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA *)SrcData) >> 10);
- SmbiosRecordL1->MaximumCacheSize = SmbiosRecordL1->InstalledSize;
- }
- else if (DataHeader->SubInstance == EFI_CACHE_L2) {
- SmbiosRecordL2->InstalledSize += (UINT16) (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA *)SrcData) >> 10);
- SmbiosRecordL2->MaximumCacheSize = SmbiosRecordL2->InstalledSize;
- } else {
- continue;
- }
- }
- }
- }
- } while (!EFI_ERROR(Status) && (MonotonicCount != 0));
-
- //
- //Filling SMBIOS type 7 information for different cache levels.
- //
-
- SmbiosRecordL1->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
- SmbiosRecordL1->Hdr.Length = (UINT8) sizeof (SMBIOS_TABLE_TYPE7);
- SmbiosRecordL1->Hdr.Handle = 0;
-
- SmbiosRecordL1->Associativity = CacheAssociativity8Way;
- SmbiosRecordL1->SystemCacheType = CacheTypeUnknown;
- SmbiosRecordL1->SocketDesignation = 0x01;
- SmbiosRecordL1->CacheSpeed = 0;
- SmbiosRecordL1->CacheConfiguration = 0x0180;
- ZeroMem (&CacheSramType, sizeof (EFI_CACHE_SRAM_TYPE_DATA));
- CacheSramType.Synchronous = 1;
- CopyMem(&SmbiosRecordL1->SupportedSRAMType, &CacheSramType, 2);
- CopyMem(&SmbiosRecordL1->CurrentSRAMType, &CacheSramType, 2);
- SmbiosRecordL1->ErrorCorrectionType = EfiCacheErrorSingleBit;
-
-
- SmbiosRecordL2->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
- SmbiosRecordL2->Hdr.Length = (UINT8) sizeof (SMBIOS_TABLE_TYPE7);
- SmbiosRecordL2->Hdr.Handle = 0;
-
- SmbiosRecordL2->Associativity = CacheAssociativity16Way;
- SmbiosRecordL2->SystemCacheType = CacheTypeInstruction;
- SmbiosRecordL2->SocketDesignation = 0x01;
- SmbiosRecordL2->CacheSpeed = 0;
- SmbiosRecordL2->CacheConfiguration = 0x0281;
- ZeroMem (&CacheSramType, sizeof (EFI_CACHE_SRAM_TYPE_DATA));
- CacheSramType.Synchronous = 1;
- CopyMem(&SmbiosRecordL2->SupportedSRAMType, &CacheSramType, 2);
- CopyMem(&SmbiosRecordL2->CurrentSRAMType, &CacheSramType, 2);
- SmbiosRecordL2->ErrorCorrectionType = EfiCacheErrorSingleBit;
-
-
-
- //
- //Adding SMBIOS type 7 records to SMBIOS table.
- //
- SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
- OptionalStrStart = (CHAR8 *)(SmbiosRecordL1 + 1);
- UnicodeStrToAsciiStr(SocketDesignation, OptionalStrStart);
-
- Smbios-> Add(
- Smbios,
- NULL,
- &SmbiosHandle,
- (EFI_SMBIOS_TABLE_HEADER *) SmbiosRecordL1
- );
-
- //
- //VLV2 incorporates two SLM modules (quad cores) in the SoC. 2 cores share BIU/L2 cache
- //
- SmbiosRecordL2->InstalledSize = (SmbiosRecordL2->InstalledSize)/2;
- SmbiosRecordL2->MaximumCacheSize = SmbiosRecordL2->InstalledSize;
- SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
-
- OptionalStrStart = (CHAR8 *)(SmbiosRecordL2 + 1);
- UnicodeStrToAsciiStr(SocketDesignation, OptionalStrStart);
-
- Smbios-> Add(
- Smbios,
- NULL,
- &SmbiosHandle,
- (EFI_SMBIOS_TABLE_HEADER *) SmbiosRecordL2
- );
-
+ //
+ // Retrieve cache level information using CPUID
+ //
+ for (SubIndex = 0; ; SubIndex++) {
+ AsmCpuidEx (
+ CPUID_CACHE_PARAMS,
+ SubIndex,
+ &CacheParamsEax.Uint32,
+ &CacheParamsEbx.Uint32,
+ &RegisterEcx,
+ &CacheParamsEdx.Uint32
+ );
+ //
+ // Terminate loop when CacheType is CPUID_CACHE_PARAMS_CACHE_TYPE_NULL
+ //
+ if (CacheParamsEax.Bits.CacheType == CPUID_CACHE_PARAMS_CACHE_TYPE_NULL) {
+ break;
+ }
+
+ //
+ // Allocate and zero SMBIOS TYPE 7 Record
+ //
+ SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE7) + 7 + 1 + 1);
+ ASSERT (SmbiosRecord != NULL);
+
+ //
+ // Compute cache size in bytes
+ //
+ Size = (CacheParamsEbx.Bits.Ways + 1) *
+ (CacheParamsEbx.Bits.LinePartitions + 1) *
+ (CacheParamsEbx.Bits.LineSize + 1) *
+ (RegisterEcx + 1);
+ DEBUG ((DEBUG_INFO, "MiscProcessorCache(): Cache Type = %d Cache Level = %d Size = %x\n", CacheParamsEax.Bits.CacheType, CacheParamsEax.Bits.CacheLevel, Size));
+
+ //
+ // Determine SMBIOS SystemCacheType
+ //
+ switch (CacheParamsEax.Bits.CacheType) {
+ case 1:
+ SystemCacheType = CacheTypeData;
+ break;
+ case 2:
+ SystemCacheType = CacheTypeInstruction;
+ break;
+ case 3:
+ SystemCacheType = CacheTypeUnified;
+ break;
+ default:
+ SystemCacheType = CacheTypeUnknown;
+ }
+
+ //
+ // Update cache sizes in KB
+ //
+ switch (CacheParamsEax.Bits.CacheLevel) {
+ case 1:
+ SmbiosRecord->InstalledSize = (UINT16)(Size >> 10);
+ SmbiosRecord->MaximumCacheSize = SmbiosRecord->InstalledSize;
+ SmbiosRecord->SystemCacheType = SystemCacheType;
+ SmbiosRecord->Associativity = CacheAssociativity8Way;
+ SmbiosRecord->CacheConfiguration = 0x0180;
+ break;
+ case 2:
+ SmbiosRecord->InstalledSize = (UINT16)(Size >> 10);
+ SmbiosRecord->MaximumCacheSize = SmbiosRecord->InstalledSize;
+ SmbiosRecord->SystemCacheType = SystemCacheType;
+ SmbiosRecord->Associativity = CacheAssociativity16Way;
+ SmbiosRecord->CacheConfiguration = 0x0281;
+ //
+ //VLV2 incorporates two SLM modules (quad cores) in the SoC.
+ // 2 cores share BIU/L2 cache
+ //
+ SmbiosRecord->InstalledSize = SmbiosRecord->InstalledSize / 2;
+ SmbiosRecord->MaximumCacheSize = SmbiosRecord->InstalledSize;
+ break;
+ default:
+ DEBUG ((DEBUG_ERROR, "MiscProcessorCache(): Unexpected cache level %d\n", CacheParamsEax.Bits.CacheLevel));
+ break;
+ }
+
+ //
+ //Filling SMBIOS type 7 information for different cache levels.
+ //
+ SmbiosRecord->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
+ SmbiosRecord->Hdr.Length = (UINT8) sizeof (SMBIOS_TABLE_TYPE7);
+ SmbiosRecord->Hdr.Handle = 0;
+
+ SmbiosRecord->SocketDesignation = 0x01;
+ SmbiosRecord->CacheSpeed = 0;
+ ZeroMem (&CacheSramType, sizeof (EFI_CACHE_SRAM_TYPE_DATA));
+ CacheSramType.Synchronous = 1;
+ CopyMem(&SmbiosRecord->SupportedSRAMType, &CacheSramType, 2);
+ CopyMem(&SmbiosRecord->CurrentSRAMType, &CacheSramType, 2);
+ SmbiosRecord->ErrorCorrectionType = EfiCacheErrorSingleBit;
+
+ //
+ // Adding SMBIOS type 7 records to SMBIOS table.
+ //
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ UnicodeStrToAsciiStr(SocketDesignation, OptionalStrStart);
+
+ Smbios->Add(
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *) SmbiosRecord
+ );
+ }
return EFI_SUCCESS;
}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
index e01693ede7..e71a03ceac 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
@@ -1,12 +1,9 @@
/*++
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscProcessorInformationFunction.c
@@ -23,9 +20,9 @@ Abstract:
#include "MiscSubclassDriver.h"
#include <Protocol/MpService.h>
-#include <Protocol/DataHub.h>
-#include <Guid/DataHubRecords.h>
#include <Library/CpuIA32.h>
+#include <Library/TimerLib.h>
+#include <Register/Cpuid.h>
#define EfiProcessorFamilyIntelAtomProcessor 0x2B
@@ -75,33 +72,6 @@ GetCacheHandle (
*Handle = 0xFFFF;
}
-
-/**
- This function makes boot time changes to the contents of the
- MiscProcessorInformation (Type 4).
-
- @param RecordData Pointer to copy of RecordData from the Data Table.
-
- @retval EFI_SUCCESS All parameters were valid.
- @retval EFI_UNSUPPORTED Unexpected RecordType value.
- @retval EFI_INVALID_PARAMETER Invalid parameter was found.
-
-**/
-UINT32
-ConvertBase10ToRaw (
- IN EFI_EXP_BASE10_DATA *Data)
-{
- UINTN Index;
- UINT32 RawData;
-
- RawData = Data->Value;
- for (Index = 0; Index < (UINTN) Data->Exponent; Index++) {
- RawData *= 10;
- }
-
- return RawData;
-}
-
#define BSEL_CR_OVERCLOCK_CONTROL 0xCD
#define FUSE_BSEL_MASK 0x03
@@ -137,6 +107,96 @@ DetermineiFsbFromMsr (
}
+CHAR16 *
+CpuidSocVendorBrandString (
+ VOID
+ )
+{
+ UINT32 MaximumExtendedFunction;
+ //
+ // Array to store brand string from 3 brand string leafs with
+ // 4 32-bit brand string values per leaf and an extra value to
+ // null terminate the string.
+ //
+ UINT32 BrandString[3 * 4 + 1];
+ CHAR8 *AsciiBrandString;
+ CHAR16 *UnicodeBrandString;
+ UINTN Length;
+
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaximumExtendedFunction, NULL, NULL, NULL);
+
+ ZeroMem (&BrandString, sizeof (BrandString));
+ if (CPUID_BRAND_STRING1 <= MaximumExtendedFunction) {
+ AsmCpuid (
+ CPUID_BRAND_STRING1,
+ &BrandString[0],
+ &BrandString[1],
+ &BrandString[2],
+ &BrandString[3]
+ );
+ }
+ if (CPUID_BRAND_STRING2 <= MaximumExtendedFunction) {
+ AsmCpuid (
+ CPUID_BRAND_STRING2,
+ &BrandString[4],
+ &BrandString[5],
+ &BrandString[6],
+ &BrandString[7]
+ );
+ }
+ if (CPUID_BRAND_STRING3 <= MaximumExtendedFunction) {
+ AsmCpuid (
+ CPUID_BRAND_STRING3,
+ &BrandString[8],
+ &BrandString[9],
+ &BrandString[10],
+ &BrandString[11]
+ );
+ }
+
+ //
+ // Skip spaces at the beginning of the brand string
+ //
+ for (AsciiBrandString = (CHAR8 *)BrandString; *AsciiBrandString == ' '; AsciiBrandString++);
+
+ DEBUG ((DEBUG_INFO, "Processor Brand String = %a\n", AsciiBrandString));
+
+ //
+ // Convert ASCII brand string to an allocated Unicode brand string
+ //
+ Length = AsciiStrLen (AsciiBrandString) + 1;
+ UnicodeBrandString = AllocatePool (Length * sizeof (CHAR16));
+ AsciiStrToUnicodeStrS (AsciiBrandString, UnicodeBrandString, Length);
+
+ DEBUG ((DEBUG_INFO, "Processor Unicode Brand String = %s\n", UnicodeBrandString));
+
+ return UnicodeBrandString;
+}
+
+UINT64
+MeasureTscFrequency (
+ VOID
+ )
+{
+ EFI_TPL CurrentTpl;
+ UINT64 BeginValue;
+ UINT64 EndValue;
+ UINT64 Frequency;
+
+ //
+ // Wait for 10000us = 10ms for the calculation
+ // It needs a precise timer to calculate the ticks
+ //
+ CurrentTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ BeginValue = AsmReadTsc ();
+ MicroSecondDelay (10000);
+ EndValue = AsmReadTsc ();
+ gBS->RestoreTPL (CurrentTpl);
+ Frequency = MultU64x32 (EndValue - BeginValue, 1000);
+ Frequency = DivU64x32 (Frequency, 10);
+ return Frequency;
+}
+
MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
{
CHAR8 *OptionalStrStart;
@@ -152,7 +212,7 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
UINTN SocketStrLen=0;
UINTN AssetTagStrLen=0;
UINTN PartNumberStrLen=0;
- UINTN ProcessorVoltage=0xAE;
+ UINTN ProcessorVoltage=(BIT7 | 9);
UINT32 Eax01;
UINT32 Ebx01;
UINT32 Ecx01;
@@ -169,17 +229,8 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
UINTN NumberOfProcessors=0;
UINT64 Frequency = 0;
EFI_MP_SERVICES_PROTOCOL *MpService;
- EFI_DATA_HUB_PROTOCOL *DataHub;
- UINT64 MonotonicCount;
- EFI_DATA_RECORD_HEADER *Record;
- EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
- UINT8 *SrcData;
- EFI_PROCESSOR_VERSION_DATA *ProcessorVersion;
- CHAR16 *NewStringToken;
- STRING_REF TokenToUpdate;
PROCESSOR_ID_DATA *ProcessorId = NULL;
-
//
// First check for invalid parameters.
//
@@ -194,59 +245,6 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
return EFI_INVALID_PARAMETER;
}
- //
- // Get the Data Hub Protocol. Assume only one instance
- //
- Status = gBS->LocateProtocol (
- &gEfiDataHubProtocolGuid,
- NULL,
- (VOID **)&DataHub
- );
- ASSERT_EFI_ERROR(Status);
-
- MonotonicCount = 0;
- Record = NULL;
-
- do {
- Status = DataHub->GetNextRecord (
- DataHub,
- &MonotonicCount,
- NULL,
- &Record
- );
- if (!EFI_ERROR(Status)) {
- if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
-
- DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
- SrcData = (UINT8 *)(DataHeader + 1);
-
- //
- // Processor
- //
- if (CompareGuid(&Record->DataRecordGuid, &gEfiProcessorSubClassGuid)) {
- CopyMem (&mProcessorProducerGuid, &Record->ProducerName, sizeof(EFI_GUID));
- switch (DataHeader->RecordType) {
- case ProcessorVoltageRecordType:
- ProcessorVoltage = (((EFI_EXP_BASE10_DATA *)SrcData)->Value)/100 + 0x80;
- break;
- case ProcessorCoreFrequencyRecordType:
- DEBUG ((EFI_D_ERROR, "ProcessorCoreFrequencyRecordType SrcData1 =%d\n", ConvertBase10ToRaw((EFI_EXP_BASE10_DATA *)SrcData)/1000000));
- Frequency = (ConvertBase10ToRaw((EFI_EXP_BASE10_DATA *)SrcData)/1000000);
- break;
- case ProcessorVersionRecordType:
- ProcessorVersion = (EFI_PROCESSOR_VERSION_DATA *)SrcData;
- NewStringToken = HiiGetPackageString(&mProcessorProducerGuid, *ProcessorVersion, NULL);
- TokenToUpdate = (STRING_REF)STR_MISC_PROCESSOR_VERSION;
- HiiSetString(mHiiHandle, TokenToUpdate, NewStringToken, NULL);
- break;
- default:
- break;
- }
- }
- }
- }
- } while (!EFI_ERROR(Status) && (MonotonicCount != 0));
-
//
// Token to get for Socket Name
//
@@ -270,8 +268,7 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
//
// Token to get for Processor Version
//
- TokenToGet = STRING_TOKEN (STR_MISC_PROCESSOR_VERSION);
- Version = SmbiosMiscGetString (TokenToGet);
+ Version = CpuidSocVendorBrandString ();
VersionStrLen = StrLen(Version);
if (VersionStrLen > SMBIOS_STRING_MAX_LENGTH) {
return EFI_UNSUPPORTED;
@@ -372,10 +369,12 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
SmbiosRecord -> ProcessorFamily2 = ForType4InputData-> VariableRecord.ProcessorFamily;
//
- // Processor speed
+ // Processor speed in MHz
//
- SmbiosRecord-> CurrentSpeed = *(UINT16*) & Frequency;
- SmbiosRecord-> MaxSpeed = *(UINT16*) & Frequency;
+ Frequency = MeasureTscFrequency ();
+ Frequency = DivU64x32 (Frequency, 1000000);
+ SmbiosRecord-> CurrentSpeed = (UINT16)Frequency;
+ SmbiosRecord-> MaxSpeed = (UINT16)Frequency;
//
// Processor Characteristics
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverDataTable.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverDataTable.c
index 93347a1a04..4c8e00801f 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverDataTable.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverDataTable.c
@@ -1,21 +1,17 @@
/** @file
-Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscSubclassDriverDataTable.c
Abstract:
- Create the mMiscSubclassDataTable structure, and it is used to report
- any generate data to the DataHub.
-
+ Create the mMiscSubclassDataTable structure used to produce
+ SMBIOS records.
**/
@@ -31,7 +27,7 @@ MISC_SMBIOS_TABLE_EXTERNS(EFI_MISC_BIOS_VENDOR_DATA, MiscBiosVendor, MiscBiosVen
MISC_SMBIOS_TABLE_EXTERNS(EFI_MISC_SYSTEM_MANUFACTURER_DATA, MiscSystemManufacturer, MiscSystemManufacturer);
MISC_SMBIOS_TABLE_EXTERNS(EFI_MISC_BASE_BOARD_MANUFACTURER_DATA, MiscBaseBoardManufacturer, MiscBaseBoardManufacturer);
MISC_SMBIOS_TABLE_EXTERNS(EFI_MISC_CHASSIS_MANUFACTURER_DATA, MiscChassisManufacturer, MiscChassisManufacturer);
-MISC_SMBIOS_TABLE_EXTERNS(EFI_CACHE_VARIABLE_RECORD, MiscProcessorCache, MiscProcessorCache); //type 7
+MISC_SMBIOS_TABLE_EXTERNS(UINTN, MiscProcessorCache, MiscProcessorCache); //type 7
MISC_SMBIOS_TABLE_EXTERNS(EFI_CPU_DATA_RECORD, MiscProcessorInformation, MiscProcessorInformation); //type 4
MISC_SMBIOS_TABLE_EXTERNS(EFI_MEMORY_ARRAY_LOCATION_DATA, MiscPhysicalMemoryArray,MiscPhysicalMemoryArray);
MISC_SMBIOS_TABLE_EXTERNS(EFI_MEMORY_ARRAY_LINK_DATA, MiscMemoryDevice, MiscMemoryDevice);
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverEntryPoint.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverEntryPoint.c
index e70732f5c2..cb677a0aa6 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverEntryPoint.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscSubclassDriverEntryPoint.c
@@ -1,20 +1,17 @@
/** @file
-Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
+Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
Module Name:
MiscSubclassDriverEntryPoint.c
Abstract:
- This driver parses the mMiscSubclassDataTable structure and reports
- any generated data to the DataHub.
+ This driver parses the mMiscSubclassDataTable structure to
+ produce SMBIOS records.
**/
@@ -99,7 +96,7 @@ Error:
/**
Standard EFI driver point. This driver parses the mMiscSubclassDataTable
- structure and reports any generated data to the DataHub.
+ structure to produce SMBIOS records.
@param ImageHandle - Handle for the image of this driver
@param SystemTable - Pointer to the EFI System Table
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
index 99b1a18185..92b51b1743 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
@@ -86,6 +86,7 @@ [Packages]
MdePkg/MdePkg.dec
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
NetworkPkg/NetworkPkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
HiiLib
@@ -105,6 +106,7 @@ [LibraryClasses]
PchPlatformLib
NetLib
HobLib
+ TimerLib
[Guids]
gEfiNormalSetupGuid
@@ -114,7 +116,6 @@ [Guids]
[Protocols]
gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEfiDxeSmmReadyToLockProtocolGuid # PROTOCOL ALWAYS_CONSUMED
- gEfiDataHubProtocolGuid
gEfiMpServiceProtocolGuid
gMemInfoProtocolGuid
gEfiTdtOperationProtocolGuid
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c
index 99db5490b6..dad27f130d 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c
@@ -35,8 +35,6 @@ Abstract:
#include <PiDxe.h>
#include <PchRegs.h>
-#include <Guid/DataHubRecords.h>
-
#include <Protocol/IgdOpRegion.h>
#include <Protocol/FirmwareVolume2.h>
#include <Protocol/PlatformGopPolicy.h>
@@ -66,7 +64,6 @@ extern DXE_VLV_PLATFORM_POLICY_PROTOCOL *DxePlatformSaPolicy;
//
IGD_OPREGION_PROTOCOL mIgdOpRegion;
-EFI_GUID mMiscSubClass = EFI_MISC_SUBCLASS_GUID;
EFI_EVENT mConOutEvent;
EFI_EVENT mSetGOPverEvent;
VOID *mConOutReg;
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
index fe81a6e3bd..2aec0d1a9a 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
@@ -3,9 +3,8 @@
#/*++
#
# Copyright (c) 1999 - 2019, Intel Corporation. All rights reserved
-#
-
-# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
# Module Name:
#
@@ -65,7 +64,6 @@ [Depex]
gDxeVlvPlatformPolicyGuid AND
gEfiPciRootBridgeIoProtocolGuid AND
gEfiCpuIo2ProtocolGuid AND
- gEfiDataHubProtocolGuid AND
gEfiGlobalNvsAreaProtocolGuid AND
gEfiFirmwareVolume2ProtocolGuid AND
gEfiHiiDatabaseProtocolGuid
--
2.21.0.windows.1
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