[edk2-devel] [PATCH] ShellPkg/Pci.c: Update supported link speed to PCI4.0

[Gao, Zhichao]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1955

Refer PCI express base specification Reversion 4.0, Version
1.0, Table 7-32, Supported Link Speeds Vector bit 3 indicate
the speed 16 GT/s. Add it to shell command 'pci ...'.

Change the MaxLinkSpeed other values' result from 'Unknown'
to 'Reserved'.

Cc: Jaben Carsey <jaben.carsey at intel.com>
Cc: Ray Ni <ray.ni at intel.com>
Cc: Oleksiy <oleksiyy at ami.com>
Signed-off-by: Zhichao Gao <zhichao.gao at intel.com>
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index ba9caa7743..b58ce3c2f0 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -1,7 +1,7 @@
 /** @file
   Main file for Pci shell Debug1 function.
 
-  Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
   (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -4515,8 +4515,11 @@ ExplainPcieLinkCap (
     case 3:
       MaxLinkSpeed = L"8.0 GT/s";
       break;
+    case 4:
+      MaxLinkSpeed = L"16.0 GT/s";
+      break;
     default:
-      MaxLinkSpeed = L"Unknown";
+      MaxLinkSpeed = L"Reserved";
       break;
   }
   ShellPrintEx (-1, -1,
@@ -4672,6 +4675,9 @@ ExplainPcieLinkStatus (
     case 3:
       CurLinkSpeed = L"8.0 GT/s";
       break;
+    case 4:
+      CurLinkSpeed = L"16.0 GT/s";
+      break;
     default:
       CurLinkSpeed = L"Reserved";
       break;
-- 
2.21.0.windows.1


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