[edk2-devel] [PATCH edk2-platforms v2] Silicon/SynQuacer: add ACPI description of GPIO controller and power button
Leif Lindholm
leif.lindholm at linaro.org
Fri May 3 11:28:11 UTC 2019
On Thu, May 02, 2019 at 11:48:26AM +0200, Ard Biesheuvel wrote:
> Add ACPI descriptions of the GPIO and external interrupt (EXIU)
> controllers as well as the power button. Note that on rev 0.3
> boards, the power button appears to reset the system (this was
> not the case on rev 0.1 boards), so it is included for reference
> primarily. The same GPIO event mechanism will be used in the future
> for reporting hardware errors to the OS.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel at linaro.org>
Acked-by: Leif Lindholm <leif.lindholm at linaro.org>
> ---
> v2: split EXIU interrupt controller and GPIO controller into separate devices,
> and mirror the incoming GPIO interrupt with a interrupt resource pointing
> to the EXIU - this is a more accurate depiction of the situation, given
> that not all EXIU interrupt lines are connected to GPIO lines
>
> Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 56 ++++++++++++++++++++
> Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++
> 2 files changed, 60 insertions(+)
>
> diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
> index aab4fbf0e6b4..44cdf6568991 100644
> --- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
> +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
> @@ -201,5 +201,61 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
> }
> })
> }
> +
> + Device (EXIU) {
> + Name (_HID, "SCX0008")
> + Name (_UID, Zero)
> + Name (_CRS, ResourceTemplate () {
> + Memory32Fixed (ReadWrite, SYNQUACER_EXIU_BASE, SYNQUACER_EXIU_SIZE)
> + })
> + Name (_DSD, Package () {
> + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "socionext,spi-base", 112 },
> + }
> + })
> + }
> +
> + Device (GPIO) {
> + Name (_HID, "SCX0007")
> + Name (_UID, Zero)
> + Name (_CRS, ResourceTemplate () {
> + Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE)
> + Interrupt (ResourceConsumer, Edge, ActiveLow, ExclusiveAndWake, 0, "\\_SB.EXIU") {
> + 8,
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () {
> + "gpio-line-names",
> + Package () {
> + "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4",
> + "DSW3-PIN5", "DSW3-PIN6", "DSW3-PIN7", "DSW3-PIN8",
> + "PSIN#", "PWROFF#", "GPIO-A", "GPIO-B",
> + "GPIO-C", "GPIO-D", "PCIE1EXTINT", "PCIE0EXTINT",
> + "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F",
> + "GPIO-G", "GPIO-H", "GPIO-I", "GPIO-J",
> + "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27",
> + "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31"
> + },
> + }
> + }
> + })
> + Name (_AEI, ResourceTemplate () {
> + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0, "\\_SB.GPIO")
> + {
> + 8
> + }
> + })
> + Method (_E08) {
> + Notify (\_SB.PWRB, 0x80)
> + }
> + }
> +
> + Device (PWRB) {
> + Name (_HID, "PNP0C0C")
> + }
> } // Scope (_SB)
> }
> diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> index b0fcc306c1ae..cff981c4f8ae 100644
> --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> @@ -42,6 +42,10 @@
> #define SYNQUACER_GPIO_BASE 0x51000000
> #define SYNQUACER_GPIO_SIZE SIZE_4KB
>
> +// EXIU interrupt controller
> +#define SYNQUACER_EXIU_BASE 0x510c0000
> +#define SYNQUACER_EXIU_SIZE 0x20
> +
> // I2C0 block
> #define SYNQUACER_I2C0_BASE 0x51200000
> #define SYNQUACER_I2C0_SIZE SIZE_4KB
> --
> 2.20.1
>
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