[edk2-devel] [PATCH 1/4] OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly
Laszlo Ersek
lersek at redhat.com
Mon May 6 12:04:38 UTC 2019
On 05/06/19 13:06, Philippe Mathieu-Daudé wrote:
> On 5/4/19 2:07 AM, Laszlo Ersek wrote:
>> In the MemMapInitialization() function, we currently have a common
>> PciSize assignment, shared between i440fx and q35. In order to simplify
>> the rest of this series, lift and duplicate the assignment identically to
>> both board-specific branches.
>>
>> Cc: Ard Biesheuvel <ard.biesheuvel at linaro.org>
>> Cc: Gerd Hoffmann <kraxel at redhat.com>
>> Cc: Jordan Justen <jordan.l.justen at intel.com>
>> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1666941
>> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1701710
>> Contributed-under: TianoCore Contribution Agreement 1.1
>
> I guess you can now drop the 'Contributed-under' tag from your git
> config. It has been removed from the wiki:
> https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format/_compare/03d738e...ee27b0b
Ah, good point; I missed this because the first three patches in the
series originate from Jan 2019. (I didn't post them back then because
they don't solve the whole problem without patch #4.) And in January my
edk2 commit message template file still included the Contributed-under line.
I'll drop the line when I push the patches, or (if a v2 is needed) when
I post v2.
Thanks!
Laszlo
>
>> Signed-off-by: Laszlo Ersek <lersek at redhat.com>
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd at redhat.com>
>
>> ---
>> OvmfPkg/PlatformPei/Platform.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
>> index 0876316eefbc..5e0a15484230 100644
>> --- a/OvmfPkg/PlatformPei/Platform.c
>> +++ b/OvmfPkg/PlatformPei/Platform.c
>> @@ -190,8 +190,10 @@ MemMapInitialization (
>> ASSERT (TopOfLowRam <= PciExBarBase);
>> ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
>> PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
>> + PciSize = 0xFC000000 - PciBase;
>> } else {
>> PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
>> + PciSize = 0xFC000000 - PciBase;
>> }
>>
>> //
>> @@ -207,7 +209,6 @@ MemMapInitialization (
>> // 0xFED20000 gap 896 KB
>> // 0xFEE00000 LAPIC 1 MB
>> //
>> - PciSize = 0xFC000000 - PciBase;
>> AddIoMemoryBaseSizeHob (PciBase, PciSize);
>> PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
>> ASSERT_RETURN_ERROR (PcdStatus);
>>
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