[edk2-devel] [edk2-platforms: PATCH v3 04/14] Marvell/Armada7k8k: Extend board description libraries with PCIE

[Marcin Wojtas]

This patch extends ArmadaBoardDescLib libraries for all
existing Armada7k8k-based platforms with PCIE.
It introduces ArmadaBoardPcieControllerGet routine with
per-board PCIE controllers description.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw at semihalf.com>
---
 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c           | 48 +++++++++++++++++
 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c           | 48 +++++++++++++++++
 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 54 ++++++++++++++++++++
 3 files changed, 150 insertions(+)

diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
index dbd434f..ae13e0a 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
@@ -40,6 +40,54 @@ ArmadaBoardGpioExpanderGet (
 }
 
 //
+// PCIE
+//
+STATIC
+MV_PCIE_CONTROLLER mPcieController[] = {
+  { /* PCIE2 @0xF2640000 */
+    .PcieDbiAddress        = 0xF2640000,
+    .ConfigSpaceAddress    = 0xE0000000,
+    .HaveResetGpio         = FALSE,
+    .PcieResetGpio         = { 0 },
+    .PcieBusMin            = 0,
+    .PcieBusMax            = 0xFE,
+    .PcieIoTranslation     = 0xEFF00000,
+    .PcieIoWinBase         = 0x0,
+    .PcieIoWinSize         = 0x10000,
+    .PcieMmio32Translation = 0,
+    .PcieMmio32WinBase     = 0xC0000000,
+    .PcieMmio32WinSize     = 0x20000000,
+    .PcieMmio64Translation = 0,
+    .PcieMmio64WinBase     = 0x800000000,
+    .PcieMmio64WinSize     = 0x100000000,
+  }
+};
+
+/**
+  Return the number and description of PCIE controllers used on the platform.
+
+  @param[in out] **PcieControllers      Array containing PCIE controllers'
+                                        description.
+  @param[in out]  *PcieControllerCount  Amount of used PCIE controllers.
+
+  @retval EFI_SUCCESS                   The data were obtained successfully.
+  @retval other                         Return error status.
+
+**/
+EFI_STATUS
+EFIAPI
+ArmadaBoardPcieControllerGet (
+  IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
+  IN OUT UINTN                     *PcieControllerCount
+  )
+{
+  *PcieControllers = mPcieController;
+  *PcieControllerCount = ARRAY_SIZE (mPcieController);
+
+  return EFI_SUCCESS;
+}
+
+//
 // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
 //
 STATIC
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
index f083c94..144009c 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
@@ -46,6 +46,54 @@ ArmadaBoardGpioExpanderGet (
 }
 
 //
+// PCIE
+//
+STATIC
+MV_PCIE_CONTROLLER mPcieController[] = {
+  { /* PCIE0 @0xF2600000 */
+    .PcieDbiAddress        = 0xF2600000,
+    .ConfigSpaceAddress    = 0xE0000000,
+    .HaveResetGpio         = FALSE,
+    .PcieResetGpio         = { 0 },
+    .PcieBusMin            = 0,
+    .PcieBusMax            = 0xFE,
+    .PcieIoTranslation     = 0xEFF00000,
+    .PcieIoWinBase         = 0x0,
+    .PcieIoWinSize         = 0x10000,
+    .PcieMmio32Translation = 0,
+    .PcieMmio32WinBase     = 0xC0000000,
+    .PcieMmio32WinSize     = 0x20000000,
+    .PcieMmio64Translation = 0,
+    .PcieMmio64WinBase     = 0x800000000,
+    .PcieMmio64WinSize     = 0x100000000,
+  }
+};
+
+/**
+  Return the number and description of PCIE controllers used on the platform.
+
+  @param[in out] **PcieControllers      Array containing PCIE controllers'
+                                        description.
+  @param[in out]  *PcieControllerCount  Amount of used PCIE controllers.
+
+  @retval EFI_SUCCESS                   The data were obtained successfully.
+  @retval other                         Return error status.
+
+**/
+EFI_STATUS
+EFIAPI
+ArmadaBoardPcieControllerGet (
+  IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
+  IN OUT UINTN                     *PcieControllerCount
+  )
+{
+  *PcieControllers = mPcieController;
+  *PcieControllerCount = ARRAY_SIZE (mPcieController);
+
+  return EFI_SUCCESS;
+}
+
+//
 // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
 //
 STATIC
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
index 3b69074..ebe7386 100644
--- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
@@ -33,6 +33,60 @@ ArmadaBoardGpioExpanderGet (
 }
 
 //
+// PCIE
+//
+STATIC
+MV_PCIE_CONTROLLER mPcieController[] = {
+  { /* PCIE0 @0xF2600000 */
+    .PcieDbiAddress        = 0xF2600000,
+    .ConfigSpaceAddress    = 0xE0000000,
+    .HaveResetGpio         = TRUE,
+    .PcieResetGpio         =
+     {
+       MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
+       MV_GPIO_CP0_CONTROLLER1,
+       20,
+       FALSE
+     },
+    .PcieBusMin            = 0,
+    .PcieBusMax            = 0xFE,
+    .PcieIoTranslation     = 0xEFF00000,
+    .PcieIoWinBase         = 0x0,
+    .PcieIoWinSize         = 0x10000,
+    .PcieMmio32Translation = 0,
+    .PcieMmio32WinBase     = 0xC0000000,
+    .PcieMmio32WinSize     = 0x20000000,
+    .PcieMmio64Translation = 0,
+    .PcieMmio64WinBase     = 0x800000000,
+    .PcieMmio64WinSize     = 0x100000000,
+  }
+};
+
+/**
+  Return the number and description of PCIE controllers used on the platform.
+
+  @param[in out] **PcieControllers      Array containing PCIE controllers'
+                                        description.
+  @param[in out]  *PcieControllerCount  Amount of used PCIE controllers.
+
+  @retval EFI_SUCCESS                   The data were obtained successfully.
+  @retval other                         Return error status.
+
+**/
+EFI_STATUS
+EFIAPI
+ArmadaBoardPcieControllerGet (
+  IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
+  IN OUT UINTN                     *PcieControllerCount
+  )
+{
+  *PcieControllers = mPcieController;
+  *PcieControllerCount = ARRAY_SIZE (mPcieController);
+
+  return EFI_SUCCESS;
+}
+
+//
 // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
 //
 STATIC
-- 
2.7.4


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