[edk2-devel] [edk2-non-osi][PATCH 1/2] AmpereAltraBinPkg: Add PciePhyLib library and header
Vu Nguyen via groups.io
vunguyen=os.amperecomputing.com at groups.io
Tue Dec 1 08:54:08 UTC 2020
Initialization library for PCIe PHY on Ampere Altra.
Cc: Leif Lindholm <leif at nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel at arm.com>
Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
Signed-off-by: Vu Nguyen <vunguyen at os.amperecomputing.com>
---
Silicon/Ampere/License.txt | 25 +++
.../Ampere/AmpereAltraBinPkg/Ac01BinPkg.dec | 16 ++
.../Library/PciePhyLib/PciePhyLib.inf | 23 +++
.../Include/Library/PciePhyLib.h | 165 ++++++++++++++++++
.../Library/PciePhyLib/PciePhyLib.lib | Bin 0 -> 26026 bytes
5 files changed, 229 insertions(+)
create mode 100644 Silicon/Ampere/License.txt
create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Ac01BinPkg.dec
create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf
create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h
create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.lib
diff --git a/Silicon/Ampere/License.txt b/Silicon/Ampere/License.txt
new file mode 100644
index 000000000000..2fd43292fa64
--- /dev/null
+++ b/Silicon/Ampere/License.txt
@@ -0,0 +1,25 @@
+Copyright (c) 2020, Ampere Computing LLC. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/Silicon/Ampere/AmpereAltraBinPkg/Ac01BinPkg.dec b/Silicon/Ampere/AmpereAltraBinPkg/Ac01BinPkg.dec
new file mode 100644
index 000000000000..2a8ec5e693ec
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraBinPkg/Ac01BinPkg.dec
@@ -0,0 +1,16 @@
+## @file
+#
+# Copyright (c) 2020, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x0001001B
+ PACKAGE_NAME = Ac01BinPkg
+ PACKAGE_GUID = 04F7CB64-0F97-4D05-86B8-34987F4E1B21
+ PACKAGE_VERSION = 0.1
+
+[Includes]
+ Include
diff --git a/Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf b/Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf
new file mode 100644
index 000000000000..84b1b58ed58c
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf
@@ -0,0 +1,23 @@
+## @file
+#
+# Copyright (c) 2020, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = PciePhyLib
+ FILE_GUID = F2AD0AD0-D4B6-11E3-9C1A-0800200C9A66
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciePhyLib
+
+[Binaries.AArch64]
+ LIB|PciePhyLib.lib|*
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
diff --git a/Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h b/Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h
new file mode 100644
index 000000000000..54680f304677
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h
@@ -0,0 +1,165 @@
+/** @file
+
+ Copyright (c) 2020, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __PCIE_PHY_LIB_H__
+#define __PCIE_PHY_LIB_H__
+
+#define PHY_TX_PARAM_SIZE 2
+#define PHY_RX_PARAM_SIZE 2
+
+#define BUG_67112 1
+#define UPDATE_SRAM 0
+
+#define MULTWRITE_ENABLE 0
+#define MULTI_WR_EN 0
+#define PHY_N_ADDR_OFFSET 0x40000
+#define SNPS_PHY0_BASE_ADDR 0x100000
+#define SNPS_PHY1_BASE_ADDR (SNPS_PHY0_BASE_ADDR + PHY_N_ADDR_OFFSET)
+#define SNPS_PHY2_BASE_ADDR (SNPS_PHY1_BASE_ADDR + PHY_N_ADDR_OFFSET)
+#define SNPS_PHY3_BASE_ADDR (SNPS_PHY2_BASE_ADDR + PHY_N_ADDR_OFFSET)
+
+#define BROADCAST_PMA(Src) ((Src | (0x5 << 12)) * 4)
+#define BROADCAST_RAW_PCS(Src) ((Src | (0x6 << 12)) * 4)
+#define BROADCAST_RAW_PCS_AON(Src) ((Src | (0x7 << 12)) * 4)
+
+#define PHY_CALIB_TO_VALUE 1000
+#define SRAM_INIT_TO_VALUE 1000
+#define MRDY_DELAY 10
+
+#define SRAM_BYPASS_0 0
+#define SRAM_BYPASS_1 1
+#define SRAM_BYPASS_2 2
+#define SRAM_BYPASS_3 3
+
+#define SRAM_BOOTLOAD_BYPASS_0 0x1
+#define SRAM_BOOTLOAD_BYPASS_1 0x2
+#define SRAM_BOOTLOAD_BYPASS_2 0x4
+#define SRAM_BOOTLOAD_BYPASS_3 0x8
+
+#define SRIS_MODE_EN 0
+#define CLK_REF_SEL 0
+#define CLK_SSC_SEL 1
+
+#define CRP_SEL 1
+#define MAX_PHY 3
+
+#define LANE_PER_PHY_NUM_MAX 4
+
+#define HOST_SECURE_ACCESS(Addr) (UINT64)(Addr | 0x40000000000000)
+#define STARTING_SRAM_ADDRESS 0x130000
+
+/*
+ * PCIe PHY error code
+ */
+typedef enum {
+ PHY_SRAM_UPDATE_FAIL = -1,
+ PHY_INIT_PASS = 0,
+ PHY_ROM_ECC_FAIL,
+ PHY_SRAM_ECC_FAIL,
+ PHY_CALIB_FAIL,
+ PHY_CALIB_TIMEOUT,
+ PHY_PLL_FAIL
+} PHY_STATUS;
+
+typedef enum {
+ PHY_DBG_ERROR = 0x0001,
+ PHY_DBG_INFO = 0x0002,
+ PHY_DBG_WARN = 0x0004,
+ PHY_DBG_VERBOSE = 0x0008,
+ GEN1 = 0,
+ GEN2 = 1,
+ GEN3 = 2,
+ GEN4 = 3,
+ CCIX = 4
+} PHY_DBG_FLAGS;
+
+typedef struct {
+ UINT8 IsCalBySram;
+ UINT32 PllSettings;
+ UINT64 TuneTxParam[PHY_RX_PARAM_SIZE];
+ UINT64 TuneRxParam[PHY_TX_PARAM_SIZE];
+} PHY_SETTING;
+
+/**
+ * struct serdes_plat_resource - Serdes Platform Operations
+ * @Puts: Prints string to serial console
+ * @PutInt: Prints 32-bit unsigned integer to serial console
+ * @PutHex: Prints 32-bit unsigned hex to serial console
+ * @PutHex64: Prints 64-bit unsigned hex to serial console
+ * @DebugPrint: Prints formated string to serial console
+ * @MmioRd: Reads 32-bit unsigned integer
+ * @MmioWr: Writes 32-bit unsigned integer
+ */
+typedef struct {
+ VOID (*Puts)(CONST CHAR8 *Msg);
+ VOID (*PutInt)(UINT32 Val);
+ VOID (*PutHex)(UINT32 Val);
+ VOID (*PutHex64)(UINT64 Val);
+ INT32 (*DebugPrint)(CONST CHAR8 *Fmt, ...);
+ VOID (*MmioRd)(UINT64 Addr, UINT32 *Val);
+ VOID (*MmioWr)(UINT64 Addr, UINT32 Val);
+ VOID (*UsDelay)(UINT32 Val);
+} PHY_PLAT_RESOURCE;
+
+typedef struct {
+ UINT64 SdsAddr; /* PHY base address */
+ UINT64 PcieCtrlInfo; /* PCIe controller related information
+ * BIT0-1: SoC revision
+ * 0: Ampere Altra, 1: Ampere Altra Max, 2: Siryn
+ * BIT2 : SocketID (0: Socket0, 1: Socket1)
+ * BIT3 : Reserved
+ * BIT4-6: Root Complex context (RCA0/1/2/3 or RCB0/4/5/6)
+ * BIT7 : Reserved
+ * BIT8-9: PHY Numbers within RCA/RCB [0 to 3 each controls 4 lane]
+ * 0: x16, 1: x8 , 2:x4, 3: 0x2
+ * BIT10-11 : Gen
+ * 0: Gen1, 1: Gen2, 2: Gen3, 3: Gen4 + ESM
+ * BIT13-15 : Setting configuration selection
+ */
+ PHY_SETTING PhySetting; /* PHY input setting */
+ PHY_PLAT_RESOURCE *PhyPlatResource; /* Debug & misc function pointers */
+ PHY_DBG_FLAGS Debug;
+} PHY_CONTEXT;
+
+/*
+ * Input:
+ * Ctx - Serdes context pointer
+ *
+ * Return:
+ * PHY_STATUS - Return status
+ */
+PHY_STATUS
+SerdesSramUpdate (
+ PHY_CONTEXT *Ctx
+ );
+
+/*
+ * Input:
+ * Ctx - Serdes context pointer
+ *
+ * Return:
+ * PHY_STATUS - Return status
+ */
+PHY_STATUS
+SerdesInitClkrst (
+ PHY_CONTEXT *Ctx
+ );
+
+/*
+ * Input:
+ * Ctx - Serdes context pointer
+ *
+ * Return:
+ * PHY_STATUS - Return status
+ */
+PHY_STATUS
+SerdesInitCalib (
+ PHY_CONTEXT *Ctx
+ );
+
+#endif
diff --git a/Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.lib b/Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.lib
new file mode 100644
index 0000000000000000000000000000000000000000..88aaf2cd4adc30bba4bd3b5bb078e1fa0579825d
GIT binary patch
literal 26026
zcmeI5YiwM{b;pNXs(R59Wh;>qInl~?Dn*H?B~8gntkxSV4>wO&k^{F0O0LL_#hNdZ
zbSuFQN;g2 at HV;U(QRG7r8109;X$lBMk$`BDs_6p;nh%bh1o_YpOT`8J!9bf7D8L{p
z`~TfLXL<H=?^3E5g_3xHyLbL)&di)SbLQN0FRk&Oqm{|Q)4#syV6l;U4wnx1965aW
z$l+qKlvMfOV)0N<Uu-b2DTJ^yg!VsOnd_6k8^UjYJ$p at 7AM2m0P7YP4`bWoysv*Ho
zPV_%k9qZ%gUeD=;(^KaR4i2B`Ej7YJ2^^`6RmYM(8e!U7y|%ZpHtjjBb$vTV+WTbX
z_v>BsC0%$<I)>+@!+1_QQk~-lYvdgYQ$thz<G)v(oE(;MqM at cHE2I5`vR40-6GN5h
zeE#s%vC7EssRz%VP>XOPF*C(S(q<{+H^zpikBvM&IW-+65(e!;IGA;xMrT at rdQ)c-
ze_+$(_-OxRb);X)PYsWcb&nt1w29dae)=($)27}VdwNTy_Y at BwI$XN9*i$MU?vo?-
z_Vks~E(bRK!3RG2!S=Q`Ib}+1;TvHQ8CNd*n~UXgQY?o}VPm-b)VKcXav_|rZ4L9a
zt>yX9QJ!!6`9rVP3T^vCN4UMVH_R>^470a~uzlfOVOH+Hy>_rXJNK^g>?O&}6~cbn
zZ42S~ns{onttL6jyF0 at ZfAhZ!Cy`J1>Ss>n+TQZ)10g*A#mfsPLzp>!`Kf<;@nWI>
zhnJuFW?h%L9bxv;9qI?2LV3Qn+w1q?Mg8uR%ntS66}E-GEhiFvc9-Y(gz)*=9payS
z^NBwU&mPxq-CUEdMff{nUw4-0+qbLl=fZil`>OhxFNX(yn2br?PSr`*q))3`Zmhxz
zj#Xce%zW>YZ8wA`W(whCEtWU5#c~ke${pc}iz>?&+Y>ph$4q;a>r$P{Z&lqT*=bJm
zV%}Pi=d--O7Vk|Nx%Rg3d{>6|TjFib at J@>ND;eG=#M at mg{9xI2Yg<8EF0*d!>sD^8
z)TjSB`t;)dGM{E2Ve3DV9WJh$Ic|IGA=&9aq$lg4EqYGZ`8It2;LL1z<LOuNUG0V0
zxzC34uNB(9`eXU?Twz_Z|30a{^4hd_wCHa`^zTCZ{=ZZo?A^J$<qO)s@*AFZi5~4v
zkFxY=?_BJ&;OYj at QR9`17vEY8iVb&%*(;ip#?+kl`#BAwPfqOkxBqF39nv!)AJ4M(
zKCpuJ{+afK25h=US8DH%tTKDAUtxQHPc~X9|NhDf*!w@#$7=F#;_6EJ_meAV?*~`F
z-p{Qvdw=5pW$&1iC})^cE_6xp?8m#q>}#8qLntRm;<IuD%Rj=?<>!*zL-8zpYUhbd
z<VU*|4 at 1}-rr&;|o`aCjsC|ez$lPYddF3tSA9>G at dM=dBU+Cw8av0??N&X^z_O#6?
z=V{x|vn6R~`Haa*rXklM53;)0Pt)8iYlmIxU+q at J4$8OYcInyE#10Fe4c}9aIy<*n
z`KZQR&>E0yVB0;)A&Yw6Bzc<JC-X)x)dliV$x at b$lf3gZIq6nm$<nS?DDJNzFRXFS
zUsNv2gRetZTfD&Sv8-EAKGaYT_VtvdU%fqegRVlnz?7|jFc%n7&J=Fb<*~J)Uio&t
zEizzVUliV`%lZe?Cu6SHRn)akm#-I0c<_<gqRZ;Row`g%<^m}P3 at 3Ck7GzlO3k~h>
zNNN}Bw`VZ+wXwJ}Hbj3A_Vx8|Nw|yk+4fsA_1X5yaTBusu?=%#3<!IAj4yb5f+3T~
zX1*Q_Sv~fHu;IhHun%O|^sxJ`w7Ncj=4bvw74z{pJAW`_<7ej&hOFNE8$9N3{s*?b
zfK9l}cMKy7nf}ZRGCS#$NkUe?BVwy(uRvCh{)}OEd^43It4DudkN%8_u3TW&!)(NS
zd_CCLBhMQ7_Vkaxb0P2R!M^@&!uXuE2iqJ}3~$%v{R0fagOK<2V94sx&-NpH#`pNw
zgw0>k0Sv)|HkKOo2Sdz>el`gE^#()m9 at a#ei}?WkgDn=QcwOQl<FTF)^EX>_2mAV>
zu(u}|8`7RR7j?0I)(04Z$7Oc0dNBTDW0+mL#CugjwoZmy#XsbI`~zc88;kqR9REI}
z`T6(<#%_?^S9AR1*<-$gAAnbL{6kmvM_&A+zE%9gA8F4XFdqfe&SJpZRK8i`-x*DG
zHN-!Q&oXtgUKWeMtcR_Qt(UJas{VS#!((wQ-IDzbZWRxy_wf*XE5*a1Xdm5 at Jqors
zX!q3|56KIN1^6BD5WJe>q3w^ncu0M#c*wqL6%VOji-(Q*BKbOY!L|_PoAv#;pt<?{
zka*_vL-1NWlo3Sc59AgQd-6ul57**h8Xqk`ywT$!ajMn(ala;dmmbvYdHk6R3|Sml
zCyZZMJs5(QyjKc0#6w}rfskt#_W3uMw!|9j3#M%SgCTfOLD=gD_Wgm8rBCws4q={w
z)*l#x2Z1dgMFvcN)bp)}{`~s at m>5Vsu at C)xJ_<JdR2{YmL#96%d3=g*M_Yyc_+Tip
zh3;VNM|&>XTNypU=mHOnJZ;edy>Aot`2iS$N1M&Uem%jEt!Jk&a%Mj;WIV99KiID)
z*!u(6`@`MBW-rD7L-3#t!ruO1(><A|u<xIG+M*u>_WFS#cuDRfY~P<4f4#7+2XdQ)
zZLZXV8Q1KwQP}GTw*F|(e7%2wZNAjgpRWg7J!9O}1k=v!b1nOk{_$6DAFy9Pu%AB|
zGW)V0yuM)H9~fEs#7?VuKk_ZT)qccYem}B@{eEO0`uzxA+mES#m=CePY=2<STWP;(
zx-It`HoBGe8{bM=?KkY at _nYl6?8HT!@%s(z_nTnL=O6Vq^79WH at I1?V{_&hz+i#7}
zBmaC`Zod(qZl>oO&)=)rZ??Z|zwr$B`z?8<%l|CjRP`;r-;$Vg6F=YZANG%rH(;O7
zgMI$z_Z$8K#!l=lE-(ZSx{>x9`m-M((;sZ_cf6;x+HbV+&o}E2K9}W}_I?NU&o}Je
z>itgDH}vxje`)o6V}7^t``y}pOyh at t|7^7%mwWzY_apvAf3_d(d1(7Fn{SfOuI<Oh
z_<y5)Z#hs(-&gJV1cvN;3)sF7Ap<7f6RU{#cM1FFADB9Ph<nJi2ix}_s=?-O<W*qv
zH(+<HH~ql=dlcC32QcGu;s3V at +j#T=_Wf^(?d|&{nE5gW7xMmlBp5<x<_$Lell>Cw
z(TVXph0(?I2Se}}bG<Njw0baP-~8S!?ClTs_FpG#`3QZ0eScufU+9<i-d<qH)*E at 7
z5Az2@@F3Qgvgr$k;F)|@AG1GlJ0)*z!J8e14~9$z?Cl4(wLuQ-#{*+mF1}YE5ccy0
zLpEQqw=dY+_ZR8k%n^U}_5?FOn?Km=55^u`SL@$=@7tpG=HHBQo3QyeHUmTG#6AI2
zHcWd6oo+V&#va$xzp-O0|3;r1$-nWDUuOI!AMyT;I^Ms{pW&nHa`79vPWii!KVS$R
z)GB^cPki<91?=Ms at zuvK@JhvR=IG-$aphY48-Ki-_$~34{%!Ss{yu*5Zx0U09zOno
zp<hP)&iXg at ARfb~Z1@)yzlpc4{M-ClVu?=psE^-ZAHR{inf#k|xRv}He^|-<B#CMA
zXP+NmPyZ(FdH-fTef(yBfg$QFU!iQ+`!{i=m47qe)f~Uk&&O}UYw~Z}UrqeR-mUTz
z`fHV+Tx<Nk+59^jzq9_0J-vThJU9Q&zF(5>toiri`#tu%p8n1IW%$ssWA82Qd*A3p
zb+TGKHa<G><n-{^W5pxg_jZ>K^p<+w(^Kj_bYST0SY>p0 at W9yk)Y+-Y@$u<*rV{kf
zl-PS6;U^2tDho-bv9zX;M8RhKB(gVD at J%3%nhosu at 0S?8k@#<i+BNPMBK!L!Iifwf
z;1A%WqSLWyx61Hejzb&&{>U%$kP#XGA(fH8fRl at i|A at -)Um$4~J)7P_MR)kc$e)S)
z at yLIX;4hj;Z(&Av<o88B7)tHX7GBDji2r7TjL!5=pngpLNYvl>CU5gHzRABB=Vg48
zxA_|1<afq-8Q<h>zQ*TXNS at f9la>p~6S9&2CxY9;PZunI?uylap77%$s@%oHRrGhd
zwrK>z*5$t%Kibpke-Qaaf}P0tuc=HwC4!ddTpa4ZRfc~t{=?FV$k#bFseJqg6vp2c
z`7gwOh-v&{<agbbbYJhk$K>D9$bZoKe`m_CMSs at 0H|c!e-N^rR<o{Q9BmYd~zueQv
z|KrHN(AUWSO5~rruaW<^;@>WRGqQb_9GS%-Q-k52p>WTcpmP7{#K=hfw5;?Hs`M<e
zcp?>`*IEMZ^`I|Q$10~rsyc~lawtp;4p;jpPM_83R+XV3+3KVY;p#s%JUv>Oe0;IG
zer(s;8D~0-ZE*3hww7m{g)c{czC%lki&>ocv&er_hX36h`ImF#U(b<$BS*d%<6Kss
zdm=xp&(R$Da*q5+j{HQ9yxD`J(Ds at 0>%JkzAJfy~ZD-`0p2k0#BVW#ue>6w_Q#tbI
za^#=Sk^fqb{DmC(f6tMx<;dH-vD;o}w=?m%WOlRX&eM@^b~FCha^x at M$iI{$|J at w<
z<RhE(%j(k+pNCm}?u`7bd@)D<qdD>q=g8Z<vD>dYyS<+2$DY4$Wco4wo$&!`dK$kN
z`8F@(AIXtFnj=4vBR`!Z|Aid+b2;+g%#pvCBX9G-Ztrk*3*A#^N2e>Nbf2C~@29P#
z^AaoF)73N6p<4$#Rzmlwsj1LCI6gXB9TRVCe7f5Gp^rauU~0ND__*)$8p=hrm5NI;
zqOy3<&NRVFfqvt3>zH(dP*tvT(!%Q>N$<57$8ZbAvG#UO20jHphF_IZdNhtZ at m}Mk
zcWZB4(hhjp_Ah<FBpUCG<%u)|Ui?f_ud?>#Iwvhyd%L5amA&YO4|=p%&dP#gDzzx2
zlC`(z4|C-2Q8s_GA8BuP?qY>~ALciNf5;4&fy&*Qw}0v3q<M(lq(Hyf_6O4gI*Ufj
zo$1+A>WeL|{7lc6-Js<}ld}FMAWN*Ocgbd}h;5gyPI^YrQa)2__70Nr<3>v6pZ;)G
z4DSMUGLh`zt4S`LcYJKCh;)5}5wV1&j*rIrw955TW5KyaQn5$B at SH^wemVJF`jc(H
zS0c?~Nxi+<H+E%v(RwBp(PuW6l%s&%BdqTw)8mjTtZXveXFPD_tSq>h7h3xt#kRy^
zbT|E%izSc7f#R!N>}9F0d9mbkv3)iqXZ5eYTIuv*4hdc^mh|4oDZ$W{#}dmcm_#|5
zNm+kS+!z*)>D;yTVP4igu5xlV+U2LdT|cL{mYmP4^IUcA>_7-72P7w3>+PI#eZLdW
zK>ho={KEZVHhgC06`e~rpSIPxbGu?Wd-kwobtap}e*bx$Bbv(FnZ5A4bmrY(#53<W
zdpLw%&UZ}uwe#*wPW4O9yHj0T at yoAh#Xf%}{nTZ1`g&$hlfKUEzP*`Fb=kbWn(LMJ
zwO4cR(7KonHP<#>Wu5s~<osgQYdwBa(R$2i9dw}J_T)Tfod^7nKj+-ka8B2Gt+Z^b
zvxK#FwGN#N%vyT;7Blu8xicLfTX*hkZfn})%xUR*?P%Ty>l*vex6$oO^jfm+%lET<
zA8%P!mnD60=A!ez`k9N(d=S|jyF9aH=9N9+g`Z~quo6CZT)h2F{l~Y-={J<h4f=%~
zUrgj;9}Roc`$DO4uKJG)QeW`C==^R#es{$D?r3=88J+dru$Mc(biAhXz!x4!uYK8d
z=G<SMmzkXDcz1cesB?wAt((rJS(|3IX(ngusIfwLUm9;7kPe(5DIIGn&)uJ%ANif1
z+1bPYlEgR8vete|X;tN3*(ZLgVnLJ2Qdh!Q%1?8$>=Vh(r_p!t_+7#GcQxOU(_GDs
z8;d+sx1ndmCUI1J|9vxl1`Z#Ke8ZM&{7&S*Uw5cx9W^{u?W1U3E_luV%YblCI(*nA
zQ>NeGQ^xnBY3=>r?D?a}xA%YJ+r3To4X>a#*!y!S<2RObMKguG_vdHhca(uBc(w1(
z6Pa;syl8HNA at BX!+IN^A#THrp^WLAWeYrkTTCnl$p7;KI;R^MqpJq9)wYR^Ep*Mee
eG5wdzd3Q$pkELqYe@$;=<mJ5feQde+=l=udy?>$r
literal 0
HcmV?d00001
--
2.17.1
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