[edk2-devel] [PATCH EDK2 v1 1/1] ArmPkg/ArmDisassemblerLib: fix incorrect comparison

[Leif Lindholm]

On Tue, Dec 08, 2020 at 21:07:49 +0800, wenyi,xie via groups.io wrote:
> As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3,
> so the comparison between shift and 0x12 will always be false. The right
> shift type of ASR is 0x2.

Whoops[tm].

> Cc: Leif Lindholm <leif at nuviainc.com>
> Cc: Ard Biesheuvel <ard.biesheuvel at arm.com>
> Signed-off-by: Wenyi Xie <xiewenyi2 at huawei.com>

Reviewed-by: Leif Lindholm <leif at nuviainc.com>
Pushed as 8e4cb8fbceb8.

Thanks!

> ---
>  ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
> index b4f0f8dbbfc9..d206cf4ea908 100644
> --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
> +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
> @@ -240,7 +240,7 @@ DisassembleArmInstruction (
>            if (shift_imm == 0) {
>              shift_imm = 32;
>            }
> -        } else if (shift == 0x12) {
> +        } else if (shift == 0x2) {
>            Type = "ASR";
>          } else if (shift_imm == 0) {
>            AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
> @@ -270,7 +270,7 @@ DisassembleArmInstruction (
>            if (shift_imm == 0) {
>              shift_imm = 32;
>            }
> -        } else if (shift == 0x12) {
> +        } else if (shift == 0x2) {
>            Type = "ASR";
>          } else if (shift_imm == 0) {
>            AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
> -- 
> 2.20.1.windows.1
> 
> 
> 
> 
> 
> 


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