[edk2-devel] [PATCH] UefiCpuPkg/CpuDxe: Fix boot error
Laszlo Ersek
lersek at redhat.com
Thu Dec 10 08:49:54 UTC 2020
On 12/09/20 21:02, Tom Lendacky wrote:
> On 12/2/20 3:38 PM, Guo Dong via groups.io wrote:
>> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3084
>>
>> When DXE drivers are dispatched above 4GB memory and
>> the system is already in 64bit mode, the address
>> setCodeSelectorLongJump in stack will be override
>> by parameter. so change to use 64bit address and
>> jump to qword address.
>
> This patch breaks AMD processors. AMD processors cannot do far jumps to
> 64-bit targets. Please see AMD APM Vol. 3 [1], JMP (Far), where it states:
>
> Target is a code segment — Control is transferred to the target CS:rIP. In
> this case, the target offset can only be a 16 or 32 bit value, depending
> on operand-size, and is zero-extended to 64 bits; 64-bit offsets are only
> available via call gates. No CPL change is allowed.
>
> [1] http://support.amd.com/TechDocs/24594.pdf
>
Should we revert the patch, or predicate the change on something similar
to StandardSignatureIsAuthenticAMD()
[UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c]? The CPUID check
could be open-coded in the assembly file. (Maybe there's a better
method, I'm not sure.)
Thanks
Laszlo
> Thanks,
> Tom
>
>>> Signed-off-by: Guo Dong <guo.dong at intel.com>
>> ---
>> UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm b/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm
>> index c3489bcc3e..6ad32b49f4 100644
>> --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm
>> +++ b/UefiCpuPkg/CpuDxe/X64/CpuAsm.nasm
>> @@ -23,8 +23,8 @@ ASM_PFX(SetCodeSelector):
>> sub rsp, 0x10
>> lea rax, [setCodeSelectorLongJump]
>> mov [rsp], rax
>> - mov [rsp+4], cx
>> - jmp dword far [rsp]
>> + mov [rsp+8], cx
>> + jmp qword far [rsp]
>> setCodeSelectorLongJump:
>> add rsp, 0x10
>> ret
>>
>
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