回复: [edk2-devel] [PATCH v4 01/11] MdePkg: Clean up GHCB field offsets and save area

[gaoliming]

Tom:
  Seemly, this is a ECC tool issue. I submit BZ
https://bugzilla.tianocore.org/show_bug.cgi?id=3060 to record it. 

  For this patch in MdePkg, it is also OK. Reviewed-by: Liming Gao
<gaoliming at byosoft.com.cn>

Thanks
Liming
> -----邮件原件-----
> 发件人: bounce+27952+67100+4905953+8761045 at groups.io
> <bounce+27952+67100+4905953+8761045 at groups.io> 代表 Lendacky,
> Thomas
> 发送时间: 2020年11月7日 1:53
> 收件人: devel at edk2.groups.io
> 抄送: Brijesh Singh <brijesh.singh at amd.com>; Michael D Kinney
> <michael.d.kinney at intel.com>; Liming Gao <gaoliming at byosoft.com.cn>;
> Zhiguang Liu <zhiguang.liu at intel.com>
> 主题: [edk2-devel] [PATCH v4 01/11] MdePkg: Clean up GHCB field offsets
> and save area
> 
> From: Tom Lendacky <thomas.lendacky at amd.com>
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008
> 
> Use OFFSET_OF () and sizeof () to calculate the GHCB register field
> offsets instead of hardcoding the values in the GHCB_REGISTER enum.
> Define only fields that are used per the GHCB specification, which will
> result in removing some fields and adding others.
> 
> Also, remove the DR7 field from the GHCB_SAVE_AREA structure since it is
> not used/defined in the GHCB specification and then rename the reserved
> fields as appropriate.
> 
> Cc: Michael D Kinney <michael.d.kinney at intel.com>
> Cc: Liming Gao <gaoliming at byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu at intel.com>
> Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com>
> ---
>  MdePkg/Include/Register/Amd/Ghcb.h | 43 ++++++++------------
>  1 file changed, 17 insertions(+), 26 deletions(-)
> 
> diff --git a/MdePkg/Include/Register/Amd/Ghcb.h
> b/MdePkg/Include/Register/Amd/Ghcb.h
> index 54a80da0f6d7..ccdb662af7a7 100644
> --- a/MdePkg/Include/Register/Amd/Ghcb.h
> +++ b/MdePkg/Include/Register/Amd/Ghcb.h
> @@ -82,35 +82,10 @@
>  #define IOIO_SEG_DS         (BIT11 | BIT10)
> 
> 
> -typedef enum {
> -  GhcbCpl              = 25,
> -  GhcbRflags           = 46,
> -  GhcbRip,
> -  GhcbRsp              = 59,
> -  GhcbRax              = 63,
> -  GhcbRcx              = 97,
> -  GhcbRdx,
> -  GhcbRbx,
> -  GhcbRbp              = 101,
> -  GhcbRsi,
> -  GhcbRdi,
> -  GhcbR8,
> -  GhcbR9,
> -  GhcbR10,
> -  GhcbR11,
> -  GhcbR12,
> -  GhcbR13,
> -  GhcbR14,
> -  GhcbR15,
> -  GhcbXCr0             = 125,
> -} GHCB_REGISTER;
> -
>  typedef PACKED struct {
>    UINT8                  Reserved1[203];
>    UINT8                  Cpl;
> -  UINT8                  Reserved2[148];
> -  UINT64                 Dr7;
> -  UINT8                  Reserved3[144];
> +  UINT8                  Reserved8[300];
>    UINT64                 Rax;
>    UINT8                  Reserved4[264];
>    UINT64                 Rcx;
> @@ -136,6 +111,22 @@ typedef PACKED struct {
>    UINT32                 GhcbUsage;
>  } GHCB;
> 
> +#define GHCB_SAVE_AREA_QWORD_OFFSET(RegisterField) \
> +  (OFFSET_OF (GHCB, SaveArea.RegisterField) / sizeof (UINT64))
> +
> +typedef enum {
> +  GhcbCpl          = GHCB_SAVE_AREA_QWORD_OFFSET (Cpl),
> +  GhcbRax          = GHCB_SAVE_AREA_QWORD_OFFSET (Rax),
> +  GhcbRbx          = GHCB_SAVE_AREA_QWORD_OFFSET (Rbx),
> +  GhcbRcx          = GHCB_SAVE_AREA_QWORD_OFFSET (Rcx),
> +  GhcbRdx          = GHCB_SAVE_AREA_QWORD_OFFSET (Rdx),
> +  GhcbXCr0         = GHCB_SAVE_AREA_QWORD_OFFSET (XCr0),
> +  GhcbSwExitCode   = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitCode),
> +  GhcbSwExitInfo1  = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitInfo1),
> +  GhcbSwExitInfo2  = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitInfo2),
> +  GhcbSwScratch    = GHCB_SAVE_AREA_QWORD_OFFSET (SwScratch),
> +} GHCB_REGISTER;
> +
>  typedef union {
>    struct {
>      UINT32  Lower32Bits;
> --
> 2.28.0
> 
> 
> 
> 
> 





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