[edk2-devel] [PATCH v1] UefiCpuPkg/CpuCacheInfoLib: Sort CpuCacheInfo array

[Jason Lou]

Hi Ray,

According to the definitions in SDM, the value of "Core" core type(40H) is larger than that of "Atom"
core type(20H), if array is sorted by core type value from largest to smallest, “Core” CPU cache info
can be placed before "Atom" CPU cache info in the CpuCacheInfo array.

No matter how to sort the array by core type value, no issue will occur.
The consumer of the array just need use the same sort rule to process the data of the array.

[SDM definition]
1AH EAX Enumerates the native model ID and core type.
Bits 31-24: Core type
10H: Reserved
20H: Intel Atom®
30H: Reserved
40H: Intel® Core™


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