[edk2-devel] [PATCH RESEND v1 2/2] Silicon/Qemu: Update MADT with GICv3 ITS info

[Shashi Mallela]

For Qemu sbsa-ref platforms,to enable detection of GICv3 Interrupt
Translation Service capability in the ACPI MADT,the GIC ITS structure
is created with the relevant values for each of its fields.The
existing MADT functionality is extended to include GIC ITS structure
presence as well.

Cc: Leif Lindholm <leif at nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore at kernel.org>
Cc: Graeme Gregory <graeme at nuviainc.com>
Signed-off-by: Shashi Mallela <shashi.mallela at linaro.org>
---
 Silicon/Qemu/SbsaQemu/SbsaQemu.dec                                |  3 +++
 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf                   |  2 ++
 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf |  2 ++
 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h     | 10 ++++++++++
 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c   | 10 +++++++++-
 5 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 9448852967b6..8654cc7c858c 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -36,6 +36,9 @@ [PcdsFixedAtBuild.common]
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005
 
+  # ARM Generic Interrupt Controller ITS
+  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase|0|UINT64|0x0000000F
+
   # PCDs complementing PCIe layout pulled into ACPI tables
   # Limit = Base + Size - 1
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciIoLimit|0x0000ffff|UINT32|0x00000006
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
index 9be34488eb7a..5616b73178ff 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
@@ -74,3 +74,5 @@ [FixedPcd]
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize
+
+  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index c6de685bd2c4..2eb6577fd077 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -65,3 +65,5 @@ [FixedPcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
+
+  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
index 4d5b05ba17c6..5f9e9477bf6a 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
@@ -37,6 +37,16 @@
    SBSAQEMU_MADT_GICR_SIZE                   /* DiscoveryRangeLength */        \
    }
 
+// Macro for MADT GIC ITS Structure
+#define SBSAQEMU_MADT_GIC_ITS_INIT() {                                         \
+   EFI_ACPI_6_0_GIC_ITS,                     /* Type */                        \
+   sizeof (EFI_ACPI_6_0_GIC_ITS_STRUCTURE),  /* Length */                      \
+   EFI_ACPI_RESERVED_WORD,                   /* Reserved */                    \
+   0,                                        /* GicItsId */                    \
+   FixedPcdGet64 (PcdGicItsBase),            /* PhysicalBaseAddress */         \
+   EFI_ACPI_RESERVED_DWORD                   /* Reserved */                    \
+   }
+
 #define SBSAQEMU_ACPI_SCOPE_OP_MAX_LENGTH 5
 
 #define SBSAQEMU_ACPI_SCOPE_NAME         { '_', 'S', 'B', '_' }
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index b8901030ecd0..9d6a4b36cbe9 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -91,6 +91,9 @@ AddMadtTable (
  // Initialize GIC Redistributor Structure
   EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
 
+ // Initialize GIC ITS Structure
+  EFI_ACPI_6_0_GIC_ITS_STRUCTURE Gic_Its = SBSAQEMU_MADT_GIC_ITS_INIT();
+
   // Get CoreCount which was determined eariler after parsing device tree
   NumCores = PcdGet32 (PcdCoreCount);
 
@@ -98,7 +101,8 @@ AddMadtTable (
   TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) +
                (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) +
                sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) +
-               sizeof (EFI_ACPI_6_0_GICR_STRUCTURE);
+               sizeof (EFI_ACPI_6_0_GICR_STRUCTURE) +
+               sizeof (EFI_ACPI_6_0_GIC_ITS_STRUCTURE);
 
   Status = gBS->AllocatePages (
                   AllocateAnyPages,
@@ -138,6 +142,10 @@ AddMadtTable (
   CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE));
   New += sizeof (EFI_ACPI_6_0_GICR_STRUCTURE);
 
+  // GIC ITS Structure
+  CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_0_GIC_ITS_STRUCTURE));
+  New += sizeof (EFI_ACPI_6_0_GIC_ITS_STRUCTURE);
+
   AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize);
 
   Status = AcpiTable->InstallAcpiTable (
-- 
2.27.0



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