[edk2-devel] [PATCH 1/1] Platform/RaspberryPi: Add linux quirk support

Jeremy Linton jeremy.linton at arm.com
Fri Aug 6 22:40:55 UTC 2021


Hi,

On 8/6/21 10:47 AM, Andrei Warkentin wrote:
> Hi Jeremy,
> 
> Reviewed-by: Andrei Warkentin <awarkentin at vmware.com>
> 
> MADT -> MCFG

Yah, I have to start thinking about what I'm typing :)

> 
> Root port registers would be NonCacheable just like the outbound mapping. (Also, with https://mantis.uefi.org/mantis/view.php?id=2220, _MEM attributes aside from  NonCacheable and Prefetchable are effectively deprecated).
> 
> Note: I really wish we had sorted out the HID/CID story for the PCIe RC... i.e. at least to make the HID custom for non-ECAM implementations and push PNP0A08/PNP0A03 in the CID... this would make linux,pcie-quirk unnecessary, using standard ACPI driver binding mechanisms to separate quirks from proper ECAM. Sadly, I think the train to do that has long left the station (with so many ACPI Arm systems out there and non-ECAM or not-quite-ECAM RCs using PNP0A08/PNP0A03 alone. ESXi, for example, ends up keying on the Table Ids (which is arguably even worse than the DT props)

This isn't a bad idea (changing the HID), but I think your right that 
ship might have sailed, although it might be still be an alternative for 
the SMC.


> 
> Note 2: Given that DT has users in U-Boot and the BSDs (and potentially anywhere else), there's a long term hope to make DT bindings separate from Linux. To that end "linux,pcie-quirk" and "linux,pcie-nomsi" should probably be named something else (although I recognise that you're probably just wiring up something that already exists).

Well I want this one to be linux specific, because hopefully everyone 
else realizes that the SMC is a better plan and ignores the property. 
Its not set anywhere so I can potentially change it. The linux posting 
is here:

https://lkml.org/lkml/2021/8/5/1109

(where I apparently typed MCFG instead of MADT correctly, well at least 
most of the time :) .

But I don't have a problem dropping the linux bit, although I would like 
that part to be generic so future SMC+quirked platforms don't have to 
modify the quirk detection code. Although lets see what Lorenzo/etc say 
about what i'm doing in that patch. Thats why I left this patch off the 
other set.



> 
> --
> Andrei Warkentin,
> Arm Enablement Architect,
> Cloud Platform Business Unit, VMware
> ________________________________
> From: Jeremy Linton <jeremy.linton at arm.com>
> Sent: Thursday, August 5, 2021 7:40 PM
> To: devel at edk2.groups.io <devel at edk2.groups.io>
> Cc: pete at akeo.ie <pete at akeo.ie>; ardb+tianocore at kernel.org <ardb+tianocore at kernel.org>; Andrei Warkentin <awarkentin at vmware.com>; Sunny.Wang at arm.com <Sunny.Wang at arm.com>; samer.el-haj-mahmoud at arm.com <samer.el-haj-mahmoud at arm.com>; Jeremy Linton <jeremy.linton at arm.com>
> Subject: [PATCH 1/1] Platform/RaspberryPi: Add linux quirk support
> 
> Linux, for the time being has refused to support the Arm
> standard SMCCC for PCIe configuration. Instead they
> want to continue to maintain per device "quirks".
> 
> As the RPI isn't really ECAM this is a bit more
> involved because the MADT can't really describe
> the root port+config registers situation. Further
> platforms which support the SMCCC shouldn't have
> a MADT, so we need an additional way to tell linux
> what it needs to know about this platform.
> 
> Signed-off-by: Jeremy Linton <jeremy.linton at arm.com>
> ---
>   Platform/RaspberryPi/AcpiTables/Pci.asl | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)
> 
> diff --git a/Platform/RaspberryPi/AcpiTables/Pci.asl b/Platform/RaspberryPi/AcpiTables/Pci.asl
> index 34474f13ef..3e7fd0d5b7 100644
> --- a/Platform/RaspberryPi/AcpiTables/Pci.asl
> +++ b/Platform/RaspberryPi/AcpiTables/Pci.asl
> @@ -123,6 +123,15 @@ DefinitionBlock (__FILE__, "SSDT", 5, "RPIFDN", "RPI4PCIE", 2)
>           Name(_BBN, Zero) // PCI Base Bus Number
>           Name(_CCA, 0)    // Mark the PCI noncoherent
> 
> +        Name (_DSD, Package () {
> +          ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> +            Package () {
> +              Package () { "linux,pcie-quirk", "bcm2711" },
> +              Package () { "linux,pcie-nomsi", 1 },
> +            }
> +        })
> +
> +
>           // Root Complex 0
>           Device (RP0) {
>            Name(_ADR, 0xF0000000)    // Dev 0, Func 0
> @@ -176,6 +185,18 @@ DefinitionBlock (__FILE__, "SSDT", 5, "RPIFDN", "RPI4PCIE", 2)
>                 2                               // SANITIZED_PCIE_MMIO_LEN + 1
>                 ,,,MMI1,,TypeTranslation
>               )
> +
> +            QWordMemory ( // Root port registers, not to be used if SMCCC is utilized
> +              ResourceConsumer, ,
> +              MinFixed, MaxFixed,
> +              NonCacheable, ReadWrite,        // cacheable? is that right?
> +              0x00000000,                     // Granularity
> +              0xFD500000,                     // Root port begin
> +              0xFD509FFF,                     // Root port end
> +              0x00000000,                     // no translation
> +              0x0000A000,                     // size
> +              ,,
> +            )
>             }) // end Name(RBUF)
> 
>             // Work around ASL's inability to add in a resource definition
> --
> 2.13.7
> 
> 



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