[edk2-devel] [PATCH v3 4/6] Drivers/OpTee: Add Aarch32 SVC IDs for 32bit Arm targets

[Etienne Carriere]

Add SMCCC function IDs for RPMB read/write service on 32bit architectures.
Define generic SP_SVC_RPMB_READ/SP_SVC_RPMB_WRITE IDs for native target
architecture (32b or 64b).

Changes OpTeeRpmbFvb.c to use architecture agnostic macro
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ for 32b and 64b support.

Cc: Ard Biesheuvel <ardb+tianocore at kernel.org>
Cc: Ilias Apalodimas <ilias.apalodimas at linaro.org>
Cc: Leif Lindholm <leif at nuviainc.com>
Cc: Sami Mujawar <sami.mujawar at arm.com>
Signed-off-by: Etienne Carriere <etienne.carriere at linaro.org>
---
No change since v2

Changes since v1:
- Use _AARCH64 (resp. _AARCH32) suffix instead of _64 (resp. _32) in
  the added macros.
---
 Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c |  2 +-
 Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h | 16 ++++++++++++++--
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
index 5197c95abd..6eb19bed0e 100644
--- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
@@ -68,7 +68,7 @@ ReadWriteRpmb (
 
   ZeroMem (&SvcArgs, sizeof (SvcArgs));
 
-  SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;
+  SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ;
   SvcArgs.Arg1 = mStorageId;
   SvcArgs.Arg2 = 0;
   SvcArgs.Arg3 = SvcAct;
diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
index c17fc287ef..9c2a4ea6a5 100644
--- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
@@ -13,8 +13,20 @@
  contract between OP-TEE and EDK2.
  For more details check core/arch/arm/include/kernel/stmm_sp.h in OP-TEE
 **/
-#define SP_SVC_RPMB_READ                0xC4000066
-#define SP_SVC_RPMB_WRITE               0xC4000067
+#define SP_SVC_RPMB_READ_AARCH64        0xC4000066
+#define SP_SVC_RPMB_WRITE_AARCH64       0xC4000067
+
+#define SP_SVC_RPMB_READ_AARCH32        0x84000066
+#define SP_SVC_RPMB_WRITE_AARCH32       0x84000067
+
+#ifdef MDE_CPU_AARCH64
+#define SP_SVC_RPMB_READ                SP_SVC_RPMB_READ_AARCH64
+#define SP_SVC_RPMB_WRITE               SP_SVC_RPMB_WRITE_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define SP_SVC_RPMB_READ                SP_SVC_RPMB_READ_AARCH32
+#define SP_SVC_RPMB_WRITE               SP_SVC_RPMB_WRITE_AARCH32
+#endif
 
 #define FLASH_SIGNATURE            SIGNATURE_32 ('r', 'p', 'm', 'b')
 #define INSTANCE_FROM_FVB_THIS(a)  CR (a, MEM_INSTANCE, FvbProtocol, \
-- 
2.17.1



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