[edk2-devel] [edk2-platforms] [PATCH V2] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS

[Nate DeSimone]

The SA GNVS Area contains fields for the MMIO region
base address and length. This implements code to
populate those fields. The MMIO Base/Length are used
by ASL at runtime and must be populated for normal
system operation.

Cc: Chasel Chiu <chasel.chiu at intel.com>
Cc: Michael Kubacki <Michael.Kubacki at microsoft.com>
Cc: Benjamin Doron <benjamin.doron00 at gmail.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
---
 .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c          | 58 ++++++++++++++++++-
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf        | 12 +++-
 2 files changed, 64 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
index 0d9d217e38..5c32a6e04c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
@@ -1,7 +1,7 @@
 /** @file
   Acpi Gnvs Init Library.
 
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -11,11 +11,52 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/PciLib.h>
 #include <Library/DebugLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/UefiLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 
 #include <PchAccess.h>
 #include <Protocol/GlobalNvsArea.h>
 #include <Protocol/MpService.h>
+#include <Protocol/SaGlobalNvsArea.h>
+
+/**
+  A protocol callback which updates MMIO Base and Length in SA GNVS area
+
+  @param[in] Event    - The triggered event.
+  @param[in] Context  - Context for this event.
+
+**/
+VOID
+EFIAPI
+UpdateSaGnvsForMmioResourceBaseLength (
+  IN EFI_EVENT Event,
+  IN VOID      *Context
+  )
+{
+  EFI_STATUS                            Status;
+  SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsAreaProtocol;
+
+  Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL, (VOID **) &SaGlobalNvsAreaProtocol);
+  if (Status != EFI_SUCCESS) {
+    return;
+  }
+  gBS->CloseEvent (Event);
+
+  //
+  // Configure MMIO Base/Length. This logic is only valid for platforms that use PciHostBridgeLibSimple.
+  //
+  DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
+  SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32 (PcdPciReservedMemBase);
+  if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
+    SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32 (PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
+  } else {
+    SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64 (PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
+  }
+  if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64 (PcdPciReservedMemAbove4GBBase)) {
+    SaGlobalNvsAreaProtocol->Area->Mmio64Base   = PcdGet64 (PcdPciReservedMemAbove4GBBase);
+    SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64 (PcdPciReservedMemAbove4GBLimit) - PcdGet64 (PcdPciReservedMemAbove4GBBase) + 1;
+  }
+}
 
 /**
 @brief
@@ -39,6 +80,7 @@ AcpiGnvsInit (
   EFI_MP_SERVICES_PROTOCOL      *MpService;
   UINTN                         NumberOfCPUs;
   UINTN                         NumberOfEnabledCPUs;
+  VOID                          *SaGlobalNvsRegistration;
 
   Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
   Address = 0xffffffff; // allocate address below 4G.
@@ -53,7 +95,7 @@ AcpiGnvsInit (
   if (EFI_ERROR(Status)) {
     return Status;
   }
-  
+
   //
   // Locate the MP services protocol
   // Find the MP Protocol. This is an MP platform, so MP protocol must be there.
@@ -90,6 +132,16 @@ AcpiGnvsInit (
   GNVS->Area->PL1LimitCS = 0;
   GNVS->Area->PL1LimitCSValue = 4500;
 
+  //
+  // Update SA GNVS with MMIO Base/Length
+  //
+  EfiCreateProtocolNotifyEvent (
+    &gSaGlobalNvsAreaProtocolGuid,
+    TPL_CALLBACK,
+    UpdateSaGnvsForMmioResourceBaseLength,
+    NULL,
+    &SaGlobalNvsRegistration
+    );
+
   return EFI_SUCCESS;
 }
-
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
index 7d2e105e54..5d3d4c3a2b 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
@@ -1,7 +1,7 @@
 ### @file
 #  Component information file for AcpiPlatform module
 #
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -38,6 +38,7 @@
   PcdLib
   UefiBootServicesTableLib
   UefiRuntimeServicesTableLib
+  UefiLib
   BaseMemoryLib
   HobLib
   AslUpdateLib
@@ -48,8 +49,15 @@
   gEfiFirmwareVolume2ProtocolGuid               ## CONSUMES
   gEfiMpServiceProtocolGuid                     ## CONSUMES
   gEfiGlobalNvsAreaProtocolGuid
+  gSaGlobalNvsAreaProtocolGuid                  ## CONSUMES
 
 [Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+  gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
+  gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
+  gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
+  gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
+
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
 
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
@@ -65,5 +73,3 @@
   gEfiPciRootBridgeIoProtocolGuid     AND
   gEfiVariableArchProtocolGuid        AND
   gEfiVariableWriteArchProtocolGuid
-
-
-- 
2.27.0.windows.1



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