[edk2-devel] [edk2-platforms PATCH v2 0/4] SolidRun CEx7 Evaluation Board support

[Ard Biesheuvel]

On Sat, 7 Aug 2021 at 21:37, Marcin Wojtas <mw at semihalf.com> wrote:
>
> Hi,
>
> The second version comes with a minor improvement, which
> is a result of the TF-A support update and changes around the
> default IO windows configuration.
>
> The patches are also available on public branches:
> https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/cex7-r20210807
> https://github.com/semihalf-wojtas-marcin/edk2-non-osi/commits/cex7-r20210806
>
> I would appreciate any comments or remarks.
>
> Best regards,
> Marcin
>
> Changelog:
> v1->v2:
> * 3/4: update IO windows reconfiguration, in order to align to
>   the TF-A changes.
>
> Marcin Wojtas (3):
> edk2-platforms:
>   Marvell: Armada7k8k/OcteonTx: Select ACPI description as a default
>   SolidRun/Cn913xCEx7Eval: Add ACPI support
>   SolidRun/Cn913xCEx7Eval: Add platform support
>

Pushed as f24aa7708d9b..43259c414370

Thanks,

> edk2-non-osi:
>   SolidRun/Cn913xCEx7Eval: Add DeviceTree
>
>  Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc                                |  54 ++
>  Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc                                |  64 +++
>  Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc                                |  64 +++
>  Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc                                |  68 +++
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                                      |   7 +
>  Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc                                |  57 +++
>  Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf       |  30 ++
>  Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf |  38 ++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf                         |  61 +++
>  Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h         |  31 ++
>  Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h   |  13 +
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h                      |   9 +
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h                      | 114 +++++
>  Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c         | 294 +++++++++++
>  Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c   |  89 ++++
>  Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc                            |  17 +
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl          | 383 +++++++++++++++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl          | 493 +++++++++++++++++++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl          | 515 ++++++++++++++++++++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl          | 120 +++++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc                   |  74 +++
>  Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc                   |  87 ++++
>  22 files changed, 2682 insertions(+)
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c
>  create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc
>  create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc
>
> --
> 2.29.0
>


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