[edk2-devel] [PATCH v1 01/10] Silicon/Phytium/: added PhytiumPlatformLib to Phytium2000-4
Ling Jia
jialing at phytium.com.cn
Fri Jan 15 08:47:53 UTC 2021
From: Ling <jialing at phytium.com.cn>
The PhytiumPlatformLib supported the system
library for Phytium2000-4 chip.
Maintainers.txt: Adds maintainers and reviewers for the DurianPkg.
Cc: Leif Lindholm <leif at nuviainc.com>
Signed-off-by: Ling Jia <jialing at phytium.com.cn>
Signed-off-by: Peng Xie <xiepeng at phytium.com.cn>
Reviewed-by: Yiqi Shu <shuyiqi at phytium.com.cn>
---
Silicon/Phytium/Phytium.dec | 60 +++
Silicon/Phytium/Phytium.dsc.inc | 388 ++++++++++++++++++++
Platform/Phytium/Durian/DurianPkg.dsc | 302 +++++++++++++++
Platform/Phytium/Durian/DurianPkg.fdf | 199 ++++++++++
Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.inf | 66 ++++
Silicon/Phytium/Include/PhytiumSystemServiceInterface.h | 112 ++++++
Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.c | 135 +++++++
Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLibMem.c | 148 ++++++++
Maintainers.txt | 7 +
Silicon/Phytium/Phytium.fdf.inc | 119 ++++++
Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/PhytiumPlatformHelper.S | 76 ++++
11 files changed, 1612 insertions(+)
diff --git a/Silicon/Phytium/Phytium.dec b/Silicon/Phytium/Phytium.dec
new file mode 100644
index 000000000000..a064fd60a9c5
--- /dev/null
+++ b/Silicon/Phytium/Phytium.dec
@@ -0,0 +1,60 @@
+## @file
+# This package provides common open source Phytium silicon modules.
+#
+# Copyright (C) 2020, Phytium Technology Co,Ltd. All rights reserved.
+#
+# SPDX-License-Identifier:BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = PhytiumPkg
+ PACKAGE_GUID = b34af0b4-3e7c-11eb-a9d0-0738806d2dec
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes]
+ Include # Root include for the package
+
+[Guids.common]
+ gPhytiumPlatformTokenSpaceGuid = { 0x8c3abed4, 0x1fc8, 0x46d3, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xde, 0x76 } }
+ gPhytiumPlatformMemoryInforGuid = { 0xe5d0f31b, 0x18b2, 0x4ec1, { 0xba, 0x20, 0x9c, 0x6d, 0xb7, 0x87, 0x91, 0x79 } }
+ gPhytiumPlatformCpuInforGuid = { 0x60c3c4b0, 0xe189, 0x4cbb, { 0x88, 0x6a, 0x96, 0x87, 0x21, 0xe0, 0xe0, 0xb0 } }
+ gPhytiumPlatformPciHostInforGuid = { 0x24b99cf4, 0x2e51, 0x440e, { 0x8c, 0x7a, 0xea, 0xa2, 0xe0, 0x29, 0x32, 0xf } }
+ gShellSfHiiGuid = {0x7e57433d, 0x1016, 0x407a, { 0x9d, 0xb8, 0xf9, 0x56, 0x12, 0x19, 0x66, 0x16 } }
+
+[PcdsFixedAtBuild.common]
+ #
+ # PCI configuration address space
+ #
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0|UINT64|0x00000000
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x0|UINT64|0x00000001
+
+ #
+ # PCI configuration address space
+ #
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x0|UINT64|0x00000002
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x0|UINT64|0x00000003
+
+ #
+ # SPI Flash Controller Register Base Address and Size
+ #
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase|0x0|UINT64|0x00000004
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize|0x0|UINT64|0x00000005
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase|0x0|UINT64|0x00000006
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize|0x0|UINT64|0x00000007
+ gPhytiumPlatformTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT32|0x00000008
+ gPhytiumPlatformTokenSpaceGuid.PcdLogoFile |{ 0x99, 0x8b, 0xAA, 0x7B, 0xBB, 0x61, 0xD5, 0x11, 0x9A, 0x5D, 0xBB, 0x90, 0x27, 0x3F, 0xC2, 0x4D }|VOID*|0x40000013
+
+[Protocols]
+ gPhytiumSpiMasterProtocolGuid = { 0xdf093560, 0xf955, 0x11ea, { 0x96, 0x42, 0x43, 0x9d, 0x80, 0xdd, 0x0b, 0x7c}}
+ gPhytiumFlashProtocolGuid = { 0x00b4af42, 0xfbd0, 0x11ea, { 0x80, 0x3a, 0x27, 0xea, 0x5e, 0x65, 0xe3, 0xf6}}
diff --git a/Silicon/Phytium/Phytium.dsc.inc b/Silicon/Phytium/Phytium.dsc.inc
new file mode 100644
index 000000000000..15b66f6bd55d
--- /dev/null
+++ b/Silicon/Phytium/Phytium.dsc.inc
@@ -0,0 +1,388 @@
+## @file
+# This package provides common open source Phytium silicon modules.
+#
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+#
+# SPDX-License-Identifier:BSD-2-Clause-Patent
+#
+##
+
+
+[LibraryClasses.common]
+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+
+!if $(TARGET) == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+ HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf
+
+ #
+ # Assume everything is fixed at build
+ #
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ #BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+ # ARM Architectural Libraries
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+ ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+
+ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+ PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+
+ #
+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
+ # in the debugger will show load and unload commands for symbols. You can cut and paste this
+ # into the command window to load symbols. We should be able to use a script to do this, but
+ # the version of RVD I have does not support scripts accessing system memory.
+ #
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+ DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
+ AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+ #
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+ PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+ VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+
+ # Scsi Requirements
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+
+ # USB Requirements
+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+
+ # Networking Requirements
+ NetLib|NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
+ DpcLib|NetworkPkg/Library/DxeDpcLib/DxeDpcLib.inf
+ UdpIoLib|NetworkPkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+ IpIoLib|NetworkPkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
+
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf
+ SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+
+[LibraryClasses.common.SEC]
+ DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
+ PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+ ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+ LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+ HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+ PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
+
+[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
+ MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf
+
+[LibraryClasses.common.UEFI_APPLICATION]
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+
+ # UiApp dependencies
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+!endif
+
+!if $(TARGET) != RELEASE
+ DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
+!endif
+ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
+[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER]
+ #
+ # PSCI support in EL3 may not be available if we are not running under a PSCI
+ # compliant secure firmware, but since the default VExpress EfiResetSystemLib
+ # cannot be supported at runtime (due to the fact that the syscfg MMIO registers
+ # cannot be runtime remapped), it is our best bet to get ResetSystem functionality
+ # on these platforms.
+ #
+ EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
+
+[LibraryClasses.ARM, LibraryClasses.AARCH64]
+ #
+ # It is not possible to prevent the ARM compiler for generic intrinsic functions.
+ # This library provides the instrinsic functions generate by a given compiler.
+ # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
+ #
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+ # Add support for GCC stack protector
+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+[BuildOptions]
+ RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+[BuildOptions.AARCH64.EDKII.DXE_RUNTIME_DRIVER]
+ GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+ # If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
+ # It could be set FALSE to save size.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
+
+ # Force the UEFI GIC driver to use GICv2 legacy mode. To use
+ # GICv3 without GICv2 legacy in UEFI, the ARM Trusted Firmware needs
+ # to configure the Non-Secure interrupts in the GIC Redistributors
+ # which is not supported at the moment.
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
+
+ gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+
+ # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
+ gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
+
+ # Indicates if EFI 1.1 ISO 639-2 language supports are obsolete
+ # TRUE - Deprecate global variable LangCodes.
+ # FALSE - Does not deprecate global variable LangCodes.
+ # Deprecate Global Variable LangCodes.
+ gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangDeprecate|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE
+
+[PcdsFixedAtBuild.common]
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+ gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
+
+ # DEBUG_ASSERT_ENABLED 0x01
+ # DEBUG_PRINT_ENABLED 0x02
+ # DEBUG_CODE_ENABLED 0x04
+ # CLEAR_MEMORY_ENABLED 0x08
+ # ASSERT_BREAKPOINT_ENABLED 0x10
+ # ASSERT_DEADLOOP_ENABLED 0x20
+!if $(TARGET) == RELEASE
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
+!else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+!endif
+
+ # DEBUG_INIT 0x00000001 // Initialization
+ # DEBUG_WARN 0x00000002 // Warnings
+ # DEBUG_LOAD 0x00000004 // Load events
+ # DEBUG_FS 0x00000008 // EFI File system
+ # DEBUG_POOL 0x00000010 // Alloc & Free's
+ # DEBUG_PAGE 0x00000020 // Alloc & Free's
+ # DEBUG_INFO 0x00000040 // Verbose
+ # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
+ # DEBUG_VARIABLE 0x00000100 // Variable
+ # DEBUG_BM 0x00000400 // Boot Manager
+ # DEBUG_BLKIO 0x00001000 // BlkIo Driver
+ # DEBUG_NET 0x00004000 // SNI Driver
+ # DEBUG_UNDI 0x00010000 // UNDI Driver
+ # DEBUG_LOADFILE 0x00020000 // UNDI Driver
+ # DEBUG_EVENT 0x00080000 // Event messages
+ # DEBUG_GCD 0x00100000 // Global Coherency Database changes
+ # DEBUG_CACHE 0x00200000 // Memory range cachability changes
+ # DEBUG_ERROR 0x80000000 // Error
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+
+ #gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
+ #gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
+ #gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
+ # 20ms
+ gEmbeddedTokenSpaceGuid.PcdTimerPeriod|200000
+
+ #
+ # Optional feature to help prevent EFI memory map fragments
+ # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
+ # Values are in EFI Pages (4K). DXE Core will make sure that
+ # at least this much of each type of memory can be allocated
+ # from a single memory range. This way you only end up with
+ # maximum of two fragements for each type in the memory map
+ # (the memory used, and the free memory that was prereserved
+ # but not used).
+ #
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
+
+ # RunAxf support via Dynamic Shell Command protocol
+ # We want to use the Shell Libraries but don't want it to initialise
+ # automatically. We initialise the libraries when the command is called by the
+ # Shell.
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot
+ gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
+!endif
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
+!else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x4000
+!endif
+
+ # Default platform supported RFC 4646 languages: English & French & Chinese Simplified.
+ # Default Value of PlatformLangCodes Variable.
+ gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US;zh-Hans"
+
+ # Default current RFC 4646 language: Chinese Simplified.
+ # Default Value of PlatformLang Variable.
+ gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLang|"en-US"
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
+ #
+ # ACPI Table Version
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|67
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
+
+[PcdsDynamicDefault.common.DEFAULT]
+ ## This PCD defines the video horizontal resolution.
+ # This PCD could be set to 0 then video resolution could be at highest resolution.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|640
+ ## This PCD defines the video vertical resolution.
+ # This PCD could be set to 0 then video resolution could be at highest resolution.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|480
+
+ ## This PCD defines the Console output row and the default value is 80 according to UEFI spec.
+ # This PCD could be set to 0 then console output could be at max column and max row.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|128
+ ## This PCD defines the Console output column and the default value is 25 according to UEFI spec.
+ # This PCD could be set to 0 then console output could be at max column and max row.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|40
+
+ ## Specify the video horizontal resolution of text setup.
+ # @Prompt Video Horizontal Resolution of Text Setup
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
+
+ ## Specify the video vertical resolution of text setup.
+ # @Prompt Video Vertical Resolution of Text Setup
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
+
+ ## Specify the console output column of text setup.
+ # @Prompt Console Output Column of Text Setup
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|128
+ ## Specify the console output row of text setup.
+ # @Prompt Console Output Row of Text Setup
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|40
+
+ ## The number of seconds that the firmware will wait before initiating the original default boot selection.
+ # A value of 0 indicates that the default boot selection is to be initiated immediately on boot.
+ # The value of 0xFFFF then firmware will wait for user input before booting.
+ # @Prompt Boot Timeout (s)
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5
diff --git a/Platform/Phytium/Durian/DurianPkg.dsc b/Platform/Phytium/Durian/DurianPkg.dsc
new file mode 100644
index 000000000000..ef01cc217ace
--- /dev/null
+++ b/Platform/Phytium/Durian/DurianPkg.dsc
@@ -0,0 +1,302 @@
+## @file
+# This package provides common open source Phytium Platform modules.
+#
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+#
+# SPDX-License-Identifier:BSD-2-Clause-Patent
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = DurianPkg
+ PLATFORM_GUID = 8f7ac876-3e7c-11eb-86cb-33f68535d613
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/Phytium/Durian/DurianPkg.fdf
+
+!include Silicon/Phytium/Phytium.dsc.inc
+
+[LibraryClasses.common]
+ # Phytium Platform library
+ ArmPlatformLib|Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.inf
+
+ TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
+
+ # PL011 UART Driver and Dependency Libraries
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+ PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsFixedAtBuild.common]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"Durian Platform"
+
+ gArmTokenSpaceGuid.PcdVFPEnabled|1
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x303
+
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|4
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
+ #
+ # NV Storage PCDs.
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xe00000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xe10000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xe20000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
+
+ # Size of the region used by UEFI in permanent memory (Reserved 64MB)
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
+
+ #
+ # PL011 - Serial Terminal
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x28001000
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+
+
+ #
+ # ARM General Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x29900000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x29980000
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x29c00000
+
+ # System IO space
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x40000000
+
+ # System Memory (2GB ~ 4GB - 64MB), the top 64MB is reserved for PBF
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x7B000000
+
+ # Stack Size
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
+
+ #
+ # Designware PCI Root Complex
+ #
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x40000000
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|28
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x40000000
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x10000000
+ gArmTokenSpaceGuid.PcdPciBusMin|0
+ gArmTokenSpaceGuid.PcdPciBusMax|255
+ gArmTokenSpaceGuid.PcdPciIoBase|0x00000
+ gArmTokenSpaceGuid.PcdPciIoSize|0xf00000
+ gArmTokenSpaceGuid.PcdPciIoTranslation|0x50000000
+ gArmTokenSpaceGuid.PcdPciMmio32Base|0x58000000
+ gArmTokenSpaceGuid.PcdPciMmio32Size|0x28000000
+ gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0
+ gArmTokenSpaceGuid.PcdPciMmio64Base|0x1000000000
+ gArmTokenSpaceGuid.PcdPciMmio64Size|0x1000000000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE
+
+ #
+ # SPI Flash Control Register Base Address and Size
+ #
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase|0x0
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize|0x1000000
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase|0x28014000
+ gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize|0x1000
+
+ #
+ # RTC I2C Controller Register Base Address and Speed
+ #
+ gPhytiumPlatformTokenSpaceGuid.PcdRtcBaseAddress|0x2800D000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"V1.0"
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ #
+ # PCD database
+ #
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+ ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
+ ShellPkg/Application/Shell/Shell.inf {
+ <LibraryClasses>
+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
+ NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+ }
+
+ ArmPlatformPkg/PrePi/PeiMPCore.inf {
+ <LibraryClasses>
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ }
+
+ #
+ #Dxe core entry
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ }
+
+ #DXE driver
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ }
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+
+ #
+ # Common Arm Timer and Gic Components
+ #
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+
+ #
+ # security system
+ #
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
+ <LibraryClasses>
+ NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
+ }
+
+ #
+ #network, mod for https boot.
+ #
+ NetworkPkg/SnpDxe/SnpDxe.inf
+ NetworkPkg/DpcDxe/DpcDxe.inf
+ NetworkPkg/MnpDxe/MnpDxe.inf
+ NetworkPkg/ArpDxe/ArpDxe.inf
+ NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf
+ NetworkPkg/Ip4Dxe/Ip4Dxe.inf
+ NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf
+ NetworkPkg/Udp4Dxe/Udp4Dxe.inf
+ NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf
+
+ NetworkPkg/Ip6Dxe/Ip6Dxe.inf
+ NetworkPkg/Udp6Dxe/Udp6Dxe.inf
+ NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
+ NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
+ NetworkPkg/TcpDxe/TcpDxe.inf
+
+ NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
+
+ NetworkPkg/DnsDxe/DnsDxe.inf
+ NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
+ NetworkPkg/HttpDxe/HttpDxe.inf
+ #NetworkPkg/HttpBootDxe/HttpBootDxe.inf
+
+ # FV Filesystem
+ MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
+
+ #
+ # Common Console Components
+ #
+ # ConIn,ConOut,StdErr
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+
+ #
+ # Hii database init
+ #
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ FatPkg/EnhancedFatDxe/Fat.inf
+
+ #
+ # Generic Watchdog Timer
+ #
+ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+
+ #
+ # Usb Support
+ #
+ MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+
+ #
+ # IDE/AHCI Support
+ #
+ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
+ #
+ # The following 2 module perform the same work except one operate variable.
+ # Only one of both should be put into fdf.
+ #
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+
+ #
+ # NVME Support
+ #
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
+ # Bds
+ #
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+ MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
+
diff --git a/Platform/Phytium/Durian/DurianPkg.fdf b/Platform/Phytium/Durian/DurianPkg.fdf
new file mode 100644
index 000000000000..f2f4cbc9ac7f
--- /dev/null
+++ b/Platform/Phytium/Durian/DurianPkg.fdf
@@ -0,0 +1,199 @@
+## @file
+# This package provides common open source Phytium Platform modules.
+#
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+#
+# SPDX-License-Identifier:BSD-2-Clause-Patent
+#
+##
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.PHYTIUM]
+BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress
+Size = 0x01000000|gArmTokenSpaceGuid.PcdFdSize
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize = 0x10000
+NumBlocks = 0x100
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x200000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+BlockSize = 0x40
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 16 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ APRIORI DXE {
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+ }
+
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ #INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+
+ # Variable services
+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ #
+ # Multiple Console IO support
+ #
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ #
+ # SATA Controller
+ #
+ INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
+ #
+ # NVMe boot devices
+ #
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
+ # NetWork
+ #
+ INF NetworkPkg/SnpDxe/SnpDxe.inf
+ INF NetworkPkg/DpcDxe/DpcDxe.inf
+ INF NetworkPkg/MnpDxe/MnpDxe.inf
+ INF NetworkPkg/ArpDxe/ArpDxe.inf
+ INF NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf
+ INF NetworkPkg/Ip4Dxe/Ip4Dxe.inf
+ INF NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf
+ INF NetworkPkg/Udp4Dxe/Udp4Dxe.inf
+ INF NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf
+
+ #
+ # UEFI applications
+ #
+ INF ShellPkg/Application/Shell/Shell.inf
+
+ #
+ # Bds
+ #
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ INF MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+
+[FV.FVMAIN_COMPACT]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ }
+
+!include Silicon/Phytium/Phytium.fdf.inc
diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.inf b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.inf
new file mode 100644
index 000000000000..7ad0f31549ef
--- /dev/null
+++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.inf
@@ -0,0 +1,66 @@
+#/** @file
+# Library for Phytium Platform.
+#
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = PhytiumPlatformLib
+ FILE_GUID = fac08f56-40fe-11eb-a2a3-27b46864b1f3
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ Silicon/Phytium/Phytium.dec
+
+[LibraryClasses]
+ IoLib
+ ArmLib
+ ArmSmcLib
+ MemoryAllocationLib
+ SerialPortLib
+ HobLib
+ BaseMemoryLib
+
+[Sources.common]
+ PhytiumPlatformLib.c
+ PhytiumPlatformLibMem.c
+
+[Sources.AARCH64]
+ AArch64/PhytiumPlatformHelper.S
+
+[Guids]
+ gPhytiumPlatformMemoryInforGuid
+ gPhytiumPlatformCpuInforGuid
+ gPhytiumPlatformPciHostInforGuid
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase
+ gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase
+ gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+ gArmTokenSpaceGuid.PcdPciIoBase
+ gArmTokenSpaceGuid.PcdPciIoSize
+ gArmTokenSpaceGuid.PcdPciIoTranslation
+ gArmTokenSpaceGuid.PcdPciMmio32Base
+ gArmTokenSpaceGuid.PcdPciMmio32Size
+ gArmTokenSpaceGuid.PcdPciMmio32Translation
+ gArmTokenSpaceGuid.PcdPciMmio64Base
+ gArmTokenSpaceGuid.PcdPciMmio64Size
+
+[Pcd]
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/Silicon/Phytium/Include/PhytiumSystemServiceInterface.h b/Silicon/Phytium/Include/PhytiumSystemServiceInterface.h
new file mode 100644
index 000000000000..ddea33dbc275
--- /dev/null
+++ b/Silicon/Phytium/Include/PhytiumSystemServiceInterface.h
@@ -0,0 +1,112 @@
+/** @file
+
+ Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __OEMSVC_H_
+#define __OEMSVC_H_
+
+/* SMC function IDs for OEM Service queries */
+#define PHYTIUM_OEM_SVC_PSSI_VERSION 0x8200ff03
+#define PHYTIUM_OEM_SVC_PBF_VERSION 0x82000001
+#define PHYTIUM_OEM_SVC_CPU_VERSION 0xc2000002
+#define PHYTIUM_OEM_SVC_CPU_MAPS 0xc2000003
+#define PHYTIUM_OEM_SVC_CPU_CONF 0xc2000004
+#define PHYTIUM_OEM_SVC_MEM_REGIONS 0xc2000005
+#define PHYTIUM_OEM_SVC_MCU_DIMMS 0xc2000006
+#define PHYTIUM_OEM_SVC_PCI_CONTROLLER 0xc2000007
+#define PHYTIUM_OEM_SVC_HOST_BRIDGE 0xc2000008
+#define PHYTIUM_OEM_SVC_GET_FLASH_CMD 0xC200000C
+
+#define PHYTIUM_IOBASE_MASK 0xfffffff
+#define PHYTIUM_MEMIO32_MASK 0xffffffff
+#define PHYTIUM_MEMIO64_MASK 0xffffffffff
+
+#pragma pack(1)
+
+typedef struct {
+ UINT64 CpuMapCount;
+ UINT64 CpuMap[1];
+} PHYTIUM_CPU_MAP_INFOR;
+
+
+typedef struct {
+ UINT64 CpuFreq; // Hz
+ UINT64 CpuL3CacheSize; // Byte
+ UINT64 CpuL3CacheLineSize; // Byte
+} PHYTIUM_CPU_COURE_INFOR;
+
+typedef struct {
+ UINT64 CupVersion; //cpu version
+ PHYTIUM_CPU_COURE_INFOR CpuCoreInfo; //cpu core info
+ PHYTIUM_CPU_MAP_INFOR CpuMapInfo; //cpu map info
+}PHYTIUM_CPU_INFO;
+
+typedef struct {
+ UINT64 MemSize; // MB
+ UINT64 MemDramId;
+ UINT64 MemModuleId;
+ UINT64 MemSerial;
+ UINT64 MemSlotNumber;
+ UINT64 MemFeatures;
+} MCU_DIMM;
+
+#define MCU_DIMM_MAXCOUNT 2
+
+typedef struct {
+ UINT64 MemFreq; // MHz
+ UINT64 MemDimmCount;
+ MCU_DIMM McuDimm[1];
+} MCU_DIMMS;
+
+typedef struct {
+ UINT64 MemStart;
+ UINT64 MemSize;
+ UINT64 MemNodeId;
+} MEMORY_BLOCK;
+
+typedef struct {
+ UINT64 MemBlockCount;
+ MEMORY_BLOCK MemBlock[1];
+} MEMORY_INFOR;
+
+typedef struct {
+ UINT8 PciLane;
+ UINT8 PciSpeed;
+ UINT8 Reserved[6];
+} PCI_BLOCK;
+
+typedef struct {
+ UINT64 PciCount;
+ PCI_BLOCK PciBlock[1];
+} PHYTIUM_PCI_CONTROLLER;
+
+typedef struct {
+ UINT8 BusStart;
+ UINT8 BusEnd;
+ UINT8 Reserved[6];
+ UINT64 PciConfigBase;
+ UINT64 IoBase;
+ UINT64 IoSize;
+ UINT64 Mem32Base;
+ UINT64 Mem32Size;
+ UINT64 Mem64Base;
+ UINT64 Mem64Size;
+ UINT16 IntA;
+ UINT16 IntB;
+ UINT16 IntC;
+ UINT16 IntD;
+} PCI_HOST_BLOCK;
+
+typedef struct {
+ UINT64 PciHostCount;
+ PCI_HOST_BLOCK PciHostBlock[1];
+} PHYTIUM_PCI_HOST_BRIDGE;
+
+#pragma pack ()
+
+
+#endif /* __OEMSVC_H_ */
diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.c b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.c
new file mode 100644
index 000000000000..2affc9c131b9
--- /dev/null
+++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLib.c
@@ -0,0 +1,135 @@
+/** @file
+ Library for Phytium platform.
+
+ Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+ARM_CORE_INFO mPhytiumMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ }
+};
+
+/*
+ This function geted the current Boot Mode.
+
+ This function returns the boot reason on the platform.
+
+ @return Return the current Boot Mode of the platform.
+
+*/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+
+/**
+ Initialize controllers that must setup in the normal world.
+
+ This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
+ in the PEI phase.
+
+ @retval EFI_SUCCESS ArmPlatformInitialize() is executed successfully.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+
+/**
+ This function Inited the system (or sometimes called permanent) memory.
+
+ This memory is generally represented by the DRAM.
+
+ @param[in] None.
+
+ @retval None.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+ VOID
+ )
+{
+ // Nothing to do here
+}
+
+
+/**
+ This function geted the information of core.
+
+ @param[out] CoreCount The count of CoreInfoTable.
+ @param[out] ArmCoreTable The pointer of CoreInfoTable.
+
+ @retval EFI_SUCCESS PrePeiCoreGetMpCoreInfo() is executed successfully.
+
+**/
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ *CoreCount = PcdGet32 (PcdCoreCount);
+ *ArmCoreTable = mPhytiumMpCoreInfoTable;
+ return EFI_SUCCESS;
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =
+{
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &mArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+
+/**
+ This function geted the information of Ppitable.
+
+ @param[out] PpiListSize The size of Ppitable.
+ @param[out] PpiList The pointer of Ppitable.
+
+ @retval None.
+
+**/
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+}
diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLibMem.c b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLibMem.c
new file mode 100644
index 000000000000..ff70cb28a20a
--- /dev/null
+++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLibMem.c
@@ -0,0 +1,148 @@
+/** @file
+ Library of memory map for Phytium platform.
+
+ Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/ArmSmcLib.h>
+#include <PhytiumSystemServiceInterface.h>
+
+// Number of Virtual Memory Map Descriptors
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 32
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
+
+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+ Virtual Memory mapping. This array must be ended by a zero-filled
+ entry
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+ )
+{
+ ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
+ MEMORY_BLOCK *MemBlock = NULL;
+ MEMORY_INFOR *MemInfor = NULL;
+ ARM_SMC_ARGS ArmSmcArgs;
+ UINT32 MemBlockCnt = 0, Index, Index1;
+
+ CacheAttributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ ASSERT (VirtualMemoryMap != NULL);
+ VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
+ if (VirtualMemoryTable == NULL) {
+ return;
+ }
+
+ ResourceAttributes =
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_TESTED;
+
+ MemInfor = AllocatePages(1);
+ ASSERT(MemInfor != NULL);
+
+ ArmSmcArgs.Arg0 = PHYTIUM_OEM_SVC_MEM_REGIONS;
+ ArmSmcArgs.Arg1 = (UINTN)MemInfor;
+ ArmSmcArgs.Arg2 = EFI_PAGE_SIZE;
+ ArmCallSmc (&ArmSmcArgs);
+ if (ArmSmcArgs.Arg0 == 0) {
+ MemBlockCnt = MemInfor->MemBlockCount;
+ MemBlock = MemInfor->MemBlock;
+ } else {
+ ASSERT(FALSE);
+ }
+
+ //Soc Io Space
+ VirtualMemoryTable[Index].PhysicalBase = PcdGet64 (PcdSystemIoBase);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemIoBase);
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemIoSize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ //
+ // PCI Configuration Space
+ //
+ VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciConfigBase);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciConfigBase);
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciConfigSize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ //
+ // PCI Memory Space
+ //
+ VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciIoBase) + PcdGet64(PcdPciIoTranslation);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciIoBase) + PcdGet64(PcdPciIoTranslation);
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciIoSize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ //
+ // PCI Memory Space
+ //
+ VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdPciMmio32Base);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdPciMmio32Base);
+ VirtualMemoryTable[Index].Length = PcdGet32 (PcdPciMmio32Size);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ //
+ // 64-bit PCI Memory Space
+ //
+ VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciMmio64Base);
+ VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciMmio64Base);
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciMmio64Size);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ //DDR
+ for (Index1 = 0; Index1 < MemBlockCnt; Index1++) {
+ VirtualMemoryTable[++Index].PhysicalBase = MemBlock->MemStart;
+ VirtualMemoryTable[Index].VirtualBase = MemBlock->MemStart;
+ VirtualMemoryTable[Index].Length = MemBlock->MemSize;
+ VirtualMemoryTable[Index].Attributes = CacheAttributes;
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ MemBlock->MemStart,
+ MemBlock->MemSize);
+
+ MemBlock ++;
+ }
+
+ // End of Table
+ VirtualMemoryTable[++Index].PhysicalBase = 0;
+ VirtualMemoryTable[Index].VirtualBase = 0;
+ VirtualMemoryTable[Index].Length = 0;
+ VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ for (Index1 = 0; Index1 < Index; Index1++) {
+ DEBUG((DEBUG_ERROR, "PhysicalBase %12lx VirtualBase %12lx Length %12lx Attributes %12lx\n", VirtualMemoryTable[Index1].PhysicalBase,\
+ VirtualMemoryTable[Index1].VirtualBase, VirtualMemoryTable[Index1].Length, VirtualMemoryTable[Index1].Attributes));
+ }
+
+ *VirtualMemoryMap = VirtualMemoryTable;
+}
diff --git a/Maintainers.txt b/Maintainers.txt
index 56e16fc48cb4..a23dab394a61 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -310,3 +310,10 @@ F: Silicon/SiFive/
M: Abner Chang <abner.chang at hpe.com>
M: Gilbert Chen <gilbert.chen at hpe.com>
R: Daniel Schaefer <daniel.schaefer at hpe.com>
+
+Phytium platforms and silicon
+F: Platform/Phytium/
+F: Silicon/silicon/
+M: Peng Xie <xiepeng at phytium.com.cn>
+M: Ling Jia <jialing at phytium.com.cn>
+R: Yiqi Shu <shuyiqi at phytium.com.cn>
diff --git a/Silicon/Phytium/Phytium.fdf.inc b/Silicon/Phytium/Phytium.fdf.inc
new file mode 100644
index 000000000000..641266c6012f
--- /dev/null
+++ b/Silicon/Phytium/Phytium.fdf.inc
@@ -0,0 +1,119 @@
+## @file
+# This package provides common open source Phytium silicon modules.
+#
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+#
+# SPDX-License-Identifier:BSD-2-Clause-Patent
+#
+##
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+# FILE DRIVER = $(NAMED_GUID) {
+# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+# COMPRESS PI_STD {
+# GUIDED {
+# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+# UI STRING="$(MODULE_NAME)" Optional
+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+# }
+# }
+# }
+#
+############################################################################
+
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) FIXED {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) FIXED {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+ FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ UI STRING ="$(MODULE_NAME)" Optional
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.BIOSINFO]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW BIN Align = 16 $(INF_OUTPUT)/$(MODULE_NAME).acpi
+ }
+
+[Rule.Common.UEFI_APPLICATION.UI]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="Enter Setup"
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ACPI |.acpi
+ RAW ASL |.aml
+ }
diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/PhytiumPlatformHelper.S b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/PhytiumPlatformHelper.S
new file mode 100644
index 000000000000..cce23b786197
--- /dev/null
+++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/PhytiumPlatformHelper.S
@@ -0,0 +1,76 @@
+#
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+
+#include <AsmMacroIoLibV8.h>
+#include <Base.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <AutoGen.h>
+
+.text
+.align 2
+
+GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
+GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
+
+PrimaryCoreMpid: .word 0x0
+
+
+ASM_PFX(ArmPlatformPeiBootAction):
+ // Save MPIDR_EL1[23:0] in a variable.
+ mov x20, x30
+ bl ASM_PFX(ArmReadMpidr)
+ lsl w0, w0, #8
+ lsr w0, w0, #8
+ ldr x1, =PrimaryCoreMpid
+ str w0, [x1]
+ ret x20
+
+//UINTN
+//ArmPlatformGetPrimaryCoreMpId (
+// VOID
+// );
+ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
+ ldr x0, =PrimaryCoreMpid
+ ldr w0, [x0]
+ ret
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ mov x20, x30
+ bl ASM_PFX(ArmReadMpidr)
+ lsl w0, w0, #8
+ lsr w0, w0, #8
+ ldr x1, =PrimaryCoreMpid
+ ldr w1, [x1]
+ cmp w0, w1
+ cset x0, eq
+ ret x20
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+// With this function: CorePos = (ClusterId * 4) + CoreId
+ASM_PFX(ArmPlatformGetCorePosition):
+ and x1, x0, #ARM_CORE_MASK
+ and x0, x0, #ARM_CLUSTER_MASK
+ add x0, x1, x0, LSR #6
+ ret
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
--
2.25.1
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