[edk2-devel] [edk2-platforms] [PATCH V1 00/17] Add IceLake-SP and CooperLake Support to MinPlatform
Michael D Kinney
michael.d.kinney at intel.com
Wed Jul 14 02:03:44 UTC 2021
Acked-by: Michael D Kinney <michael.d.kinney at intel.com>
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone at intel.com>
> Sent: Monday, July 12, 2021 5:41 PM
> To: devel at edk2.groups.io
> Cc: Oram, Isaac W <isaac.w.oram at intel.com>; Abbas, Mohamed <mohamed.abbas at intel.com>; Chiu, Chasel
> <chasel.chiu at intel.com>; Kinney, Michael D <michael.d.kinney at intel.com>; Liming Gao <gaoliming at byosoft.com.cn>; Dong, Eric
> <eric.dong at intel.com>; Michael Kubacki <Michael.Kubacki at microsoft.com>
> Subject: [edk2-platforms] [PATCH V1 00/17] Add IceLake-SP and CooperLake Support to MinPlatform
>
> This patch series adds WhitleyOpenBoardPkg and WhitleySiliconPkg
> to edk2-platforms. These platforms along with the corresponding
> FSP and microcode binaries support the 3rd Generation Xeon
> Scalable processors formerly known as IceLake-SP and CooperLake.
>
> There are still some issues to be worked out. WhitleySiliconPkg
> has multiple DEC files that need to be mered together. And the
> WhitleyOpenBoardPkg DSC files need to be adjusted to conform to
> the MinPlatform *OpenBoardPkg guidelines. Additionally, there
> are non-standard build flags that replicate functionality
> provided by already existing FixedAtBuild PCDs. For example,
> FSP_MODE instead of PcdFspModeSelection. These issues will
> be addressed in future patch series.
>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
> Co-authored-by: Isaac Oram <isaac.w.oram at intel.com>
> Co-authored-by: Mohamed Abbas <mohamed.abbas at intel.com>
> Cc: Chasel Chiu <chasel.chiu at intel.com>
> Cc: Michael D Kinney <michael.d.kinney at intel.com>
> Cc: Isaac Oram <isaac.w.oram at intel.com>
> Cc: Mohamed Abbas <mohamed.abbas at intel.com>
> Cc: Liming Gao <gaoliming at byosoft.com.cn>
> Cc: Eric Dong <eric.dong at intel.com>
> Cc: Michael Kubacki <Michael.Kubacki at microsoft.com>
>
> Nate DeSimone (17):
> WhitleySiliconPkg: Add DEC and DSC files
> WhitleySiliconPkg: Add Includes and Libraries
> WhitleySiliconPkg: Add Cpu Includes
> WhitleySiliconPkg: Add Me Includes
> WhitleySiliconPkg: Add PCH Register Includes
> WhitleySiliconPkg: Add PCH Includes
> WhitleySiliconPkg: Add PCH Libraries
> WhitleySiliconPkg: Add Security Includes
> WhitleySiliconPkg: Add SiliconPolicyInit
> WhitleyOpenBoardPkg: Add Includes and Libraries
> WhitleyOpenBoardPkg: Add Platform Modules
> WhitleyOpenBoardPkg: Add Feature Modules
> WhitleyOpenBoardPkg: Add UBA Modules
> WhitleyOpenBoardPkg: Add build scripts and package metadata
> Platform/Intel: Add WhitleyOpenBoardPkg to build_bios.py
> Readme.md: Add WhitleyOpenBoardPkg
> Maintainers.txt: Add WhitleyOpenBoardPkg and WhitleySiliconPkg
>
> Maintainers.txt | 12 +
> Platform/Intel/Readme.md | 14 +
> .../WhitleyOpenBoardPkg/BiosInfo/BiosInfo.c | 104 +
> .../WhitleyOpenBoardPkg/BiosInfo/BiosInfo.h | 67 +
> .../WhitleyOpenBoardPkg/BiosInfo/BiosInfo.inf | 70 +
> .../CooperCityRvp/build_board.py | 111 +
> .../CooperCityRvp/build_config.cfg | 36 +
> .../Dxe/PlatformCpuPolicy/PlatformCpuPolicy.c | 704 ++
> .../PlatformCpuPolicy/PlatformCpuPolicy.inf | 81 +
> .../WhitleyOpenBoardPkg/DynamicExPcd.dsc | 19 +
> .../Pci/Dxe/PciHostBridge/PciHostBridge.c | 1634 ++++
> .../Pci/Dxe/PciHostBridge/PciHostBridge.h | 300 +
> .../Pci/Dxe/PciHostBridge/PciHostBridge.inf | 69 +
> .../Dxe/PciHostBridge/PciHostBridgeSupport.c | 127 +
> .../Pci/Dxe/PciHostBridge/PciHostResource.h | 62 +
> .../Pci/Dxe/PciHostBridge/PciRebalance.c | 1356 +++
> .../Pci/Dxe/PciHostBridge/PciRebalance.h | 158 +
> .../Pci/Dxe/PciHostBridge/PciRebalanceIo.c | 218 +
> .../Dxe/PciHostBridge/PciRebalanceMmio32.c | 163 +
> .../Dxe/PciHostBridge/PciRebalanceMmio64.c | 204 +
> .../Pci/Dxe/PciHostBridge/PciRootBridge.h | 573 ++
> .../Pci/Dxe/PciHostBridge/PciRootBridgeIo.c | 1664 ++++
> .../Dxe/PciPlatform/PciIovPlatformPolicy.c | 99 +
> .../Dxe/PciPlatform/PciIovPlatformPolicy.h | 53 +
> .../Pci/Dxe/PciPlatform/PciPlatform.c | 541 ++
> .../Pci/Dxe/PciPlatform/PciPlatform.h | 209 +
> .../Pci/Dxe/PciPlatform/PciPlatform.inf | 87 +
> .../Pci/Dxe/PciPlatform/PciPlatformHooks.c | 939 ++
> .../Pci/Dxe/PciPlatform/PciPlatformHooks.h | 31 +
> .../Pci/Dxe/PciPlatform/PciSupportLib.c | 108 +
> .../Pci/Dxe/PciPlatform/PciSupportLib.h | 46 +
> .../Pei/PlatformVariableInitPei.c | 274 +
> .../Pei/PlatformVariableInitPei.h | 41 +
> .../Pei/PlatformVariableInitPei.inf | 58 +
> .../WhitleyOpenBoardPkg/FspFlashOffsets.fdf | 21 +
> .../Include/Dsc/CoreDxeInclude.dsc | 135 +
> ...blePerformanceMonitoringInfrastructure.dsc | 40 +
> .../Include/Dsc/EnableRichDebugMessages.dsc | 50 +
> .../Include/Fdf/CommonNvStorageFtwWorking.fdf | 20 +
> .../Include/Fdf/CommonSpiFvHeaderInfo.fdf | 24 +
> ...anceMonitoringInfrastructurePostMemory.fdf | 14 +
> ...manceMonitoringInfrastructurePreMemory.fdf | 11 +
> .../Include/Fdf/NvStorage512K.fdf | 46 +
> .../Include/GpioInitData.h | 26 +
> .../Include/Guid/PlatformVariableCommon.h | 33 +
> .../Include/Guid/SetupVariable.h | 720 ++
> .../Include/Guid/UbaCfgHob.h | 74 +
> .../WhitleyOpenBoardPkg/Include/IoApic.h | 23 +
> .../Include/Library/MultiPlatSupportLib.h | 67 +
> .../Include/Library/PeiPlatformHooklib.h | 17 +
> .../Include/Library/PlatformClocksLib.h | 87 +
> .../Include/Library/PlatformOpromPolicyLib.h | 83 +
> .../Library/PlatformSetupVariableSyncLib.h | 60 +
> .../Include/Library/PlatformVariableHookLib.h | 47 +
> .../Include/Library/ReadFfsLib.h | 58 +
> .../Include/Library/SetupLib.h | 134 +
> .../Include/Library/UbaAcpiUpdateLib.h | 38 +
> .../Include/Library/UbaBoardSioInfoLib.h | 47 +
> .../Include/Library/UbaClkGenUpdateLib.h | 49 +
> .../Include/Library/UbaClocksConfigLib.h | 51 +
> .../Include/Library/UbaGpioInitLib.h | 26 +
> .../Include/Library/UbaGpioPlatformConfig.h | 259 +
> .../Include/Library/UbaGpioUpdateLib.h | 51 +
> .../Library/UbaHsioPtssTableConfigLib.h | 52 +
> .../Include/Library/UbaIioConfigLib.h | 227 +
> .../Library/UbaIioPortBifurcationInitLib.h | 47 +
> .../Include/Library/UbaOpromUpdateLib.h | 115 +
> .../Include/Library/UbaPcdUpdateLib.h | 44 +
> .../Include/Library/UbaPchEarlyUpdateLib.h | 63 +
> .../Library/UbaPcieBifurcationUpdateLib.h | 130 +
> .../Include/Library/UbaPlatLib.h | 25 +
> .../Include/Library/UbaSlotUpdateLib.h | 124 +
> .../Include/Library/UbaSoftStrapUpdateLib.h | 57 +
> .../Include/Library/UbaSystemBoardInfoLib.h | 36 +
> .../Library/UbaSystemConfigUpdateLib.h | 42 +
> .../Include/Library/UbaUsbOcUpdateLib.h | 51 +
> .../Include/OnboardNicStructs.h | 98 +
> .../Include/PchSetupVariable.h | 10 +
> .../Include/PchSetupVariableLbg.h | 372 +
> .../WhitleyOpenBoardPkg/Include/PlatDevData.h | 183 +
> .../Include/PlatPirqData.h | 36 +
> .../Include/Ppi/ExReportStatusCodeHandler.h | 38 +
> .../Include/Ppi/SmbusPolicy.h | 29 +
> .../Include/Ppi/UbaCfgDb.h | 144 +
> .../Include/Protocol/LegacyBios.h | 1550 +++
> .../Include/Protocol/LegacyBiosPlatform.h | 752 ++
> .../Include/Protocol/PciIovPlatform.h | 72 +
> .../Include/Protocol/PlatformType.h | 48 +
> .../Include/Protocol/UbaCfgDb.h | 114 +
> .../Include/Protocol/UbaDevsUpdateProtocol.h | 86 +
> .../Include/Protocol/UbaMakerProtocol.h | 22 +
> .../WhitleyOpenBoardPkg/Include/SetupTable.h | 25 +
> .../WhitleyOpenBoardPkg/Include/SioRegs.h | 251 +
> .../WhitleyOpenBoardPkg/Include/SystemBoard.h | 75 +
> .../WhitleyOpenBoardPkg/Include/UbaKti.h | 29 +
> .../BoardAcpiLib/DxeBoardAcpiTableLib.c | 37 +
> .../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 44 +
> .../BoardAcpiLib/DxeMtOlympusAcpiTableLib.c | 54 +
> .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 51 +
> .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 48 +
> .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 138 +
> .../Library/BoardInitLib/BoardInitDxeLib.c | 299 +
> .../Library/BoardInitLib/BoardInitDxeLib.inf | 72 +
> .../Library/BoardInitLib/BoardInitDxeLib.uni | 29 +
> .../Library/BoardInitLib/BoardInitPreMemLib.c | 450 +
> .../BoardInitLib/BoardInitPreMemLib.inf | 66 +
> .../MultiPlatSupportLib/MultiPlatSupport.h | 48 +
> .../MultiPlatSupportLib/MultiPlatSupportLib.c | 255 +
> .../MultiPlatSupportLib.inf | 49 +
> .../FspWrapperHobProcessLib.c | 722 ++
> .../PeiFspWrapperHobProcessLib.inf | 99 +
> .../PeiPlatformHookLib/PeiPlatformHooklib.c | 43 +
> .../PeiPlatformHookLib/PeiPlatformHooklib.inf | 34 +
> .../Library/PeiReportFvLib/PeiReportFvLib.c | 270 +
> .../Library/PeiReportFvLib/PeiReportFvLib.inf | 65 +
> .../PeiUbaGpioPlatformConfigLib.c | 518 +
> .../Library/PeiUbaPlatLib/PeiUbaPlatLib.inf | 60 +
> .../PeiUbaPlatLib/PeiUbaUsbOcUpdateLib.c | 61 +
> .../PeiUbaPlatLib/UbaBoardSioInfoLib.c | 54 +
> .../PeiUbaPlatLib/UbaClkGenUpdateLib.c | 134 +
> .../PeiUbaPlatLib/UbaClocksConfigLib.c | 59 +
> .../Library/PeiUbaPlatLib/UbaGpioUpdateLib.c | 68 +
> .../PeiUbaPlatLib/UbaHsioPtssTableConfigLib.c | 58 +
> .../PeiUbaPlatLib/UbaIioConfigLibPei.c | 219 +
> .../UbaIioPortBifurcationInitLib.c | 55 +
> .../Library/PeiUbaPlatLib/UbaPcdUpdateLib.c | 69 +
> .../PeiUbaPlatLib/UbaPchEarlyUpdateLib.c | 108 +
> .../PeiUbaPlatLib/UbaPchPcieBifurcationLib.c | 57 +
> .../PeiUbaPlatLib/UbaSlotUpdateLibPei.c | 156 +
> .../PeiUbaPlatLib/UbaSoftStrapUpdateLib.c | 95 +
> .../PlatformClocksLib/Pei/PlatformClocksLib.c | 347 +
> .../Pei/PlatformClocksLib.inf | 40 +
> .../PlatformCmosAccessLib.c | 73 +
> .../PlatformCmosAccessLib.inf | 45 +
> .../Library/PlatformHooksLib/PlatformHooks.c | 203 +
> .../PlatformHooksLib/PlatformHooksLib.inf | 28 +
> .../PlatformOpromPolicyLibNull.c | 88 +
> .../PlatformOpromPolicyLibNull.inf | 29 +
> .../PlatformSetupVariableSyncLibNull.c | 81 +
> .../PlatformSetupVariableSyncLibNull.inf | 28 +
> .../PlatformVariableHookLibNull.c | 55 +
> .../PlatformVariableHookLibNull.inf | 24 +
> .../Library/ReadFfsLib/ReadFfsLib.c | 446 +
> .../Library/ReadFfsLib/ReadFfsLib.inf | 34 +
> .../Library/SerialPortLib/Ns16550.h | 46 +
> .../Library/SerialPortLib/SerialPortLib.c | 1023 ++
> .../Library/SerialPortLib/SerialPortLib.inf | 55 +
> .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c | 867 ++
> .../SetCacheMtrrLib/SetCacheMtrrLib.inf | 55 +
> .../PchPolicyUpdateUsb.c | 152 +
> .../SiliconPolicyUpdateLib.c | 778 ++
> .../SiliconPolicyUpdateLib.inf | 64 +
> .../SiliconPolicyUpdateLibFsp.c | 770 ++
> .../SiliconPolicyUpdateLibFsp.inf | 68 +
> .../SmmSpiFlashCommonLib.inf | 57 +
> .../SmmSpiFlashCommonLib/SpiFlashCommon.c | 237 +
> .../SpiFlashCommonSmmLib.c | 55 +
> .../DxeTcg2PhysicalPresenceLib.c | 41 +
> .../DxeTcg2PhysicalPresenceLib.inf | 29 +
> .../Library/UbaGpioInitLib/UbaGpioInitLib.c | 145 +
> .../Library/UbaGpioInitLib/UbaGpioInitLib.inf | 46 +
> .../Dxe/PlatformType/PlatformType.inf | 58 +
> .../Platform/Dxe/PlatformType/PlatformTypes.c | 364 +
> .../Platform/Dxe/PlatformType/PlatformTypes.h | 58 +
> .../Platform/Dxe/S3NvramSave/S3NvramSave.c | 157 +
> .../Platform/Dxe/S3NvramSave/S3NvramSave.h | 40 +
> .../Platform/Dxe/S3NvramSave/S3NvramSave.inf | 52 +
> .../Platform/Pei/DummyPchSpi/DummyPchSpi.inf | 43 +
> .../Platform/Pei/DummyPchSpi/PchSpi.c | 383 +
> .../EmulationPlatformInit.c | 124 +
> .../EmulationPlatformInit.inf | 46 +
> .../Platform/Pei/PlatformInfo/PlatformInfo.c | 761 ++
> .../Platform/Pei/PlatformInfo/PlatformInfo.h | 89 +
> .../Pei/PlatformInfo/PlatformInfo.inf | 63 +
> .../Intel/WhitleyOpenBoardPkg/PlatformPkg.dec | 781 ++
> .../Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc | 931 ++
> .../Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf | 827 ++
> .../WhitleyOpenBoardPkg/PlatformPkgConfig.dsc | 45 +
> .../WhitleyOpenBoardPkg/StructurePcd.dsc | 8553 +++++++++++++++++
> .../WhitleyOpenBoardPkg/StructurePcdCpx.dsc | 3796 ++++++++
> .../Uba/BoardInit/Dxe/BoardInitDxe.c | 87 +
> .../Uba/BoardInit/Dxe/BoardInitDxe.h | 30 +
> .../Uba/BoardInit/Dxe/BoardInitDxe.inf | 70 +
> .../Uba/BoardInit/Pei/BoardInitPei.c | 48 +
> .../Uba/BoardInit/Pei/BoardInitPei.h | 20 +
> .../Uba/BoardInit/Pei/BoardInitPei.inf | 55 +
> .../Uba/CfgDb/Dxe/CfgDbDxe.c | 518 +
> .../Uba/CfgDb/Dxe/CfgDbDxe.h | 32 +
> .../Uba/CfgDb/Dxe/CfgDbDxe.inf | 54 +
> .../Uba/CfgDb/Pei/CfgDbPei.c | 803 ++
> .../Uba/CfgDb/Pei/CfgDbPei.h | 33 +
> .../Uba/CfgDb/Pei/CfgDbPei.inf | 54 +
> .../WhitleyOpenBoardPkg/Uba/UbaCommon.dsc | 29 +
> .../WhitleyOpenBoardPkg/Uba/UbaDxeCommon.fdf | 16 +
> .../Uba/UbaDxeRpBoards.fdf | 22 +
> .../SystemBoardInfoDxe/SystemBoardInfoDxe.c | 206 +
> .../SystemBoardInfoDxe/SystemBoardInfoDxe.h | 33 +
> .../SystemBoardInfoDxe/SystemBoardInfoDxe.inf | 45 +
> .../SystemConfigUpdateDxe.c | 94 +
> .../SystemConfigUpdateDxe.h | 30 +
> .../SystemConfigUpdateDxe.inf | 48 +
> .../Uba/UbaMain/Common/Pei/BoardInfo.c | 69 +
> .../Uba/UbaMain/Common/Pei/Clockgen.c | 27 +
> .../Uba/UbaMain/Common/Pei/ClocksConfig.c | 177 +
> .../UbaMain/Common/Pei/GpioPlatformConfig.c | 166 +
> .../UbaMain/Common/Pei/HsioPtssTableConfig.c | 460 +
> .../Common/Pei/IioBifurcationSlotTable.h | 156 +
> .../UbaMain/Common/Pei/IioPortBifurcation.c | 913 ++
> .../Common/Pei/IioPortBifurcationVer1.c | 1356 +++
> .../UbaMain/Common/Pei/PchHsioPtssTables.h | 51 +
> .../Common/Pei/PchLbgHsioPtssTablesBx.c | 44 +
> .../Common/Pei/PchLbgHsioPtssTablesBx.h | 18 +
> .../Common/Pei/PchLbgHsioPtssTablesBx_Ext.c | 44 +
> .../Common/Pei/PchLbgHsioPtssTablesBx_Ext.h | 20 +
> .../Common/Pei/PchLbgHsioPtssTablesSx.c | 27 +
> .../Common/Pei/PchLbgHsioPtssTablesSx.h | 21 +
> .../Common/Pei/PchLbgHsioPtssTablesSx_Ext.c | 44 +
> .../Common/Pei/PchLbgHsioPtssTablesSx_Ext.h | 21 +
> .../Common/Pei/PeiCommonBoardInitLib.c | 75 +
> .../Common/Pei/PeiCommonBoardInitLib.h | 55 +
> .../Common/Pei/PeiCommonBoardInitLib.inf | 76 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c | 107 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h | 161 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf | 48 +
> .../Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c | 108 +
> .../Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h | 57 +
> .../SlotDataUpdateDxe/SlotDataUpdateDxe.inf | 48 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c | 124 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h | 27 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf | 44 +
> .../TypeCooperCityRP/Pei/AcpiTablePcds.c | 51 +
> .../UbaMain/TypeCooperCityRP/Pei/GpioTable.c | 297 +
> .../TypeCooperCityRP/Pei/IioBifurInit.c | 393 +
> .../UbaMain/TypeCooperCityRP/Pei/KtiEparam.c | 241 +
> .../UbaMain/TypeCooperCityRP/Pei/PcdData.c | 259 +
> .../TypeCooperCityRP/Pei/PchEarlyUpdate.c | 81 +
> .../TypeCooperCityRP/Pei/PeiBoardInit.h | 96 +
> .../TypeCooperCityRP/Pei/PeiBoardInitLib.c | 224 +
> .../TypeCooperCityRP/Pei/PeiBoardInitLib.inf | 163 +
> .../UbaMain/TypeCooperCityRP/Pei/SlotTable.c | 164 +
> .../TypeCooperCityRP/Pei/SoftStrapFixup.c | 110 +
> .../Uba/UbaMain/TypeCooperCityRP/Pei/UsbOC.c | 123 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c | 99 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h | 118 +
> .../Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf | 47 +
> .../Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c | 115 +
> .../Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h | 57 +
> .../SlotDataUpdateDxe/SlotDataUpdateDxe.inf | 47 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c | 127 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h | 27 +
> .../Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf | 44 +
> .../TypeWilsonCityRP/Pei/AcpiTablePcds.c | 53 +
> .../UbaMain/TypeWilsonCityRP/Pei/GpioTable.c | 287 +
> .../TypeWilsonCityRP/Pei/IioBifurInit.c | 387 +
> .../UbaMain/TypeWilsonCityRP/Pei/KtiEparam.c | 107 +
> .../UbaMain/TypeWilsonCityRP/Pei/PcdData.c | 274 +
> .../TypeWilsonCityRP/Pei/PchEarlyUpdate.c | 92 +
> .../TypeWilsonCityRP/Pei/PeiBoardInit.h | 77 +
> .../TypeWilsonCityRP/Pei/PeiBoardInitLib.c | 156 +
> .../TypeWilsonCityRP/Pei/PeiBoardInitLib.inf | 166 +
> .../UbaMain/TypeWilsonCityRP/Pei/SlotTable.c | 171 +
> .../TypeWilsonCityRP/Pei/SoftStrapFixup.c | 120 +
> .../Uba/UbaMain/TypeWilsonCityRP/Pei/UsbOC.c | 126 +
> .../Intel/WhitleyOpenBoardPkg/Uba/UbaPei.fdf | 24 +
> .../WhitleyOpenBoardPkg/Uba/UbaRpBoards.dsc | 44 +
> .../Uba/UbaUpdatePcds/Pei/UpdatePcdsPei.c | 43 +
> .../Uba/UbaUpdatePcds/Pei/UpdatePcdsPei.h | 20 +
> .../Uba/UbaUpdatePcds/Pei/UpdatePcdsPei.inf | 50 +
> .../ExSerialStatusCodeWorker.c | 194 +
> .../ExStatusCodeHandlerPei.c | 111 +
> .../ExStatusCodeHandlerPei.h | 85 +
> .../ExStatusCodeHandlerPei.inf | 61 +
> .../ExReportStatusCodeRouterPei.c | 301 +
> .../ExReportStatusCodeRouterPei.h | 104 +
> .../ExReportStatusCodeRouterPei.inf | 51 +
> .../PeiInterposerToSvidMap.c | 136 +
> .../PeiInterposerToSvidMap.inf | 53 +
> .../WilsonCityRvp/build_board.py | 111 +
> .../WilsonCityRvp/build_config.cfg | 36 +
> Platform/Intel/build.cfg | 2 +
> Platform/Intel/build_bios.py | 28 +-
> Readme.md | 2 +
> Silicon/Intel/WhitleySiliconPkg/CpRcPkg.dec | 541 ++
> .../Intel/WhitleySiliconPkg/Cpu/CpuRcPkg.dec | 101 +
> .../Cpu/Include/CpuDataStruct.h | 27 +
> .../Cpu/Include/CpuPolicyPeiDxeCommon.h | 58 +
> .../Cpu/Include/Guid/CpuNvramData.h | 34 +
> .../Cpu/Include/Library/CpuConfigLib.h | 30 +
> .../Cpu/Include/Library/CpuEarlyDataLib.h | 41 +
> .../Cpu/Include/Library/CpuPpmLib.h | 16 +
> .../Cpu/Include/PpmPolicyPeiDxeCommon.h | 320 +
> .../Cpu/Include/ProcessorPpmSetup.h | 14 +
> .../Cpu/Include/Protocol/CpuPolicyProtocol.h | 31 +
> .../Cpu/Include/Protocol/PpmPolicyProtocol.h | 16 +
> .../Include/BackCompatible.h | 19 +
> .../Include/ConfigBlock/TraceHubConfig.h | 65 +
> .../Include/ConfigBlock/Usb2PhyConfig.h | 63 +
> .../Include/ConfigBlock/UsbConfig.h | 85 +
> .../WhitleySiliconPkg/Include/Cpu/CpuIds.h | 18 +
> .../Include/CpuAndRevisionDefines.h | 283 +
> .../Include/EmulationConfiguration.h | 22 +
> .../Intel/WhitleySiliconPkg/Include/Fpga.h | 17 +
> .../WhitleySiliconPkg/Include/GpioConfig.h | 288 +
> .../Include/Guid/EmulationDfxVariable.h | 25 +
> .../Include/Guid/FpgaSocketVariable.h | 39 +
> .../Include/Guid/MemBootHealthGuid.h | 71 +
> .../Include/Guid/MemoryMapData.h | 197 +
> .../Include/Guid/PartialMirrorGuid.h | 61 +
> .../Include/Guid/PlatformInfo.h | 150 +
> .../Guid/SiliconPolicyInitLibInterface.h | 78 +
> .../Include/Guid/SocketCommonRcVariable.h | 57 +
> .../Include/Guid/SocketIioVariable.h | 444 +
> .../Include/Guid/SocketMemoryVariable.h | 477 +
> .../Include/Guid/SocketMpLinkVariable.h | 320 +
> .../Include/Guid/SocketPciResourceData.h | 60 +
> .../Guid/SocketPowermanagementVariable.h | 300 +
> .../Guid/SocketProcessorCoreVariable.h | 143 +
> .../Include/Guid/SocketVariable.h | 36 +
> .../Include/Guid/StatusCodeDataTypeExDebug.h | 50 +
> .../WhitleySiliconPkg/Include/IioConfig.h | 398 +
> .../Include/IioPlatformData.h | 204 +
> .../Intel/WhitleySiliconPkg/Include/IioRegs.h | 179 +
> .../Include/IioSetupDefinitions.h | 60 +
> .../Include/IioUniversalData.h | 166 +
> .../WhitleySiliconPkg/Include/ImonVrSvid.h | 26 +
> .../Include/KtiSetupDefinitions.h | 22 +
> .../Include/Library/CompressedVariableLib.h | 35 +
> .../Library/EmulationConfigurationLib.h | 34 +
> .../Include/Library/MemTypeLib.h | 32 +
> .../Include/Library/MemVrSvidMapLib.h | 66 +
> .../Include/Library/PchInfoLib.h | 22 +
> .../Include/Library/PlatformHooksLib.h | 17 +
> .../Include/Library/SemaphoreLib.h | 326 +
> .../Intel/WhitleySiliconPkg/Include/MaxCore.h | 20 +
> .../WhitleySiliconPkg/Include/MaxSocket.h | 20 +
> .../WhitleySiliconPkg/Include/MaxThread.h | 20 +
> .../WhitleySiliconPkg/Include/MemCommon.h | 41 +
> .../Include/Memory/Ddr4SpdRegisters.h | 38 +
> .../Include/Memory/ProcSmbChipCommon.h | 28 +
> .../WhitleySiliconPkg/Include/Platform.h | 266 +
> .../Include/PlatformInfoTypes.h | 106 +
> .../Include/Ppi/DynamicSiLibraryPpi.h | 474 +
> .../Include/Ppi/MemoryPolicyPpi.h | 2112 ++++
> .../Include/Ppi/RasImcS3Data.h | 53 +
> .../Include/Ppi/UpiPolicyPpi.h | 39 +
> .../Protocol/DynamicSiLibraryProtocol.h | 252 +
> .../Protocol/DynamicSiLibrarySmmProtocol.h | 60 +
> .../Include/Protocol/GlobalNvsArea.h | 212 +
> .../Include/Protocol/IioUds.h | 47 +
> .../Include/Protocol/PciCallback.h | 85 +
> .../WhitleySiliconPkg/Include/RcVersion.h | 23 +
> .../Include/ScratchpadList.h | 49 +
> .../Include/SiliconUpdUpdate.h | 53 +
> .../WhitleySiliconPkg/Include/SystemInfoVar.h | 93 +
> .../Include/UncoreCommonIncludes.h | 111 +
> .../WhitleySiliconPkg/Include/Upi/KtiDisc.h | 36 +
> .../WhitleySiliconPkg/Include/Upi/KtiHost.h | 304 +
> .../WhitleySiliconPkg/Include/Upi/KtiSi.h | 32 +
> .../Include/UsraAccessType.h | 291 +
> .../Core/Include/DataTypes.h | 36 +
> .../BaseMemoryCoreLib/Core/Include/MemHost.h | 1051 ++
> .../Core/Include/MemHostChipCommon.h | 190 +
> .../BaseMemoryCoreLib/Core/Include/MemRegs.h | 25 +
> .../Core/Include/MrcCommonTypes.h | 28 +
> .../Core/Include/NGNDimmPlatformCfgData.h | 22 +
> .../BaseMemoryCoreLib/Core/Include/SysHost.h | 193 +
> .../Core/Include/SysHostChipCommon.h | 101 +
> .../BaseMemoryCoreLib/Platform/MemDefaults.h | 28 +
> .../BaseMemoryCoreLib/Platform/PlatformHost.h | 35 +
> .../FspWrapperPlatformLib.c | 243 +
> .../FspWrapperPlatformLib.inf | 71 +
> .../Library/SetupLib/PeiSetupLib.c | 259 +
> .../Library/SetupLib/PeiSetupLib.inf | 55 +
> .../Library/SetupLib/SetupLib.c | 253 +
> .../Library/SetupLib/SetupLib.inf | 59 +
> .../Library/SetupLib/SetupLibNull.c | 159 +
> .../Library/SetupLib/SetupLibNull.inf | 46 +
> .../SiliconPolicyInitLibShim.c | 104 +
> .../SiliconPolicyInitLibShim.inf | 38 +
> .../SiliconWorkaroundLibNull.c | 38 +
> .../SiliconWorkaroundLibNull.inf | 50 +
> .../Me/MeSps.4/Include/Library/SpsPeiLib.h | 22 +
> .../WhitleySiliconPkg/MrcCommonConfig.dsc | 71 +
> .../SouthClusterLbg/Include/GpioPinsSklH.h | 300 +
> .../SouthClusterLbg/Include/Library/GpioLib.h | 1016 ++
> .../Include/Library/PchMultiPchBase.h | 37 +
> .../Include/Library/PchPcieRpLib.h | 145 +
> .../Pch/SouthClusterLbg/Include/PchAccess.h | 629 ++
> .../Pch/SouthClusterLbg/Include/PchLimits.h | 108 +
> .../SouthClusterLbg/Include/PchPolicyCommon.h | 2161 +++++
> .../Include/PchReservedResources.h | 82 +
> .../Pch/SouthClusterLbg/Include/PcieRegs.h | 288 +
> .../Include/Ppi/PchHsioPtssTable.h | 31 +
> .../Include/Ppi/PchPcieDeviceTable.h | 126 +
> .../SouthClusterLbg/Include/Ppi/PchPolicy.h | 23 +
> .../SouthClusterLbg/Include/Ppi/PchReset.h | 95 +
> .../Pch/SouthClusterLbg/Include/Ppi/Spi.h | 28 +
> .../Include/Private/Library/PchSpiCommonLib.h | 458 +
> .../Include/Protocol/PchReset.h | 114 +
> .../SouthClusterLbg/Include/Protocol/Spi.h | 305 +
> .../Include/Register/PchRegsDci.h | 44 +
> .../Include/Register/PchRegsDmi.h | 302 +
> .../Include/Register/PchRegsEva.h | 124 +
> .../Include/Register/PchRegsFia.h | 106 +
> .../Include/Register/PchRegsGpio.h | 531 +
> .../Include/Register/PchRegsHda.h | 271 +
> .../Include/Register/PchRegsHsio.h | 190 +
> .../Include/Register/PchRegsItss.h | 90 +
> .../Include/Register/PchRegsLan.h | 156 +
> .../Include/Register/PchRegsLpc.h | 490 +
> .../Include/Register/PchRegsP2sb.h | 132 +
> .../Include/Register/PchRegsPcie.h | 620 ++
> .../Include/Register/PchRegsPcr.h | 177 +
> .../Include/Register/PchRegsPmc.h | 731 ++
> .../Include/Register/PchRegsPsf.h | 304 +
> .../Include/Register/PchRegsPsth.h | 66 +
> .../Include/Register/PchRegsSata.h | 713 ++
> .../Include/Register/PchRegsSmbus.h | 157 +
> .../Include/Register/PchRegsSpi.h | 354 +
> .../Include/Register/PchRegsThermal.h | 113 +
> .../Include/Register/PchRegsTraceHub.h | 147 +
> .../Include/Register/PchRegsUsb.h | 529 +
> .../Library/PeiDxeSmmGpioLib/GpioLibrary.h | 224 +
> .../Product/Whitley/SiliconPkg10nmPcds.dsc | 99 +
> .../SecurityIp/SecurityIpMkTme1v0_Inputs.h | 25 +
> .../SecurityIp/SecurityIpMkTme1v0_Outputs.h | 18 +
> .../SecurityIp/SecurityIpSgxTem1v0_Inputs.h | 39 +
> .../SecurityIp/SecurityIpSgxTem1v0_Outputs.h | 22 +
> .../Guid/SecurityIp/SecurityIpTdx1v0_Inputs.h | 13 +
> .../SecurityIp/SecurityIpTdx1v0_Outputs.h | 11 +
> .../Include/Guid/SecurityPolicy_Flat.h | 22 +
> .../Intel/WhitleySiliconPkg/SiliconPkg.dec | 1004 ++
> .../SiliconPolicyInit/SiliconPolicyInitLate.c | 52 +
> .../SiliconPolicyInitLate.inf | 49 +
> .../SiliconPolicyInitPreAndPostMem.c | 63 +
> .../SiliconPolicyInitPreAndPostMem.inf | 48 +
> .../WhitleySiliconPkg/WhitleySiliconPkg.dec | 65 +
> 437 files changed, 86801 insertions(+), 12 deletions(-)
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BiosInfo/BiosInfo.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BiosInfo/BiosInfo.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BiosInfo/BiosInfo.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/CooperCityRvp/build_board.py
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/CooperCityRvp/build_config.cfg
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Cpu/Dxe/PlatformCpuPolicy/PlatformCpuPolicy.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Cpu/Dxe/PlatformCpuPolicy/PlatformCpuPolicy.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/DynamicExPcd.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridgeSupport.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostResource.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalance.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalance.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalanceIo.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalanceMmio32.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalanceMmio64.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRootBridge.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRootBridgeIo.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciIovPlatformPolicy.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciIovPlatformPolicy.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciSupportLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciSupportLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Variable/PlatformVariable/Pei/PlatformVariableInitPei.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Variable/PlatformVariable/Pei/PlatformVariableInitPei.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Features/Variable/PlatformVariable/Pei/PlatformVariableInitPei.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/FspFlashOffsets.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/CoreDxeInclude.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/EnablePerformanceMonitoringInfrastructure.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/EnableRichDebugMessages.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Fdf/CommonNvStorageFtwWorking.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Fdf/CommonSpiFvHeaderInfo.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Fdf/EnablePerformanceMonitoringInfrastructurePostMemory.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Fdf/EnablePerformanceMonitoringInfrastructurePreMemory.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Fdf/NvStorage512K.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/GpioInitData.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Guid/PlatformVariableCommon.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Guid/SetupVariable.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Guid/UbaCfgHob.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/IoApic.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/MultiPlatSupportLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PeiPlatformHooklib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformClocksLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformOpromPolicyLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformSetupVariableSyncLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformVariableHookLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/ReadFfsLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/SetupLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaAcpiUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaBoardSioInfoLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaClkGenUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaClocksConfigLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaGpioInitLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaGpioPlatformConfig.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaGpioUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaHsioPtssTableConfigLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaIioConfigLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaIioPortBifurcationInitLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaOpromUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaPcdUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaPchEarlyUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaPcieBifurcationUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaPlatLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSlotUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSoftStrapUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSystemBoardInfoLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSystemConfigUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaUsbOcUpdateLib.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/OnboardNicStructs.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/PchSetupVariable.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/PchSetupVariableLbg.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/PlatDevData.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/PlatPirqData.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Ppi/ExReportStatusCodeHandler.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Ppi/SmbusPolicy.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Ppi/UbaCfgDb.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/LegacyBios.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/LegacyBiosPlatform.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/PciIovPlatform.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/PlatformType.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/UbaCfgDb.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/UbaDevsUpdateProtocol.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/Protocol/UbaMakerProtocol.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/SetupTable.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/SioRegs.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/SystemBoard.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Include/UbaKti.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.uni
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitPreMemLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitPreMemLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/MultiPlatSupportLib/MultiPlatSupport.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/MultiPlatSupportLib/MultiPlatSupportLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/MultiPlatSupportLib/MultiPlatSupportLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiPlatformHookLib/PeiPlatformHooklib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/PeiUbaGpioPlatformConfigLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/PeiUbaPlatLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/PeiUbaUsbOcUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaBoardSioInfoLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaClkGenUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaClocksConfigLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaGpioUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaHsioPtssTableConfigLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaIioConfigLibPei.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaIioPortBifurcationInitLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaPcdUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaPchEarlyUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaPchPcieBifurcationLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaSlotUpdateLibPei.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PeiUbaPlatLib/UbaSoftStrapUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformClocksLib/Pei/PlatformClocksLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformClocksLib/Pei/PlatformClocksLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformCmosAccessLib/PlatformCmosAccessLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformCmosAccessLib/PlatformCmosAccessLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformHooksLib/PlatformHooks.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformHooksLib/PlatformHooksLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformOpromPolicyLibNull/PlatformOpromPolicyLibNull.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformOpromPolicyLibNull/PlatformOpromPolicyLibNull.inf
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformSetupVariableSyncLibNull/PlatformSetupVariableSyncLibNull.c
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformSetupVariableSyncLibNull/PlatformSetupVariableSyncLibNull.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformVariableHookLibNull/PlatformVariableHookLibNull.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/PlatformVariableHookLibNull/PlatformVariableHookLibNull.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/ReadFfsLib/ReadFfsLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/ReadFfsLib/ReadFfsLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SerialPortLib/Ns16550.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SerialPortLib/SerialPortLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SerialPortLib/SerialPortLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/PchPolicyUpdateUsb.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLibFsp.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLibFsp.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/UbaGpioInitLib/UbaGpioInitLib.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Library/UbaGpioInitLib/UbaGpioInitLib.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/PlatformType/PlatformType.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/PlatformType/PlatformTypes.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/PlatformType/PlatformTypes.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/S3NvramSave/S3NvramSave.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/S3NvramSave/S3NvramSave.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Dxe/S3NvramSave/S3NvramSave.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/DummyPchSpi/DummyPchSpi.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/DummyPchSpi/PchSpi.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/EmulationPlatformInit/EmulationPlatformInit.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/EmulationPlatformInit/EmulationPlatformInit.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dec
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkg.fdf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/PlatformPkgConfig.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/StructurePcd.dsc
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/StructurePcdCpx.dsc
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> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Dxe/SystemConfigUpdateDxe/SystemConfigUpdateDxe.h
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Dxe/SystemConfigUpdateDxe/SystemConfigUpdateDxe.inf
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/PchLbgHsioPtssTablesBx.c
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/PchLbgHsioPtssTablesBx_Ext.c
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/PchLbgHsioPtssTablesSx.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/PchLbgHsioPtssTablesSx_Ext.c
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeCooperCityRP/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c
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> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h
> create mode 100644
> Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaUpdatePcds/Pei/UpdatePcdsPei.inf
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Universal/PeiExStatusCodeHandler/ExStatusCodeHandlerPei.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Universal/PeiExStatusCodeHandler/ExStatusCodeHandlerPei.inf
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> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Universal/PeiExStatusCodeRouter/ExReportStatusCodeRouterPei.h
> create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Universal/PeiExStatusCodeRouter/ExReportStatusCodeRouterPei.inf
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Cpu/Include/Library/CpuEarlyDataLib.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Cpu/Include/Library/CpuPpmLib.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/ConfigBlock/UsbConfig.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Cpu/CpuIds.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/CpuAndRevisionDefines.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/EmulationConfiguration.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/FpgaSocketVariable.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/MemBootHealthGuid.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/MemoryMapData.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/PartialMirrorGuid.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/PlatformInfo.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SiliconPolicyInitLibInterface.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SocketCommonRcVariable.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SocketIioVariable.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SocketMemoryVariable.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SocketPciResourceData.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/SocketVariable.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Guid/StatusCodeDataTypeExDebug.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/IioConfig.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/IioPlatformData.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/IioRegs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/IioSetupDefinitions.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/IioUniversalData.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/ImonVrSvid.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/KtiSetupDefinitions.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Library/MemTypeLib.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Include/Library/SemaphoreLib.h
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> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsLan.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsLpc.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsP2sb.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsPcie.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsPcr.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsPmc.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsPsf.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsPsth.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsSata.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsSmbus.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsSpi.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsThermal.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsTraceHub.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/Register/PchRegsUsb.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Library/PeiDxeSmmGpioLib/GpioLibrary.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Product/Whitley/SiliconPkg10nmPcds.dsc
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpMkTme1v0_Inputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpMkTme1v0_Outputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpSgxTem1v0_Inputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpSgxTem1v0_Outputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpTdx1v0_Inputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityIp/SecurityIpTdx1v0_Outputs.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/Security/Include/Guid/SecurityPolicy_Flat.h
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPkg.dec
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.c
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitLate.inf
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.c
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/SiliconPolicyInit/SiliconPolicyInitPreAndPostMem.inf
> create mode 100644 Silicon/Intel/WhitleySiliconPkg/WhitleySiliconPkg.dec
>
> --
> 2.27.0.windows.1
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