[edk2-devel] [PATCH v2] MinPlatformPkg/PciHostBridgeLibSimple: Fix Mem.Limit assignment

[Chiu, Chasel]

Patch pushed: 69e6a5e160551fdd09ce367e9c97c25d8683a3ac

Thanks,
Chasel



> -----Original Message-----
> From: Benjamin Doron <benjamin.doron00 at gmail.com>
> Sent: Friday, July 23, 2021 10:27 AM
> To: devel at edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu at intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone at intel.com>; Liming Gao <gaoliming at byosoft.com.cn>;
> Dong, Eric <eric.dong at intel.com>
> Subject: [PATCH v2] MinPlatformPkg/PciHostBridgeLibSimple: Fix Mem.Limit
> assignment
> 
> In the case where the root bridge's Mem.Limit is the base address of PCIe MMIO,
> subtract one to make a valid end address.
> 
> This fixes an issue where CpuDxe returns "Length(0x50000001) is not aligned!"
> when PciHostBridgeDxe attempts to make this range uncacheable.
> 
> Cc: Chasel Chiu <chasel.chiu at intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
> Cc: Liming Gao <gaoliming at byosoft.com.cn>
> Cc: Eric Dong <eric.dong at intel.com>
> Signed-off-by: Benjamin Doron <benjamin.doron00 at gmail.com>
> ---
> 
> Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBrid
> geLibSimple.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git
> a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBr
> idgeLibSimple.c
> b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBr
> idgeLibSimple.c
> index e231f747019e..0e3fee28b5d1 100644
> ---
> a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciHostBr
> idgeLibSimple.c
> +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/P
> +++ ciHostBridgeLibSimple.c
> @@ -90,7 +90,7 @@ PciHostBridgeGetRootBridges (
>    if (PcdGet32(PcdPciReservedMemLimit) != 0)
> {     mRootBridgeTemplate.Mem.Limit = PcdGet32 (PcdPciReservedMemLimit);   }
> else {-    mRootBridgeTemplate.Mem.Limit = (UINT32) PcdGet64
> (PcdPciExpressBaseAddress);+    mRootBridgeTemplate.Mem.Limit = (UINT32)
> PcdGet64 (PcdPciExpressBaseAddress) - 1;   }
> mRootBridgeTemplate.MemAbove4G.Base = PcdGet64
> (PcdPciReservedMemAbove4GBBase);--
> 2.31.1



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